📄 uart.c
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{
rCLKDIVN = rCLKDIVN | (0<<8); // UARTCLK Divn is 1
rCLKSRC = rCLKSRC & ~(1<<8);
SelectUartClockSource(1,USYSCLK); // Using UARTCLK
Uart_DataFormatSet(1,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH1,INTORPOL,INTORPOL); // Tx -> Polling, Rx -> Disable
rUBRDIV1 = 5;
rUDIVSLOT1 = 0xff;
printf("UART UARTCLK Using Print Out!! OK? \n");
Uart_TxEmpty(1);
}
void EXTCLK_Using_Test(void)
{
rCLKDIVN = rCLKDIVN | (0<<8); // UARTCLK Divn is 1
rCLKSRC = rCLKSRC & ~(1<<8);
rGPHCON = rGPHCON | (2<<16);
SelectUartClockSource(1,UEXTCLK); // Using UARTCLK
Uart_DataFormatSet(1,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH1,INTORPOL,INTORPOL); // Tx -> Polling, Rx -> Disable
rUBRDIV1 = 34;
rUDIVSLOT1 = 0x1fff;
printf("UART EXTCLK Using Print Out!! OK? \n");
Uart_TxEmpty(1);
}
void Uart0_Tx_Polling_High_BaudRate(void)
{
int iUARTIndex = 0;
Uart_Port_Init(); // GPIO port init.
Data_init_UART();
rCLKDIVN = rCLKDIVN | (1<<8); // UARTCLK Divn is 1
SelectUartClockSource(0,USYSCLK); // Using UARTCLK
Uart_DataFormatSet(0,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH0,INTORPOL,DISABLE); // Tx -> Polling, Rx -> Disable
rUBRDIV0 = 3;
rUDIVSLOT0 = 0;
/* using PCLK
SelectUartClockSource(0,UPCLK); // Using PCLK
Uart_DataFormatSet(0,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH0,INTORPOL,DISABLE); // Tx -> Polling, Rx -> Disable
rUBRDIV0 = 3;
rUDIVSLOT0 = 8;
*/
//************ Baud Rate Setting *********************************************************
// 2M(1,4) 1M(3,8) 115200(35.1) @ PCLK(66.5Mhz)
// 2M(0,11) 115200(26,2) 1M(2,6) @ PCLK(50Mhz)
// 1M(8,0) 2M(3,8) , 3M(2,0), 4M(1,4) 115200(71,3) @ USYSCLK(133Mhz)
// 1M(3,8) 2M(1,4) , 3M(0,8), 4M(0,2) 115200(34,13) 96000(41,16) @ EXTCLK 66Mhz
//****************************************************************************************
Uart_FifoDisable(0);
uartTxStr = 0x31000000 ;
while(1)
{
if ( rUTRSTAT0 & 0x4 )
{
WrUTXH0(*uartTxStr);
iUARTIndex++;
if ( iUARTIndex == 1048576 ) break; // 250000 word Transmit
uartTxStr++;
}
}
Uart_Port_Return(); // Restore GPIO port state
}
void Uart0_Tx_DMA1_High_Baudrate(void)
{
int i;
Uart_Port_Init(); // GPIO port init.
rCLKDIVN = rCLKDIVN | (1<<8); // UARTCLK Divn is 1
SelectUartClockSource(0,USYSCLK); // Using UARTCLK
Uart_DataFormatSet(0,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH0,INTORPOL,DISABLE); // Tx -> Polling, Rx -> Disable
rUBRDIV0 = 3;
rUDIVSLOT0 = 0;
//************ Baud Rate Setting *********************************************************
// 2M(1,4) 1M(3,8) 115200(35.1) @ PCLK(66.5Mhz)
// 2M(0,11) 115200(26,2) 1M(2,6) @ PCLK(50Mhz)
// 1M(8,0) 2M(3,8) , 3M(2,0), 4M(1,4) 115200(71,3) @ USYSCLK(133Mhz)
// 1M(3,8) 2M(1,4) , 3M(0,8), 4M(0,2) 115200(34,13) 96000(41,16) @ EXTCLK 66Mhz
//****************************************************************************************
Uart_FifoDisable(0);
Data_init_UART();
uartTxStr=0x31000000;
Uart_Tx_DMA1_Set_1Mbyte();
Uart_FunctionSet(CH0,DMAREQ0,DISABLE); // Tx -> DMA Request, Rx -> Disable
while(IsTxDone==FALSE);
rINTMSK|=(BIT_DMA1);
Uart_Port_Return(); // Restore GPIO port state
}
void Uart0_Tx_DMA1_Fifo_High_Baudrate(void)
{
int i;
Uart_Port_Init(); // GPIO port init.
// UART Setting By Jungil
rCLKDIVN = rCLKDIVN | (0<<8); // UARTCLK Divn is 1
SelectUartClockSource(0,USYSCLK); // Using UARTCLK
Uart_DataFormatSet(0,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH0,INTORPOL,DISABLE); // Tx -> Polling, Rx -> Disable
rUBRDIV0 = 5;
rUDIVSLOT0 = 0;
//************ Baud Rate Setting *********************************************************
// 2M(1,4) 1M(3,8) 115200(35.1) @ PCLK(66.5Mhz)
// 2M(0,11) 115200(26,2) 1M(2,6) @ PCLK(50Mhz)
// 1M(8,0) 2M(3,8) , 3M(2,0), 4M(1,4) 115200(71,3) @ USYSCLK(133Mhz)
// 1M(3,8) 2M(1,4) , 3M(0,8), 4M(0,2) 115200(34,13) 96000(41,16) @ EXTCLK 66Mhz
//****************************************************************************************
Data_init_UART();
uartTxStr=0x31000000;
Uart_FifoLvSet(0,TX48BYTE,RX1BYTE); // Rx Trigger Level is not necessary
Uart_Tx_DMA1_Set_1Mbyte();
Uart_FunctionSet(CH0,DMAREQ0,DISABLE); // Tx -> DMA Request, Rx -> Disable
while(IsTxDone==FALSE);
rINTMSK|=(BIT_DMA1);
Uart_Port_Return(); // Restore GPIO port state
}
void Data_init_UART(void)
{
int i;
unsigned int *rec_buf = (unsigned int *)0x31000000;
for(i=0;i<500000;i++)
{
*(rec_buf+i)=i;
}
/* *(rec_buf+0)=0xa5a5a5a5;
*(rec_buf+1)=0x5a5a5a5a;
*(rec_buf+2)=0xffff0000;
*(rec_buf+3)=0xffffffff;
*(rec_buf+4)=0x0000ffff;
*/
}
void Uart_Tx_DMA1_Set_1Mbyte(void)
{
IsTxDone=FALSE; // DMA is not done
pISR_DMA1 = (unsigned)Uart_Dma1Tx_Int; // DMA1 ISR Address Mapping
rINTMSK&=~(BIT_DMA1); // Interrupt Mask Disable, Interrupt Enable
rDISRC1=(unsigned)uartTxStr; //Source Address of Memory
rDISRCC1=(0<<1)|(0); //AHB(Memory), inc
rDIDST1=(unsigned)0x50000020; //Destination Address of UTXH0 Register
rDIDSTC1=(1<<1)|(1); //APB(SPI), fix
rDCON1=(1<<31)|(0<<30)|(1<<29)|(0<<28)|(0<<27)|(1<<22)|(0<<20)|(1048560);//1048575
// Handshake , APB , TC is 0 IRQ, unit, single, no Auto Reload, Byte,
rDMAREQSEL1=(19<<1)|(1<<0); // HWSRC SPI0 TX
rDMASKTRIG1=(0<<2)|(1<<1)|(0); //run, DMA1 channel on, no-sw trigger
}
void Uart_Rx_DMA3_Set_1Mbyte(void)
{
IsRxDone=FALSE; // DMA is not done
pISR_DMA3 = (unsigned)Uart_Dma3Rx_Int;
rINTMSK&=~(BIT_DMA3);
rDISRC3=(unsigned)0x50000024; //Address of URXH0 Register
rDISRCC3=(1<<1)|(1); //APB(SPI), fix
rDIDST3=(unsigned)uartRxStr; //Address of Memory
rDIDSTC3=(0<<1)|(0); //AHB(Memory), inc
rDCON3=(1<<31)|(0<<30)|(1<<29)|(0<<28)|(0<<27)|(1<<22)|(0<<20)|(1048560);
rDMAREQSEL3=(19<<1)|(1<<0);
rDMASKTRIG3=(0<<2)|(1<<1)|(0); //run, DMA1 channel on, no-sw trigger
}
void Uart0_Rx_Polling_High_Baudrate(void)
{
int iUART_RX_Index = 0 ;
int iGood=0, iFail =0 ;
unsigned int *Ref_Buffer1 = (unsigned int *)0x31000000;
unsigned int *Ref_Buffer2 = (unsigned int *)0x31200000;
Uart_Port_Init(); // GPIO port init.
// Using PCLK
SelectUartClockSource(0,UPCLK); // Using PCLK
Uart_DataFormatSet(0,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH0,DISABLE,INTORPOL); // Rx -> Polling, Tx -> Disable
rUBRDIV0 = 1;
rUDIVSLOT0 = 0;
/* rCLKDIVN = rCLKDIVN | (1<<8); // UARTCLK Divn is 1
SelectUartClockSource(0,USYSCLK); // Using UARTCLK
Uart_DataFormatSet(0,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH0,DISABLE,INTORPOL); // Rx -> Polling, Tx -> Disable
rUBRDIV0 = 2;
rUDIVSLOT0 = 0;
*/
//************ Baud Rate Setting *********************************************************
// 2M(1,4) 1M(3,8) 115200(35,1) @ PCLK(66.5Mhz)
// 2M(0,11) 115200(26,2) 1M(2,6) @ PCLK(50Mhz)
// 1M(8,0) 2M(3,8) , 3M(2,0), 4M(1,4) 115200(71,3) @ USYSCLK(133Mhz)
// 1M(3,8) 2M(1,4) , 3M(0,8), 4M(0,2) 115200(34,13) 96000(41,16) @ EXTCLK 66Mhz
//****************************************************************************************
Uart_FifoDisable(0);
RxBufferClear();
Data_init_UART();
uartRxStr=RxBUFFER2;
while (1)
{
if ( rUTRSTAT0 & 0x1 )
{
*uartRxStr = RdURXH0();
iUART_RX_Index++;
if ( iUART_RX_Index == 1048576 )
{
printf("Address = %x\n", uartRxStr);
break;
}
uartRxStr++;
}
}
iUART_RX_Index = 0 ;
for ( iUART_RX_Index = 0 ; iUART_RX_Index < 262144 ; iUART_RX_Index++)
{
if ( ( *(Ref_Buffer1 + iUART_RX_Index) ) == ( *(Ref_Buffer2 + iUART_RX_Index ) ) )
{
iGood++;
}
else
{
printf("Bad~~ %x\n", Ref_Buffer2 + iUART_RX_Index);
iFail++;
}
}
printf( "\nThe Result is Good: %d, Fail: %d\n", iGood, iFail);
Uart_Port_Return(); // Restore GPIO port state
Delay(1000);
}
void Uart0_Rx_DMA3_High_Baudrate(void)
{
int i;
int iUART_RX_Index = 0 ;
int iGood=0, iFail =0 ;
unsigned int *Ref_Buffer1 = (unsigned int *)0x31000000;
unsigned int *Ref_Buffer2 = (unsigned int *)0x31200000;
Uart_Port_Init(); // GPIO port init.
RxBufferClear();
Data_init_UART();
printf("Only DMA Tx must be used !!!\n");
// Using PCLK
SelectUartClockSource(0,UPCLK); // Using PCLK
Uart_DataFormatSet(0,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH0,DISABLE,INTORPOL); // Rx -> Polling, Tx -> Disable
rUBRDIV0 = 1;
rUDIVSLOT0 = 0;
// Using Fout Clock
/* rCLKDIVN = rCLKDIVN | (1<<8); // UARTCLK Divn is 1
SelectUartClockSource(0,USYSCLK); // Using UARTCLK
Uart_DataFormatSet(0,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH0,DISABLE,INTORPOL); // Rx -> Polling, Tx -> Disable
rUBRDIV0 = 2;
rUDIVSLOT0 = 0;
*/
Uart_FifoDisable(0);
uartRxStr=RxBUFFER2;
Uart_Rx_DMA3_Set();
Uart_FunctionSet(CH0,DISABLE,DMAREQ0); // Rx -> DMA Request, Tx -> Disable
while(IsRxDone==FALSE);
rINTMSK|=(BIT_DMA3);
iUART_RX_Index = 0 ;
for ( iUART_RX_Index = 0 ; iUART_RX_Index < 262140 ; iUART_RX_Index++)
{
if ( ( *(Ref_Buffer1 + iUART_RX_Index) ) == ( *(Ref_Buffer2 + iUART_RX_Index ) ) )
{
// printf("Good!\n");
iGood++;
}
else
{
printf("Bad~~ %x\n", Ref_Buffer2 + iUART_RX_Index);
iFail++;
}
}
printf( "\nThe Result is Good: %dByte, Fail: %dByte\n", iGood*4, iFail*4);
Uart_Port_Return(); // Restore GPIO port state
Delay(100);
}
void Uart0_Rx_DMA3_Fifo_High_Baudrate(void)
{
int i;
int iUART_RX_Index = 0 ;
int iGood=0, iFail =0 ;
unsigned int *Ref_Buffer1 = (unsigned int *)0x31000000;
unsigned int *Ref_Buffer2 = (unsigned int *)0x31200000;
Uart_Port_Init(); // GPIO port init.
RxBufferClear();
Data_init_UART();
// Using PCLK
/* SelectUartClockSource(0,UPCLK); // Using PCLK
Uart_DataFormatSet(0,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH0,DISABLE,INTORPOL); // Rx -> Polling, Tx -> Disable
rUBRDIV0 = 1;
rUDIVSLOT0 = 0;
*/
// Using Fout Clock
rCLKDIVN = rCLKDIVN | (0<<8); // UARTCLK Divn is 1
SelectUartClockSource(0,USYSCLK); // Using UARTCLK
Uart_DataFormatSet(0,NP,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_FunctionSet(CH0,DISABLE,INTORPOL); // Rx -> Polling, Tx -> Disable
rUBRDIV0 = 4;
rUDIVSLOT0 = 0;
printf("Only DMA Tx must be used !!!\n");
uartRxStr=RxBUFFER2;
Uart_Rx_DMA3_Set();
Uart_FunctionSet(CH0,DISABLE,DMAREQ0); // Rx -> DMA Request, Tx -> Disable
rUCON0 |= (3<<8); // Tx, Rx => Interrupt Type is Level
Uart_FifoLvSet(0,TX48BYTE,RX16BYTE); // Rx Trigger Level is not necessary
while(IsRxDone==FALSE);
rINTMSK|=(BIT_DMA3);
iUART_RX_Index = 0 ;
for ( iUART_RX_Index = 0 ; iUART_RX_Index < 262140 ; iUART_RX_Index++)
{
if ( ( *(Ref_Buffer1 + iUART_RX_Index) ) == ( *(Ref_Buffer2 + iUART_RX_Index ) ) )
{
// printf("Good!\n");
iGood++;
}
else
{
printf("Bad~~ %x\n", Ref_Buffer2 + iUART_RX_Index);
iFail++;
}
}
printf( "\nThe Result is Good: %dByte, Fail: %dByte\n", iGood*4, iFail*4);
Uart_Port_Return(); // Restore GPIO port state
Delay(100);
}
void Uart0_AFC_RX_Test(void)
{
char ikey;
// Mem_Init();
printf("\n*************Rx Test *************\n");
Uart_Port_Init(); // GPIO port init.
Uart_DataFormatSet(0,0,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_BaudRateSet(0,115200); // Channel 0, 115200BPS
uuartRxStr=0x31000000;
RxBufferClear();
uIsRxDone=0;
Uart_FunctionSet(0,1,1); // Tx -> Disable, Rx -> Interrupt
Uart_FifoLvSet(0,3,2); // 48Byte : TX, 16Byte : RX
rUMCON0 = (6<<5)|(1<<4); // AFC Enable
// rUMCON0 = (1<<4); // AFC Enable
pISR_UART0 = (U32)uUART0_Rx_Fifo_ISR;
rINTMSK &= ~(BIT_UART0);
rINTSUBMSK &= ~(BIT_SUB_RXD0|BIT_SUB_ERR0);
while(uIsRxDone==0);
rINTSUBMSK |= (BIT_SUB_RXD0|BIT_SUB_ERR0);
rINTMSK |= (BIT_UART0);
uuartRxStr=0x31000000;
while(1)
{
printf("%c",*uuartRxStr);
if(*uuartRxStr == '\0') break;
uuartRxStr++;
}
Uart_Port_Return(); // Restore GPIO port state
Uart_TxEmpty(1);
Delay(2000);
}
void __irq uUART0_Rx_Fifo_ISR(void)
{
// uUERSTAT=rUERSTAT0;
rINTSUBMSK |= (BIT_SUB_RXD0|BIT_SUB_ERR0);
rINTMSK |= (BIT_UART0);
ClearPending(BIT_UART0); // Clear source pending
if(rSUBSRCPND&BIT_SUB_RXD0)
{
while(rUFSTAT0&0x1f)
{
*uuartRxStr=RdURXH0();
// if( uRxRoop == 1008764 )
if( *uuartRxStr == '\0' )
{
uIsRxDone=1;
break;
}
else
{
uuartRxStr++;
uRxRoop++;
}
}
rSUBSRCPND=BIT_SUB_RXD0; // Clear Sub int pending
} // if(rSUBSRCPND&BIT_SUB_RXD0)
rINTMSK &= ~(BIT_UART0);
rINTSUBMSK &= ~(BIT_SUB_RXD0|BIT_SUB_ERR0);
}
void Uart0_AFC_TX_Test(void)
{
// Mem_Init();
// Mem_Init_Tx();
Uart_Port_Init(); // GPIO port init.
printf("\n AFC TX TEST \n");
Uart_DataFormatSet(0,0,1,8); // Channel 0, No Parity, One Stop Bit, 8-Bit Data
Uart_BaudRateSet(0,115200); // Channel 0, 115200BPS
// uuartTxStr=0x31000000;
uuartTxStr = "ABCDEFGHIJKLMNOPQRSTUVWXYZ123456789abcdefghijklmnopqrstuvwxyz0123456789 ABCDEFGHIJKLMNOPQRSTUVWXYZ123456789abcdefghijklmnopqrstuvwxyz0123456789 ABCDEFGHIJKLMNOPQRSTUVWXYZ123456789abcdefghijklmnopqrstuvwxyz0123456789 ABCDEFGHIJKLMNOPQRSTUVWXYZ123456789abcdefghijklmnopqrstuvwxyz0123456789 ABCDEFGHIJKLMNOPQRSTUVWXYZ123456789abcdefghijklmnopqrstuvwxyz0123456789 ";
uIsTxDone=0;
Uart_FunctionSet(0,1,0); // Tx -> Interrupt Rx -> Disable
Uart_FifoLvSet(0,3,2); // 48Byte : TX, 16Byte : RX
rUMCON0 = (1<<4); // AFC Enable
pISR_UART0 = (U32)uUART0_Tx_Fifo_ISR;
rINTMSK &= ~(BIT_UART0);
rINTSUBMSK &= ~(BIT_SUB_TXD0|BIT_SUB_ERR0);
while(uIsTxDone==0);
rINTSUBMSK |= (BIT_SUB_TXD0|BIT_SUB_ERR0);
rINTMSK |= (BIT_UART0);
Uart_Port_Return(); // Restore GPIO port state
Delay(200);
}
void __irq uUART0_Tx_Fifo_ISR(void)
{
rINTSUBMSK |= (BIT_SUB_TXD0|BIT_SUB_ERR0);
rINTMSK |= (BIT_UART0);
ClearPending(BIT_UART0); // Clear source pending
if(rSUBSRCPND&BIT_SUB_TXD0)
{
while(!(rUFSTAT0&(0x40)<<8)) // During TX FIFO is not Full
{
WrUTXH0(*(uuartTxStr));
// if ( uTxRoop == 1008764 )
if ( *(uuartTxStr) == '\0' )
{
uIsTxDone = 1;
while ( rUFSTAT0&(0x7f00) ); // Wait Tx Fifo Empty
rINTMSK |= (BIT_UART0);
return;
}
uuartTxStr++;
uTxRoop++;
}
rSUBSRCPND=BIT_SUB_TXD0; // Clear Sub int pending
}
rINTMSK &= ~(BIT_UART0);
rINTSUBMSK &= ~(BIT_SUB_TXD0|BIT_SUB_ERR0);
}
void Mem_Init_Tx(void)
{
char i;
for ( i=0 ; i<500000 ; i++ )
{
*(unsigned char *)((0x31000000)+i) = i;
}
}
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