spi.c

三星2413芯片的测试代码,对进行驱动开发很有帮助.

			break;
		}

#if 0
	///////////////////////////// Getting Remainder in Fifo ///////////////////////////////
	i=1;
	while(!(RXFIFONEMPTY0)) {
		*(rx_ptr[0]+spitx_count*4+i) = RdSPRXFIFO0();
		i++;
		}
	//////////////////////////////////////////////////////////////////////////////////
#endif
	
	printf("Check TC1=%x,  TC3=%x\n",rDSTAT1,rDSTAT3);
	printf("Check rDCON3=%x\n",rDCON3);	//rDCON3
	printf("tx_dma1Done=%x, rx_dma3Done=%x\n",tx_dma1Done,rx_dma3Done);

	rSPCON0=(0<<5)|(0<<4)|(0<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,slave,low,A,normal

	rSPCON0|=(1<<11)|(1<<10);			// FIFO Clear
	while((rSPCON0>>10)&0x3 == 3);	// Wait for FIFO clear

	rx_ptr[0]=(unsigned char *) DMA3_RxBUFFER1;

	for(i=0; i<spitx_count*4; i++) {
		printf("0x%04x : ",i);
		printf("0x%02x\n",*(rx_ptr[0]+i));
		if(Uart_GetKey()) getchar();
		}

	SPI_Port_Return();	
}

void Test_Spi0_S_Rx_DMA3_FIFO_Set(void)
{
	int i;
	
	rx_ptr[0]=(unsigned char *) DMA3_RxBUFFER1;	// Rx1 Address Mapping
	for(i=0;i<spirx_count*4+10;i++)
		*(rx_ptr[0]+i)=0x0; 					// Zero Initialize
	
	rx_dma3Done=0;
	
	pISR_DMA3 = (unsigned)Dma3Rx_Int;
	rINTMSK&=~(BIT_DMA3);	

	rDISRC3=(unsigned)0x5900001c;				//Address of SPRXFIFO0 Register
	rDISRCC3=(1<<1)|(1);						//APB(SPI), fix
	rDIDST3=(unsigned)rx_ptr[0];				//Address of Memory
	rDIDSTC3=(0<<1)|(0);						//AHB(Memory), inc
	rDCON3=(0<<31)|(0<<30)|(1<<29)|(1<<28)|(0<<27)|(1<<24)|(1<<22)|(0<<20)|(spirx_count);	// Demand mode, Burst Transfer
	rDMAREQSEL3=(1<<1)|(1<<0);
	rDMASKTRIG3=(0<<2)|(1<<1)|(0);    			//run, DMA3 channel on, no-sw trigger 
}

void Test_SPI0_M_Rx_DMA_FIFO(void)// SPI0=Master
{
	int i;
	U32 spcon0,sppin0,sppre0,spific0,spsta0;
	U32 fail=0;

	SPI_Port_Init(0);

	rSPCON0=(1<<11)|(1<<10);			// FIFO Clear
	while((rSPCON0>>10)&0x3 == 3);	// Wait for FIFO clear

//	SPI_Baud_Rate_Set(0,12500000);
	SPI_Baud_Rate_Set(SPI_CHANNEL0,25000000);

	printf("[One Board SPI0(Master Rx), Another Board SPI0(Slave Tx) DMA test]\n");
	printf("First Slave is ready? Press any key, Start\n");
	getchar();

	Test_Spi0_S_Rx_DMA3_FIFO_Set();//Slave DMA3setting

	Master_nSS_Con(0);				// Activate nSS 
	
	rSPPIN0=(1<<3)|(1<<0);//CS inactive, Keep
	rSPFIC0=(2<<10);					// RX FIFO DMA Ctl(Rx Fifo Almost Empty)
//	rSPCON0=(1<<14)|(1<<9)|(1<<7)|(0<<5)|(1<<4)|(1<<3)|(0<<2)|(1<<1)|(1<<0);//DMA,dis-SCK,slave,low,A,TAGD
	rSPCON0=(1<<14)|(1<<9)|(0<<5)|(1<<4)|(1<<3)|(0<<2)|(0<<1)|(1<<0);//DMA,dis-SCK,slave,low,A,TAGD
	while((rSPSTA0>>6)&0x1) printf("0x%02x\n",RdSPRXFIFO0());	// remove dummy data in rx-fifo
	rSPCON0|=(1<<7); // Rx dir (Clock Out Start)

	spcon0 = rSPCON0;
	sppin0 = rSPPIN0;
	spific0 = rSPFIC0;
	spsta0 = rSPSTA0;
	
	while(rx_dma3Done==0) {
		if(Uart_GetKey())
			break;
		}

	printf("Check TC1=%x,  TC3=%x\n",rDSTAT1,rDSTAT3);
	printf("Check rDCON3=%x\n",rDCON3);	//rDCON3
	printf("tx_dma1Done=%x, rx_dma3Done=%x\n",tx_dma1Done,rx_dma3Done);

	Master_nSS_Con(1);

	rSPCON0=(0<<5)|(0<<4)|(0<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,slave,low,A,normal

	rSPCON0|=(1<<11)|(1<<10);			// FIFO Clear
	while((rSPCON0>>10)&0x3 == 3);	// Wait for FIFO clear

	rx_ptr[0]=(unsigned char *) DMA3_RxBUFFER1;

	for(i=0; i<spitx_count*4; i++) {
		printf("0x%04x : ",i);
		printf("0x%02x",*rx_ptr[0]);
		if((*rx_ptr[0] == 0x55)||(*rx_ptr[0] == 0xaa)) printf("\n");
//		if(*rx_ptr[0]==(char)i) printf("\n");
		else {
			printf("******************************\n");
			fail=1;
			}
		rx_ptr[0]++;
		if(Uart_GetKey()) getchar();
		}

	SPI_Port_Return();

	printf("rSPCON0 = 0x%08x\n",spcon0);
	printf("rSPPIN0 = 0x%08x\n",sppin0);
	printf("rSPFIC0 = 0x%08x\n",spific0);
	printf("rSPSTA0 = 0x%08x\n",spsta0);

	if(fail) printf("Transfer Fail\n");
	else printf("Transfer Ok\n");
}

void Test_SPI0_S_Tx_DMA_FIFO(void)// SPI0=Master, SPI1=Slave
{
	int i;
	U32 spcon0,sppin0,sppre0,spific0,spsta0;

	SPI_Port_Init(1); // SPI0=Master, SPI1=Slave

	printf("[One Board SPI0(Slave Tx), Another Board SPI0(Master Rx) DMA test]\n");

	rSPCON0=(1<<11)|(1<<10);			// FIFO Clear
	while((rSPCON0>>10)&0x3 == 3);	// Wait for FIFO clear

//	SPI_Baud_Rate_Set(0,12500000);
//	SPI_Baud_Rate_Set(0,25000000);
	SPI_Baud_Rate_Set(SPI_CHANNEL0,33250000);

	Test_Spi0_M_Tx_DMA1_FIFO_Set();//Master DMA1 setting
	
//	Master_nSS_Con(0);				// Activate nSS 
	
	rSPPIN0=(1<<1)|(1<<0);			//Feedback Enable, Keep
	rSPFIC0=(2<<8);					// TX FIFO DMA Ctl(Tx Fifo Empty)
	rSPCON0=(1<<8)|(0<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<2)|(0<<1)|(0<<0);//DMA,en-SCK,master,low,A,normal
//	rSPCON0=(0<<7)|(0<<5)|(0<<4)|(0<<3)|(0<<2)|(1<<1)|(0<<0);//DMA,en-SCK,master,low,A,normal
//	rSPCON0|=(1<<8);


	spcon0 = rSPCON0;
	sppin0 = rSPPIN0;
	spific0 = rSPFIC0;
	spsta0 = rSPSTA0;
	
	while(tx_dma1Done==0) {
    		if(Uart_GetKey())
			break;
	}

	printf("Check TC1=%x,  TC3=%x\n",rDSTAT1,rDSTAT3);
	printf("tx_dma1Done=%x, rx_dma3Done=%x\n",tx_dma1Done,rx_dma3Done);

//	Master_nSS_Con(1);
	rSPCON0=(0<<5)|(0<<4)|(1<<3)|(1<<2)|(0<<1)|(0<<0);//Poll,dis-SCK,master,low,A,normal

	for(i=0; i<spitx_count*4; i++) {
		printf("0x%04x : ",i);
		printf("0x%02x\n",*tx_ptr[0]);
		tx_ptr[0]++;
		if(Uart_GetKey()) getchar();
		}

	SPI_Port_Return();	

	printf("rSPCON0 = 0x%08x\n",spcon0);
	printf("rSPPIN0 = 0x%08x\n",sppin0);
	printf("rSPFIC0 = 0x%08x\n",spific0);
	printf("rSPSTA0 = 0x%08x\n",spsta0);
}

void __irq Dma1Tx_Int(void)
{
	rINTMSK|=(BIT_DMA1);
	ClearPending(BIT_DMA1);
	printf("DMA1 DONE\n");

	rx_dma1Done=1;
	tx_dma1Done=1;

	rINTMSK &= ~(BIT_DMA1);
}

void __irq Dma3Rx_Int(void)
{
	rINTMSK|=(BIT_DMA3);
	ClearPending(BIT_DMA3);
	printf("DMA3 DONE\n");
	
	rx_dma3Done=1;
	tx_dma3Done=1;

	rINTMSK &= ~(BIT_DMA3);
}

void Test_FIFO_TIMEOUT_INT(void)
{
		char *txStr,*rxStr;
	
		printf("[One Board SPI0(Master Rx), Another Board SPI0(Slave Tx) test]\n");
	
		ElaseRxReg();
		rxdone=0;
		endSpi0Tx=0;
		spi0RxStr=(char *) SPI_BUFFER0; 					// Rx Buffer to receive
	
		rxStr=(char *)spi0RxStr;

		SPI_Port_Init(0);
		SPI_Baud_Rate_Set(SPI_CHANNEL0, 25000000);			// SPI Channel 0, 25MHz

		rSPFIC0 =(1<<5);
		rSPCON0=(2<<14)|(1<<9)|(1<<7)|(0<<5)|(0<<4)|(0<<3)|(1<<2)|(0<<1)|(0<<0);//Polling,en-SCK,master,low,A,normal

		rSPCON0|=(1<<11)|(1<<10);			// FIFO Clear
		while((rSPCON0>>10)&0x3 == 3);	// Wait for FIFO clear

		TimerSet();	// for Using FIFO Time Out Interrupt
		
		pISR_SPI0=(unsigned)Spi0_FIFO_Int;
		pISR_SPI1=(unsigned)Spi0_FIFO_TimeOut_Int;
		
		rINTMSK&=~(BIT_SPI0|BIT_SPI1);
		rINTSUBMSK &= ~(BIT_SUB_SPI0_TO);
	
		while(rxdone==0) {
			if(Uart_GetKey()) break;
			}
		
		*spi0RxStr='\0'; // attach End of String(Null)
	
		printf("\nRx Strings:%s\n",rxStr);

		SPI_Port_Return();

}

void __irq Spi0_FIFO_Int(void)
{
	ClearPending(BIT_SPI0);

	while(RXFIFONEMPTY0)
		*spi0RxStr++=RdSPRXFIFO0();	//First Rx data is garbage data

	printf(".");
}

void __irq Spi0_FIFO_TimeOut_Int(void)
{
	rSUBSRCPND=(BIT_SUB_SPI0_TO);
	ClearPending(BIT_SPI1);

	while(RXFIFONEMPTY0)
		*spi0RxStr++=RdSPRXFIFO0();	//First Rx data is garbage data

	rxdone=1;
	printf("*");
}

void TimerSet(void)
{
	rGPBDN = 0xf;
	rGPBCON = 0xaa;

	rTCFG0 = (rTCFG0&~(0xff<<8))|(255<<8);	// Prescaler 255
	rTCFG1 = (rTCFG1&~(0xf<<8));				// Mux 1/2
	rTCNTB2 = 65535;
	rTCMPB2 = 65535/2;
	rTCON   = (rTCON&~(0xf<<12))|(2<<12);
	rTCON = (rTCON&~(0xf<<12))|(9<<12);
}

///////////////////////////////////////////////////////////////////////////////////////////////////////////////
void SPI_Baud_Rate_Set(SPI_channel ch, float BaudRate)
{
	U32 PrescalerVal;

	SystemCLK();

	if(BaudRate>(PCLK/2)) {
		printf("SPI Baud Rate is too big (<%.1f MHz)\n",(float)(PCLK)/2/1000000);
		while(1);
	}
	
	PrescalerVal = (U32)(PCLK/2/BaudRate-1);
	while( PCLK/2/(PrescalerVal+1) > 25000000 )
		PrescalerVal = PrescalerVal + 1;
	
	if(ch == SPI_CHANNEL1) {
		rSPPRE1 = PrescalerVal;
		printf("BaudRate [%.3f MHz]\trSPPRE1 [0x%08x]\n",((float)PCLK/2/(PrescalerVal+1))/1000000,rSPPRE1);
	}
	else {
		rSPPRE0 = PrescalerVal;
		printf("BaudRate [%.3f MHz]\trSPPRE0 [0x%08x]\n",((float)PCLK/2/(PrescalerVal+1))/1000000,rSPPRE0);
	}

	printf("PCLK = %d\n",PCLK);
	printf("PrescalerVal = %d\n",PrescalerVal);
}

void SPI_Port_Init(U32 WhichMstr)
{
	spi0_rGPECON=rGPECON;
	spi0_rGPEDAT=rGPEDAT;
	spi0_rGPEDN=rGPEDN;

	spi1_rGPGCON=rGPGCON;
	spi1_rGPGDAT=rGPGDAT;
	spi1_rGPGDN=rGPGDN;

	rGPEDN = 0xffff;
	rGPECON &= ~(0x3f<<22);	// Bit Clear
	rGPECON |= (0x2a<<22); 	// GPE13,12,11 = SPICLK0,SPIMOSI0,SPIMISO0

	rGPGDN = 0xffff;
	rGPGCON &= ~(0x3f<<10);	// Bit Clear
	rGPGCON |= (0x3f<<10);	// GPG7,6,5 = SPICLK1,SPIMOSI1,SPIMISO1

	rGPGCON &= ~(0xf<<4);	// Bit Clear
	rGPGCON |= (0xf<<4);		// GPIO => nSS0, nSS1
	
	if (WhichMstr==0)		// SPI0 is Master
		Master_nSS_Con=_Master_nSS_Con0;
	else						// SPI1 is Master
		Master_nSS_Con=_Master_nSS_Con1;
	
	// Registers are set to reset value
	rSPCON0 = 0x8;
	rSPPIN0 = 0x2;
	rSPPRE0 = 0;
	rSPFIC0 =0;

	rSPCON1 = 0x8;
	rSPPIN1 = 0x2;
	rSPPRE1 = 0;
	rSPFIC1 =0;

	Master_nSS_Con(1);		// Chip Select Inactive
}

void SPI_Port_Return(void)
{
	rGPECON=spi0_rGPECON;
	rGPEDAT=spi0_rGPEDAT;
	rGPEDN=spi0_rGPEDN;

	rGPGCON=spi1_rGPGCON;
	rGPGDAT=spi1_rGPGDAT;
	rGPGDN=spi1_rGPGDN;
}

void _Master_nSS_Con0(int Set)
{
	int i;

	rSPPIN0=(rSPPIN0&~(1<<1))|(Set<<1);
	Toggle();
//	for(i=0;i<5000;i++);
}


void _Master_nSS_Con1(int Set)
{
	int i;

	rSPPIN1=(rSPPIN1&~(1<<1))|(Set<<1);
	Toggle();
//	for(i=0;i<5000;i++);
}


///////////////////////////////////////////////////////////////////////////////////////////////////////////////
void Observer_Init(void)
{
	printf("Ovserver : GPG0 (GON12 p7)\n");
	rGPGDAT &= ~(1<<0);
  	rGPGCON=rGPGCON&~(3<<0)|(1<<0);  //GPG0=OutPut
   	rGPGDN &= ~(1<<0);
}

void Toggle(void)
{
	U32 dat;

	dat = ((rGPGDAT&0x1)^0x1);
	rGPGDAT = (rGPGDAT&~(0x1))|dat;
}

void MakeDPAT(void)
{
	U8 *ptr;
	U32 i;

	ptr=(char *)D_PAT0;
	for(i=0;i<88;i++) 	*(ptr+i) = (U8)(38+i);

	ptr=(char *)D_PAT1;
	for(i=0;i<88;i++)	*(ptr+i) = (U8)(126-i);

	ptr=(char *)D_PAT2;
	for(i=0;i<88;i+=2) {
		*(ptr+i) = (U8)(38+i+1);
		*(ptr+i+1) = (U8)(38+i);
		}

	ptr=(char *)D_PAT3;
	for(i=0;i<88;i+=2) {
		*(ptr+i) = (U8)(125-i-1);
		*(ptr+i+1) = (U8)(125-i);
		}

	*(char *)(D_PAT0+88) = '\0';
	*(char *)(D_PAT1+88) = '\0';
	*(char *)(D_PAT2+88) = '\0';
	*(char *)(D_PAT3+88) = '\0';
//	for(i=0;i<88;i++) printf("%c\t%c\t%c\t%c\n",*(U8 *)(D_PAT0+i),*(U8 *)(D_PAT1+i),*(U8 *)(D_PAT2+i),*(U8 *)(D_PAT3+i));
//  	for(i=0;i<88;i++) printf("%c",*(U8 *)(D_PAT0+i)); printf("\n");
//  	for(i=0;i<88;i++) printf("%c",*(U8 *)(D_PAT1+i)); printf("\n");
//  	for(i=0;i<88;i++) printf("%c",*(U8 *)(D_PAT2+i)); printf("\n");
//  	for(i=0;i<88;i++) printf("%c",*(U8 *)(D_PAT3+i)); printf("\n");

//    &'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}
//    ~}|{zyxwvutsrqponmlkjihgfedcba`_^]\[ZYXWVUTSRQPONMLKJIHGFEDCBA@?>=<;:9876543210/.-,+*)('
//    '&)(+*-,/.1032547698;:=<?>A@CBEDGFIHKJMLONQPSRUTWVYX[Z]\_^a`cbedgfihkjmlonqpsrutwvyx{z}|
//    |}z{xyvwturspqnolmjkhifgdebc`a^_\]Z[XYVWTURSPQNOLMJKHIFGDEBC@A>?<=:;8967452301./,-*+()&'
}

void ElaseRxReg(void)
{
	unsigned int * addr = (unsigned int*)_NONCACHE_STARTADDRESS;
	U32 i;
	
	for(i=0;i<0x6000;i+=4) {
		*addr++ = 0;
	}
}

void BufFlush(void)
{
	U8 data;
	U32 i;
	data = RdSPRDATB0();
	data = RdSPRDATB0();
	data = RdSPRDAT0();
	data = RdSPRDAT0();
	data = RdSPRDATB1();
	data = RdSPRDATB1();
	data = RdSPRDAT1();
	data = RdSPRDAT1();

	for(i=0;i<20;i++) data=RdSPRXFIFO0();
	for(i=0;i<20;i++) data=RdSPRXFIFO1();
}



void set_port ( SPI_port * port, int num ) {
	port->spi_con.direction = SPI_TX;
}