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<title>Digital Output (Embedded Target for Freescale 9S12)</title>
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<td bgcolor="#ffe4b0" valign="baseline"><b>Embedded Target for
Freescale 9S12 microcontrollers<br>
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<a name="180531"><font color="#990000" size="+3">Digital Output</font>
<!-- FNAME:ADC Input --></a><a name="180531"></a><a
name="hc12_ADC_In_blkref"></a><!-- H2 --><a name="180533"></a><br>
<p><a name="180534"></a>Driver for general purpose digital outputs<br>
</p>
<a name="library"></a><!-- H2 --><a name="180535"></a>
<p><font color="#990000" size="+1"><b>Library</b></font><br>
</p>
<p><a name="180536"></a>Real-Time mc9S12 Toolbox<br>
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<a name="description"></a><!-- H2 --><a name="180539"></a>
<p><font color="#990000" size="+1"><b>Description</b></font></p>
<p><font color="#990000" size="+1"><b><img src="mc9S12_DOUT_1.gif"
alt="" style="width: 107px; height: 70px;"></b></font><br>
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<p><a name="180540"></a>The Digital Output block controls the logic
level on up to 8 channels
of
data on any of 8 available general purpose digital I/O ports of the
9S12.
The number
of block inputs changes with the chosen number of digital output pins.<br>
</p>
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<p><font color="#990000" size="+1"><b>Dialog Box</b></font><br>
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<dl>
<a name="182791"></a><dt><b>Port</b></dt>
<a name="182792"></a><dd>Select any of 8 available ports: <code>PORTA</code>,
<code>PORTB</code>, <code>PTH</code>, <code>PTJ</code>, <code>PTM</code>,
<code>PTP</code>, <code>PTS</code> and <code>PTT</code>.<br>
</dd>
<a name="180546"></a><dt><b>Pin</b></dt>
<a name="180547"></a><dd>Specify the desired output pins (<code>0-7</code>).
Multiple pins can be specified as a vector. The block initialization
code ensures that only actually available pins can be chosen.<br>
</dd>
<a name="183014"></a><dt><b>Sample time</b></dt>
<a name="180701"></a><dd>Sample time for the block. To set a correct,
hardware-achieveable sample time, you should use the <span
style="font-family: monospace;">display timing signals</span><code></code>
option described in <span style="text-decoration: underline;">Determining
the base sample rate</span>.</dd>
</dl>
<a name="183014"></a><b><br>
On-Threshold (Von)</b>
<dl>
<a name="180701"></a><dd>Block input signals above this threshold are
interpreted as <code>logic high</code>. Choosing a value <code>Voff</code>
< <code>Von</code> causes the output characteristics of the
selected port to exhibit hysteresis.</dd>
</dl>
<a name="183014"></a><b><br>
</b><b>Off-Threshold (Voff)</b>
<dl>
<a name="180701"></a><dd>Block input signals below this threshold are
interpreted as <code>logic low</code>. Choosing a value <code>Voff</code>
< <code>Von</code> causes the output characteristics of the
selected port to exhibit hysteresis.</dd>
<dt><br>
</dt>
</dl>
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<td align="left"> Digital Input</td>
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