control.rpt

酒吧灯光控制工程在FPGA中的实现源代码

Project Information                                  f:\jlh\cotrol\control.rpt

MAX+plus II Compiler Report File
Version 10.0 9/14/2000
Compiled: 01/22/2005 22:19:12

Copyright (C) 1988-2000 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful




** DEVICE SUMMARY **

Chip/                     Input Output Bidir  Memory  Memory  			 LCs
POF       Device          Pins  Pins   Pins   Bits % Utilized  LCs  % Utilized

control   EP1K30QC208-3    32     47     48   0         0  %    292      16 %

User Pins:                 32     47     48 



Project Information                                  f:\jlh\cotrol\control.rpt

** PROJECT TIMING MESSAGES **

Warning: Timing characteristics of device EP1K30QC208-3 are preliminary


Project Information                                  f:\jlh\cotrol\control.rpt

** PIN/LOCATION/CHIP ASSIGNMENTS **

                  Actual                  
    User       Assignments                
Assignments   (if different)     Node Name

control@53                        A_ADDR00
control@54                        A_ADDR01
control@55                        A_ADDR02
control@56                        A_ADDR03
control@57                        A_ADDR04
control@58                        A_ADDR05
control@60                        A_ADDR06
control@61                        A_ADDR07
control@62                        A_ADDR08
control@63                        A_ADDR09
control@64                        A_ADDR10
control@65                        A_ADDR11
control@67                        A_ADDR12
control@68                        A_ADDR13
control@69                        A_DATA00
control@70                        A_DATA01
control@71                        A_DATA02
control@73                        A_DATA03
control@74                        A_DATA04
control@75                        A_DATA05
control@83                        A_DATA06
control@85                        A_DATA07
control@86                        A_DATA08
control@87                        A_DATA09
control@88                        A_DATA10
control@89                        A_DATA11
control@90                        A_DATA12
control@92                        A_DATA13
control@93                        A_DATA14
control@94                        A_DATA15
control@95                        A_DATA16
control@96                        A_DATA17
control@97                        A_DATA18
control@99                        A_DATA19
control@100                       A_DATA20
control@101                       A_DATA21
control@102                       A_DATA22
control@103                       A_DATA23
control@41                        A_OE
control@44                        A_WE
control@208                       B_ADDR00
control@207                       B_ADDR01
control@206                       B_ADDR02
control@205                       B_ADDR03
control@204                       B_ADDR04
control@203                       B_ADDR05
control@202                       B_ADDR06
control@200                       B_ADDR07
control@199                       B_ADDR08
control@198                       B_ADDR09
control@197                       B_ADDR10
control@196                       B_ADDR11
control@195                       B_ADDR12
control@193                       B_ADDR13
control@144                       BDATA0
control@192                       B_DATA00
control@150                       BDATA1
control@191                       B_DATA01
control@147                       BDATA2
control@190                       B_DATA02
control@122                       BDATA3
control@189                       B_DATA03
control@187                       B_DATA04
control@186                       B_DATA05
control@180                       B_DATA06
control@179                       B_DATA07
control@177                       B_DATA08
control@176                       B_DATA09
control@175                       B_DATA10
control@174                       B_DATA11
control@173                       B_DATA12
control@172                       B_DATA13
control@170                       B_DATA14
control@169                       B_DATA15
control@168                       B_DATA16
control@167                       B_DATA17
control@116                       B_DATA18
control@115                       B_DATA19
control@114                       B_DATA20
control@113                       B_DATA21
control@112                       B_DATA22
control@111                       B_DATA23
control@29                        BLUE00
control@30                        BLUE01
control@31                        BLUE02
control@36                        BLUE03
control@37                        BLUE04
control@38                        BLUE05
control@39                        BLUE06
control@40                        BLUE07
control@45                        B_OE
control@46                        B_WE
control@135                       CLK_OUT
control@79                        CLK50M
control@183                       DCLK
control@78                        DE
control@141                       EN
control@139                       GDATA0
control@142                       GDATA1
control@148                       GDATA2
control@128                       GDATA3
control@15                        GREEN00
control@17                        GREEN01
control@18                        GREEN02
control@24                        GREEN03
control@25                        GREEN04
control@26                        GREEN05
control@27                        GREEN06
control@28                        GREEN07
control@182                       HS
control@136                       LATCH_OUT
control@80                        MCU_CLK
control@47                        MCU_DATA
control@163                       MCU_LATCH
control@140                       RDATA0
control@143                       RDATA1
control@149                       RDATA2
control@134                       RDATA3
control@7                         RED00
control@8                         RED01