init.s

这是基于三星公司的S3C2410芯片中外部中断的应用.

SRCPND       EQU  0x4a000000    ;Interrupt request status
INTMOD       EQU  0x4a000004    ;Interrupt mode control
INTMSK       EQU  0x4a000008    ;Interrupt mask control
PRIORITY     EQU  0x4a00000a    ;IRQ priority control
INTPND       EQU  0x4a000010    ;Interrupt request status
INTOFFSET    EQU  0x4a000014    ;Interruot request source offset
SUSSRCPND    EQU  0x4a000018    ;Sub source pending
INTSUBMSK    EQU  0x4a00001c    ;Interrupt sub mask
	
	;=================
	; WATCH DOG TIMER
	;=================
WTCON     EQU  0x53000000       ;Watch-dog timer mode
WTDAT     EQU  0x53000004       ;Watch-dog timer data
WTCNT     EQU  0x53000008       ;Eatch-dog timer count

SDRAM_END EQU	0x34000000	
_ISR_STARTADDRESS	EQU (SDRAM_END-0x100)	;0x33ffff00	
	
		MACRO
$HandlerLabel HANDLER $HandleLabel

$HandlerLabel
	sub	sp,sp,#4        ;decrement sp(to store jump address)
	stmfd	sp!,{r0}        ;PUSH the work register to stack(lr does't push because it return to original address)
	ldr     r0,=$HandleLabel;load the address of HandleXXX to r0
	ldr     r0,[r0]         ;load the contents(service routine start address) of HandleXXX
	str     r0,[sp,#4]      ;store the contents(ISR) of HandleXXX to stack
	ldmfd   sp!,{r0,pc}     ;POP the work register and pc(jump to ISR)
	MEND
	

	IMPORT  |Image$$RO$$Limit|  ; End of ROM code (=start of ROM data)
	IMPORT  |Image$$RW$$Base|   ; Base of RAM to initialise
	IMPORT  |Image$$ZI$$Base|   ; Base and limit of area
	IMPORT  |Image$$ZI$$Limit|  ; to zero initialise
	
	
	
	
	IMPORT Main1
	
	
	
	AREA RamData, DATA, READWRITE

        ^   _ISR_STARTADDRESS
HandleReset 	#   4
HandleUndef 	#   4
HandleSWI   	#   4
HandlePabort    #   4
HandleDabort    #   4
HandleReserved  #   4
HandleIRQ   	#   4
HandleFIQ   	#   4

;Don't use the label 'IntVectorTable',
;The value of IntVectorTable is different with the address you think it may be.
;IntVectorTable
HandleEINT0   	#   4
HandleEINT1   	#   4
HandleEINT2   	#   4
HandleEINT3   	#   4
HandleEINT4_7	#   4
HandleEINT8_23	#   4
HandleRSV6	#   4
HandleBATFLT   	#   4
HandleTICK   	#   4
HandleWDT	#   4
HandleTIMER0 	#   4
HandleTIMER1 	#   4
HandleTIMER2 	#   4
HandleTIMER3 	#   4
HandleTIMER4 	#   4
HandleUART2  	#   4
HandleLCD 	#   4
HandleDMA0	#   4
HandleDMA1	#   4
HandleDMA2	#   4
HandleDMA3	#   4
HandleMMC	#   4
HandleSPI0	#   4
HandleUART1	#   4
HandleRSV24	#   4
HandleUSBD	#   4
HandleUSBH	#   4
HandleIIC   	#   4
HandleUART0 	#   4
HandleSPI1 	#   4
HandleRTC 	#   4
HandleADC 	#   4

       

	
	
	
	AREA Init,CODE,READONLY
	ENTRY
_start
	b RESET
	B	.
	B	.
	B	.
	B	.
	B	.
	B	HandlerIRQ
	B	.
	

	LTORG   
;HandlerFIQ      HANDLER HandleFIQ
HandlerIRQ      HANDLER HandleIRQ
;HandlerUndef    HANDLER HandleUndef
;HandlerSWI      HANDLER HandleSWI
;HandlerDabort   HANDLER HandleDabort
;HandlerPabort   HANDLER HandlePabort

IsrIRQ  
	sub	sp,sp,#4       ;reserved for PC
	stmfd	sp!,{r8-r9}   
	
	ldr	r9,=INTOFFSET
	ldr	r9,[r9]
	ldr	r8,=HandleEINT0
	add	r8,r8,r9,lsl #2
	ldr	r8,[r8]
	str	r8,[sp,#8]
	ldmfd	sp!,{r8-r9,pc}
	
	
	
RESET
	ldr	r0,=WTCON       ;watch dog disable 
	ldr	r1,=0x0         
	str	r1,[r0]

	ldr	r0,=INTMSK
	ldr	r1,=0xffffffff  ;all interrupt disable
	str	r1,[r0]

	ldr	r0,=INTSUBMSK
	ldr	r1,=0x3ff		;all sub interrupt disable
	str	r1,[r0]
	
	bl MemCFG
	
	; Setup IRQ handler
	ldr	r0,=HandleIRQ       ;This routine is needed
	ldr	r1,=IsrIRQ          ;if there isn't 'subs pc,lr,#4' at 0x18, 0x1c
	str	r1,[r0]
	
	
		;Copy and paste RW data/zero initialized data
	ldr	r0, =|Image$$RO$$Limit| ; Get pointer to ROM data
	ldr	r1, =|Image$$RW$$Base|  ; and RAM copy
	ldr	r3, =|Image$$ZI$$Base|  
	
	;Zero init base => top of initialised data
	cmp	r0, r1      ; Check that they are different
	beq	%F2
1       
	cmp	r1, r3      ; Copy init data
	ldrcc	r2, [r0], #4    ;--> LDRCC r2, [r0] + ADD r0, r0, #4         
	strcc	r2, [r1], #4    ;--> STRCC r2, [r1] + ADD r1, r1, #4
	bcc	%B1
2       
	ldr	r1, =|Image$$ZI$$Limit| ; Top of zero init segment
	mov	r2, #0
3       
	cmp	r3, r1      ; Zero init
	strcc	r2, [r3], #4
	bcc	%B3
	
	b Main1
	
MemCFG
	;CONFIG BANK
	LDR R0,=0x48000000
	LDR R1,=0x22111120
	STR R1,[R0]
	LDR R0,=0x48000004
	LDR R1,=0x00000700
	STR R1,[R0]
	LDR R0,=0x48000008
	LDR R1,=0x00000700
	STR R1,[R0]
	LDR R0,=0x4800000C
	LDR R1,=0x00000700
	STR R1,[R0]
	LDR R0,=0x48000010
	LDR R1,=0x1f7c
	STR R1,[R0]
	LDR R0,=0x48000014
	LDR R1,=0x00000700
	STR R1,[R0]
	LDR R0,=0x48000018
	LDR R1,=0x00000700
	STR R1,[R0]
	LDR R0,=0x4800001C
	LDR R1,=0x00018005
	STR R1,[R0]
	LDR R0,=0x48000020
	LDR R1,=0x00018005
	STR R1,[R0]
	LDR R0,=0x48000024
	LDR R1,=0x00830459
	STR R1,[R0]
	LDR R0,=0x48000028
	LDR R1,=0x00000032
	STR R1,[R0]
	LDR R0,=0x4800002C
	LDR R1,=0x00000030
	STR R1,[R0]
	LDR R0,=0x48000030
	LDR R1,=0x00000030
	STR R1,[R0]
	MOV PC,LR
	END