📄 sa1.cpp
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/******************************************************************************* Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. (c) Copyright 1996 - 2002 Gary Henderson (gary.henderson@ntlworld.com) and Jerremy Koot (jkoot@snes9x.com) (c) Copyright 2001 - 2004 John Weidman (jweidman@slip.net) (c) Copyright 2002 - 2004 Brad Jorsch (anomie@users.sourceforge.net), funkyass (funkyass@spam.shaw.ca), Joel Yliluoma (http://iki.fi/bisqwit/) Kris Bleakley (codeviolation@hotmail.com), Matthew Kendora, Nach (n-a-c-h@users.sourceforge.net), Peter Bortas (peter@bortas.org) and zones (kasumitokoduck@yahoo.com) C4 x86 assembler and some C emulation code (c) Copyright 2000 - 2003 zsKnight (zsknight@zsnes.com), _Demo_ (_demo_@zsnes.com), and Nach C4 C++ code (c) Copyright 2003 Brad Jorsch DSP-1 emulator code (c) Copyright 1998 - 2004 Ivar (ivar@snes9x.com), _Demo_, Gary Henderson, John Weidman, neviksti (neviksti@hotmail.com), Kris Bleakley, Andreas Naive DSP-2 emulator code (c) Copyright 2003 Kris Bleakley, John Weidman, neviksti, Matthew Kendora, and Lord Nightmare (lord_nightmare@users.sourceforge.net OBC1 emulator code (c) Copyright 2001 - 2004 zsKnight, pagefault (pagefault@zsnes.com) and Kris Bleakley Ported from x86 assembler to C by sanmaiwashi SPC7110 and RTC C++ emulator code (c) Copyright 2002 Matthew Kendora with research by zsKnight, John Weidman, and Dark Force S-DD1 C emulator code (c) Copyright 2003 Brad Jorsch with research by Andreas Naive and John Weidman S-RTC C emulator code (c) Copyright 2001 John Weidman ST010 C++ emulator code (c) Copyright 2003 Feather, Kris Bleakley, John Weidman and Matthew Kendora Super FX x86 assembler emulator code (c) Copyright 1998 - 2003 zsKnight, _Demo_, and pagefault Super FX C emulator code (c) Copyright 1997 - 1999 Ivar, Gary Henderson and John Weidman SH assembler code partly based on x86 assembler code (c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se) Specific ports contains the works of other authors. See headers in individual files. Snes9x homepage: http://www.snes9x.com Permission to use, copy, modify and distribute Snes9x in both binary and source form, for non-commercial purposes, is hereby granted without fee, providing that this license information and copyright notice appear with all copies and any derived work. This software is provided 'as-is', without any express or implied warranty. In no event shall the authors be held liable for any damages arising from the use of this software. Snes9x is freeware for PERSONAL USE only. Commercial users should seek permission of the copyright holders first. Commercial use includes charging money for Snes9x or software derived from Snes9x. The copyright holders request that bug fixes and improvements to the code should be forwarded to them so everyone can benefit from the modifications in future versions. Super NES and Super Nintendo Entertainment System are trademarks of Nintendo Co., Limited and its subsidiary companies.*******************************************************************************/#include "snes9x.h"#include "ppu.h"#include "cpuexec.h"#include "sa1.h"static void S9xSA1CharConv2 ();static void S9xSA1DMA ();static void S9xSA1ReadVariableLengthData (bool8 inc, bool8 no_shift);void S9xSA1Init (){ SA1.NMIActive = FALSE; SA1.IRQActive = FALSE; SA1.WaitingForInterrupt = FALSE; SA1.Waiting = FALSE; SA1.Flags = 0; SA1.Executing = FALSE; memset (&Memory.FillRAM [0x2200], 0, 0x200); Memory.FillRAM [0x2200] = 0x20; Memory.FillRAM [0x2220] = 0x00; Memory.FillRAM [0x2221] = 0x01; Memory.FillRAM [0x2222] = 0x02; Memory.FillRAM [0x2223] = 0x03; Memory.FillRAM [0x2228] = 0xff; SA1.op1 = 0; SA1.op2 = 0; SA1.arithmetic_op = 0; SA1.sum = 0; SA1.overflow = FALSE; SA1.S9xOpcodes=NULL;}void S9xSA1Reset (){ SA1Registers.PB = 0; SA1Registers.PC = Memory.FillRAM [0x2203] | (Memory.FillRAM [0x2204] << 8); SA1Registers.D.W = 0; SA1Registers.DB = 0; SA1Registers.SH = 1; SA1Registers.SL = 0xFF; SA1Registers.XH = 0; SA1Registers.YH = 0; SA1Registers.P.W = 0; SA1.ShiftedPB = 0; SA1.ShiftedDB = 0; SA1SetFlags (MemoryFlag | IndexFlag | IRQ | Emulation); SA1ClearFlags (Decimal); SA1.WaitingForInterrupt = FALSE; SA1.PC = NULL; SA1.PCBase = NULL; S9xSA1SetPCBase (SA1Registers.PC); SA1.S9xOpcodes = S9xSA1OpcodesM1X1; S9xSA1UnpackStatus(); S9xSA1FixCycles (); SA1.Executing = TRUE; SA1.BWRAM = Memory.SRAM; Memory.FillRAM [0x2225] = 0;}void S9xSA1SetBWRAMMemMap (uint8 val){ int c; if (val & 0x80) { for (c = 0; c < 0x400; c += 16) { SA1.Map [c + 6] = SA1.Map [c + 0x806] = (uint8 *) CMemory::MAP_BWRAM_BITMAP2; SA1.Map [c + 7] = SA1.Map [c + 0x807] = (uint8 *) CMemory::MAP_BWRAM_BITMAP2; SA1.WriteMap [c + 6] = SA1.WriteMap [c + 0x806] = (uint8 *) CMemory::MAP_BWRAM_BITMAP2; SA1.WriteMap [c + 7] = SA1.WriteMap [c + 0x807] = (uint8 *) CMemory::MAP_BWRAM_BITMAP2; } SA1.BWRAM = Memory.SRAM + (val & 0x7f) * 0x2000 / 4; } else { for (c = 0; c < 0x400; c += 16) { SA1.Map [c + 6] = SA1.Map [c + 0x806] = (uint8 *) CMemory::MAP_BWRAM; SA1.Map [c + 7] = SA1.Map [c + 0x807] = (uint8 *) CMemory::MAP_BWRAM; SA1.WriteMap [c + 6] = SA1.WriteMap [c + 0x806] = (uint8 *) CMemory::MAP_BWRAM; SA1.WriteMap [c + 7] = SA1.WriteMap [c + 0x807] = (uint8 *) CMemory::MAP_BWRAM; } SA1.BWRAM = Memory.SRAM + (val & 7) * 0x2000; }}void S9xFixSA1AfterSnapshotLoad (){ SA1.ShiftedPB = (uint32) SA1Registers.PB << 16; SA1.ShiftedDB = (uint32) SA1Registers.DB << 16; S9xSA1SetPCBase (SA1.ShiftedPB + SA1Registers.PC); S9xSA1UnpackStatus (); S9xSA1FixCycles (); SA1.VirtualBitmapFormat = (Memory.FillRAM [0x223f] & 0x80) ? 2 : 4; Memory.BWRAM = Memory.SRAM + (Memory.FillRAM [0x2224] & 7) * 0x2000; S9xSA1SetBWRAMMemMap (Memory.FillRAM [0x2225]); SA1.Waiting = (Memory.FillRAM [0x2200] & 0x60) != 0; SA1.Executing = !SA1.Waiting;}uint8 S9xSA1GetByte (uint32 address){ uint8 *GetAddress = SA1.Map [(address >> MEMMAP_SHIFT) & MEMMAP_MASK]; if (GetAddress >= (uint8 *) CMemory::MAP_LAST) return (*(GetAddress + (address & 0xffff))); switch ((int) GetAddress) { case CMemory::MAP_PPU: return (S9xGetSA1 (address & 0xffff)); case CMemory::MAP_LOROM_SRAM: case CMemory::MAP_SA1RAM: return (*(Memory.SRAM + (address & 0xffff))); case CMemory::MAP_BWRAM: return (*(SA1.BWRAM + ((address & 0x7fff) - 0x6000))); case CMemory::MAP_BWRAM_BITMAP: address -= 0x600000; if (SA1.VirtualBitmapFormat == 2) return ((Memory.SRAM [(address >> 2) & 0xffff] >> ((address & 3) << 1)) & 3); else return ((Memory.SRAM [(address >> 1) & 0xffff] >> ((address & 1) << 2)) & 15); case CMemory::MAP_BWRAM_BITMAP2: address = (address & 0xffff) - 0x6000; if (SA1.VirtualBitmapFormat == 2) return ((SA1.BWRAM [(address >> 2) & 0xffff] >> ((address & 3) << 1)) & 3); else return ((SA1.BWRAM [(address >> 1) & 0xffff] >> ((address & 1) << 2)) & 15); case CMemory::MAP_DEBUG: default:#ifdef DEBUGGER// printf ("R(B) %06x\n", address);#endif return OpenBus; }}uint16 S9xSA1GetWord (uint32 address){ OpenBus = S9xSA1GetByte (address); return (OpenBus | (S9xSA1GetByte (address + 1) << 8));}void S9xSA1SetByte (uint8 byte, uint32 address){ uint8 *Setaddress = SA1.WriteMap [(address >> MEMMAP_SHIFT) & MEMMAP_MASK]; if (Setaddress >= (uint8 *) CMemory::MAP_LAST) { *(Setaddress + (address & 0xffff)) = byte; return; } switch ((int) Setaddress) { case CMemory::MAP_PPU: S9xSetSA1 (byte, address & 0xffff); return; case CMemory::MAP_SA1RAM: case CMemory::MAP_LOROM_SRAM: *(Memory.SRAM + (address & 0xffff)) = byte; return; case CMemory::MAP_BWRAM: *(SA1.BWRAM + ((address & 0x7fff) - 0x6000)) = byte; return; case CMemory::MAP_BWRAM_BITMAP: address -= 0x600000; if (SA1.VirtualBitmapFormat == 2) { uint8 *ptr = &Memory.SRAM [(address >> 2) & 0xffff]; *ptr &= ~(3 << ((address & 3) << 1)); *ptr |= (byte & 3) << ((address & 3) << 1); } else { uint8 *ptr = &Memory.SRAM [(address >> 1) & 0xffff]; *ptr &= ~(15 << ((address & 1) << 2)); *ptr |= (byte & 15) << ((address & 1) << 2); } break; case CMemory::MAP_BWRAM_BITMAP2: address = (address & 0xffff) - 0x6000; if (SA1.VirtualBitmapFormat == 2) { uint8 *ptr = &SA1.BWRAM [(address >> 2) & 0xffff]; *ptr &= ~(3 << ((address & 3) << 1)); *ptr |= (byte & 3) << ((address & 3) << 1); } else { uint8 *ptr = &SA1.BWRAM [(address >> 1) & 0xffff]; *ptr &= ~(15 << ((address & 1) << 2)); *ptr |= (byte & 15) << ((address & 1) << 2); } default: return; }}void S9xSA1SetWord (uint16 Word, uint32 address){ S9xSA1SetByte ((uint8) Word, address); S9xSA1SetByte ((uint8) (Word >> 8), address + 1);}void S9xSA1SetPCBase (uint32 address){ uint8 *GetAddress = SA1.Map [(address >> MEMMAP_SHIFT) & MEMMAP_MASK]; if (GetAddress >= (uint8 *) CMemory::MAP_LAST) { SA1.PCBase = GetAddress; SA1.PC = GetAddress + (address & 0xffff); return; } switch ((int) GetAddress) { case CMemory::MAP_PPU: SA1.PCBase = Memory.FillRAM - 0x2000; SA1.PC = SA1.PCBase + (address & 0xffff); return; case CMemory::MAP_CPU: SA1.PCBase = Memory.FillRAM - 0x4000; SA1.PC = SA1.PCBase + (address & 0xffff); return; case CMemory::MAP_DSP: SA1.PCBase = Memory.FillRAM - 0x6000; SA1.PC = SA1.PCBase + (address & 0xffff); return; case CMemory::MAP_SA1RAM: case CMemory::MAP_LOROM_SRAM: SA1.PCBase = Memory.SRAM; SA1.PC = SA1.PCBase + (address & 0xffff); return; case CMemory::MAP_BWRAM: SA1.PCBase = SA1.BWRAM - 0x6000; SA1.PC = SA1.PCBase + (address & 0xffff); return; case CMemory::MAP_HIROM_SRAM: SA1.PCBase = Memory.SRAM - 0x6000; SA1.PC = SA1.PCBase + (address & 0xffff); return; case CMemory::MAP_DEBUG:#ifdef DEBUGGER printf ("SBP %06x\n", address);#endif default: case CMemory::MAP_NONE: SA1.PCBase = Memory.RAM; SA1.PC = Memory.RAM + (address & 0xffff); return; }}void S9xSA1ExecuteDuringSleep (){#if 0 if (SA1.Executing) { while (CPU.Cycles < CPU.NextEvent) { S9xSA1MainLoop (); CPU.Cycles += TWO_CYCLES * 2; } }#endif}void S9xSetSA1MemMap (uint32 which1, uint8 map){ int c; int start = which1 * 0x100 + 0xc00; int start2 = which1 * 0x200; if (which1 >= 2) start2 += 0x400; for (c = 0; c < 0x100; c += 16) { uint8 *block = &Memory.ROM [(map & 7) * 0x100000 + (c << 12)]; int i; for (i = c; i < c + 16; i++) Memory.Map [start + i] = SA1.Map [start + i] = block; } for (c = 0; c < 0x200; c += 16) { uint8 *block = &Memory.ROM [(map & 7) * 0x100000 + (c << 11) - 0x8000]; int i; for (i = c + 8; i < c + 16; i++) Memory.Map [start2 + i] = SA1.Map [start2 + i] = block; }}uint8 S9xGetSA1 (uint32 address){// printf ("R: %04x\n", address); switch (address) { case 0x2300: return ((uint8) ((Memory.FillRAM [0x2209] & 0x5f) | (CPU.IRQActive & (SA1_IRQ_SOURCE | SA1_DMA_IRQ_SOURCE)))); case 0x2301: return ((Memory.FillRAM [0x2200] & 0xf) | (Memory.FillRAM [0x2301] & 0xf0)); case 0x2306: return ((uint8) SA1.sum); case 0x2307: return ((uint8) (SA1.sum >> 8)); case 0x2308: return ((uint8) (SA1.sum >> 16)); case 0x2309: return ((uint8) (SA1.sum >> 24)); case 0x230a: return ((uint8) (SA1.sum >> 32)); case 0x230c: return (Memory.FillRAM [0x230c]); case 0x230d: { uint8 byte = Memory.FillRAM [0x230d]; if (Memory.FillRAM [0x2258] & 0x80) { S9xSA1ReadVariableLengthData (TRUE, FALSE); } return (byte); } default: printf ("R: %04x\n", address); break; } return (Memory.FillRAM [address]);}void S9xSetSA1 (uint8 byte, uint32 address){//printf ("W: %02x -> %04x\n", byte, address); switch (address) { case 0x2200: SA1.Waiting = (byte & 0x60) != 0;// SA1.Executing = !SA1.Waiting && SA1.S9xOpcodes; if (!(byte & 0x20) && (Memory.FillRAM [0x2200] & 0x20)) { S9xSA1Reset (); } if (byte & 0x80) { Memory.FillRAM [0x2301] |= 0x80; if (Memory.FillRAM [0x220a] & 0x80) { SA1.Flags |= IRQ_PENDING_FLAG; SA1.IRQActive |= SNES_IRQ_SOURCE; SA1.Executing = !SA1.Waiting && SA1.S9xOpcodes; } } if (byte & 0x10) { Memory.FillRAM [0x2301] |= 0x10;#ifdef DEBUGGER printf ("###SA1 NMI\n");#endif if (Memory.FillRAM [0x220a] & 0x10) { } }
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