📄 ppu.cpp
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/******************************************************************************* Snes9x - Portable Super Nintendo Entertainment System (TM) emulator. (c) Copyright 1996 - 2002 Gary Henderson (gary.henderson@ntlworld.com) and Jerremy Koot (jkoot@snes9x.com) (c) Copyright 2001 - 2004 John Weidman (jweidman@slip.net) (c) Copyright 2002 - 2004 Brad Jorsch (anomie@users.sourceforge.net), funkyass (funkyass@spam.shaw.ca), Joel Yliluoma (http://iki.fi/bisqwit/) Kris Bleakley (codeviolation@hotmail.com), Matthew Kendora, Nach (n-a-c-h@users.sourceforge.net), Peter Bortas (peter@bortas.org) and zones (kasumitokoduck@yahoo.com) C4 x86 assembler and some C emulation code (c) Copyright 2000 - 2003 zsKnight (zsknight@zsnes.com), _Demo_ (_demo_@zsnes.com), and Nach C4 C++ code (c) Copyright 2003 Brad Jorsch DSP-1 emulator code (c) Copyright 1998 - 2004 Ivar (ivar@snes9x.com), _Demo_, Gary Henderson, John Weidman, neviksti (neviksti@hotmail.com), Kris Bleakley, Andreas Naive DSP-2 emulator code (c) Copyright 2003 Kris Bleakley, John Weidman, neviksti, Matthew Kendora, and Lord Nightmare (lord_nightmare@users.sourceforge.net OBC1 emulator code (c) Copyright 2001 - 2004 zsKnight, pagefault (pagefault@zsnes.com) and Kris Bleakley Ported from x86 assembler to C by sanmaiwashi SPC7110 and RTC C++ emulator code (c) Copyright 2002 Matthew Kendora with research by zsKnight, John Weidman, and Dark Force S-DD1 C emulator code (c) Copyright 2003 Brad Jorsch with research by Andreas Naive and John Weidman S-RTC C emulator code (c) Copyright 2001 John Weidman ST010 C++ emulator code (c) Copyright 2003 Feather, Kris Bleakley, John Weidman and Matthew Kendora Super FX x86 assembler emulator code (c) Copyright 1998 - 2003 zsKnight, _Demo_, and pagefault Super FX C emulator code (c) Copyright 1997 - 1999 Ivar, Gary Henderson and John Weidman SH assembler code partly based on x86 assembler code (c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se) Specific ports contains the works of other authors. See headers in individual files. Snes9x homepage: http://www.snes9x.com Permission to use, copy, modify and distribute Snes9x in both binary and source form, for non-commercial purposes, is hereby granted without fee, providing that this license information and copyright notice appear with all copies and any derived work. This software is provided 'as-is', without any express or implied warranty. In no event shall the authors be held liable for any damages arising from the use of this software. Snes9x is freeware for PERSONAL USE only. Commercial users should seek permission of the copyright holders first. Commercial use includes charging money for Snes9x or software derived from Snes9x. The copyright holders request that bug fixes and improvements to the code should be forwarded to them so everyone can benefit from the modifications in future versions. Super NES and Super Nintendo Entertainment System are trademarks of Nintendo Co., Limited and its subsidiary companies.*******************************************************************************/#include "snes9x.h"#include "memmap.h"#include "ppu.h"#include "cpuexec.h"#include "missing.h"#include "apu.h"#include "dma.h"#include "gfx.h"#include "display.h"#include "sa1.h"#include "netplay.h"#include "sdd1.h"#include "srtc.h"#include "spc7110.h"#include "movie.h"#ifndef ZSNES_FX#include "fxemu.h"#include "fxinst.h"extern struct FxInit_s SuperFX;#elseEXTERN_C void S9xSuperFXWriteReg (uint8, uint32);EXTERN_C uint8 S9xSuperFXReadReg (uint32);#endifuint32 justifiers=0xFFFF00AA;uint8 in_bit=0;extern uint8 *HDMAMemPointers [8];static inline void S9xLatchCounters (bool force){ if(!force && !(Memory.FillRAM[0x4213] & 0x80)) return; // Latch h and v counters, like the gun#ifdef DEBUGGER missing.h_v_latch = 1;#endif#if 0# ifdef CPU_SHUTDOWN CPU.WaitAddress = CPU.PCAtOpcodeStart;# endif#endif PPU.HVBeamCounterLatched = 1; PPU.VBeamPosLatched = (uint16) CPU.V_Counter; PPU.HBeamPosLatched = (uint16) ((CPU.Cycles * SNES_HCOUNTER_MAX) / Settings.H_Max); // Causes screen flicker for Yoshi's Island if uncommented //CLEAR_IRQ_SOURCE (PPU_V_BEAM_IRQ_SOURCE | PPU_H_BEAM_IRQ_SOURCE); Memory.FillRAM [0x213F] |= 0x40;}void S9xUpdateJustifiers();void S9xUpdateHTimer (){ if (PPU.HTimerEnabled) {#ifdef DEBUGGER missing.hirq_pos = PPU.IRQHBeamPos;#endif PPU.HTimerPosition = PPU.IRQHBeamPos * Settings.H_Max / SNES_HCOUNTER_MAX; if (PPU.HTimerPosition == Settings.H_Max || PPU.HTimerPosition == Settings.HBlankStart) { PPU.HTimerPosition--; } if (!PPU.VTimerEnabled || CPU.V_Counter == PPU.IRQVBeamPos) { if (PPU.HTimerPosition < CPU.Cycles) { // Missed the IRQ on this line already if (CPU.WhichEvent == HBLANK_END_EVENT || CPU.WhichEvent == HTIMER_AFTER_EVENT) { CPU.WhichEvent = HBLANK_END_EVENT; CPU.NextEvent = Settings.H_Max; } else { CPU.WhichEvent = HBLANK_START_EVENT; CPU.NextEvent = Settings.HBlankStart; } } else { if (CPU.WhichEvent == HTIMER_BEFORE_EVENT || CPU.WhichEvent == HBLANK_START_EVENT) { if (PPU.HTimerPosition > Settings.HBlankStart) { // HTimer was to trigger before h-blank start, // now triggers after start of h-blank CPU.NextEvent = Settings.HBlankStart; CPU.WhichEvent = HBLANK_START_EVENT; } else { CPU.NextEvent = PPU.HTimerPosition; CPU.WhichEvent = HTIMER_BEFORE_EVENT; } } else { CPU.WhichEvent = HTIMER_AFTER_EVENT; CPU.NextEvent = PPU.HTimerPosition; } } } }}void S9xFixColourBrightness (){ IPPU.XB = mul_brightness [PPU.Brightness]; if (Settings.SixteenBit) { for (int i = 0; i < 256; i++) { IPPU.Red [i] = IPPU.XB [PPU.CGDATA [i] & 0x1f]; IPPU.Green [i] = IPPU.XB [(PPU.CGDATA [i] >> 5) & 0x1f]; IPPU.Blue [i] = IPPU.XB [(PPU.CGDATA [i] >> 10) & 0x1f]; IPPU.ScreenColors [i] = BUILD_PIXEL (IPPU.Red [i], IPPU.Green [i], IPPU.Blue [i]); } }}/******************************************************************************//* S9xSetPPU() *//* This function sets a PPU Register to a specific byte *//******************************************************************************/void S9xSetPPU (uint8 Byte, uint16 Address){// fprintf(stderr, "%03d: %02x to %04x\n", CPU.V_Counter, Byte, Address); if (Address <= 0x2183) { switch (Address) { case 0x2100: // Brightness and screen blank bit if (Byte != Memory.FillRAM [0x2100]) { FLUSH_REDRAW (); if (PPU.Brightness != (Byte & 0xF)) { IPPU.ColorsChanged = TRUE; IPPU.DirectColourMapsNeedRebuild = TRUE; PPU.Brightness = Byte & 0xF; S9xFixColourBrightness (); if (PPU.Brightness > IPPU.MaxBrightness) IPPU.MaxBrightness = PPU.Brightness; } if ((Memory.FillRAM[0x2100] & 0x80) != (Byte & 0x80)) { IPPU.ColorsChanged = TRUE; PPU.ForcedBlanking = (Byte >> 7) & 1; } } break; case 0x2101: // Sprite (OBJ) tile address if (Byte != Memory.FillRAM [0x2101]) { FLUSH_REDRAW (); PPU.OBJNameBase = (Byte & 3) << 14; PPU.OBJNameSelect = ((Byte >> 3) & 3) << 13; PPU.OBJSizeSelect = (Byte >> 5) & 7; IPPU.OBJChanged = TRUE; } break; case 0x2102: // Sprite write address (low) PPU.OAMAddr = ((Memory.FillRAM[0x2103]&1)<<8) | Byte; PPU.OAMFlip = 2; PPU.OAMReadFlip = 0; PPU.SavedOAMAddr = PPU.OAMAddr; if (PPU.OAMPriorityRotation && PPU.FirstSprite != (PPU.OAMAddr >> 1)) { PPU.FirstSprite = (PPU.OAMAddr&0xFE) >> 1; IPPU.OBJChanged = TRUE;#ifdef DEBUGGER missing.sprite_priority_rotation = 1;#endif } break; case 0x2103: // Sprite register write address (high), sprite priority rotation // bit. PPU.OAMAddr = ((Byte&1)<<8) | Memory.FillRAM[0x2102]; PPU.OAMPriorityRotation=(Byte & 0x80)? 1 : 0; if (PPU.OAMPriorityRotation) { if (PPU.FirstSprite != (PPU.OAMAddr >> 1)) { PPU.FirstSprite = (PPU.OAMAddr&0xFE) >> 1; IPPU.OBJChanged = TRUE;#ifdef DEBUGGER missing.sprite_priority_rotation = 1;#endif } } else { if (PPU.FirstSprite != 0) { PPU.FirstSprite = 0; IPPU.OBJChanged = TRUE;#ifdef DEBUGGER missing.sprite_priority_rotation = 1;#endif } } PPU.OAMFlip = 0; PPU.OAMReadFlip = 0; PPU.SavedOAMAddr = PPU.OAMAddr; break; case 0x2104: // Sprite register write REGISTER_2104(Byte); break; case 0x2105: // Screen mode (0 - 7), background tile sizes and background 3 // priority if (Byte != Memory.FillRAM [0x2105]) { FLUSH_REDRAW (); PPU.BG[0].BGSize = (Byte >> 4) & 1; PPU.BG[1].BGSize = (Byte >> 5) & 1; PPU.BG[2].BGSize = (Byte >> 6) & 1; PPU.BG[3].BGSize = (Byte >> 7) & 1; PPU.BGMode = Byte & 7; // BJ: BG3Priority only takes effect if BGMode==1 and the bit is set PPU.BG3Priority = ((Byte & 0x0f) == 0x09);#ifdef DEBUGGER missing.modes[PPU.BGMode] = 1;#endif if(PPU.BGMode==5||PPU.BGMode==6) IPPU.Interlace = Memory.FillRAM[0x2133]&1; } break; case 0x2106: // Mosaic pixel size and enable if (Byte != Memory.FillRAM [0x2106]) { FLUSH_REDRAW ();#ifdef DEBUGGER if ((Byte & 0xf0) && (Byte & 0x0f)) missing.mosaic = 1;#endif PPU.Mosaic = (Byte >> 4) + 1; PPU.BGMosaic [0] = (Byte & 1) && PPU.Mosaic > 1; PPU.BGMosaic [1] = (Byte & 2) && PPU.Mosaic > 1; PPU.BGMosaic [2] = (Byte & 4) && PPU.Mosaic > 1; PPU.BGMosaic [3] = (Byte & 8) && PPU.Mosaic > 1; } break; case 0x2107: // [BG0SC] if (Byte != Memory.FillRAM [0x2107]) { FLUSH_REDRAW (); PPU.BG[0].SCSize = Byte & 3; PPU.BG[0].SCBase = (Byte & 0x7c) << 8; } break; case 0x2108: // [BG1SC] if (Byte != Memory.FillRAM [0x2108]) { FLUSH_REDRAW (); PPU.BG[1].SCSize = Byte & 3; PPU.BG[1].SCBase = (Byte & 0x7c) << 8; } break; case 0x2109: // [BG2SC] if (Byte != Memory.FillRAM [0x2109]) { FLUSH_REDRAW (); PPU.BG[2].SCSize = Byte & 3; PPU.BG[2].SCBase = (Byte & 0x7c) << 8; } break; case 0x210A: // [BG3SC] if (Byte != Memory.FillRAM [0x210a]) { FLUSH_REDRAW (); PPU.BG[3].SCSize = Byte & 3; PPU.BG[3].SCBase = (Byte & 0x7c) << 8; } break; case 0x210B: // [BG01NBA] if (Byte != Memory.FillRAM [0x210b]) { FLUSH_REDRAW (); PPU.BG[0].NameBase = (Byte & 7) << 12; PPU.BG[1].NameBase = ((Byte >> 4) & 7) << 12; } break; case 0x210C: // [BG23NBA] if (Byte != Memory.FillRAM [0x210c]) { FLUSH_REDRAW (); PPU.BG[2].NameBase = (Byte & 7) << 12; PPU.BG[3].NameBase = ((Byte >> 4) & 7) << 12; } break; //This is the Theme Park fix - it appears all these registers //share a previous byte value for setting them. case 0x210D: //TEST9 if(last_written != 0x210d) PPU.BGnxOFSbyte = 0; PPU.BG[0].HOffset = (Byte<<8) | PPU.BGnxOFSbyte; PPU.BGnxOFSbyte = Byte; // fprintf(stderr, "%02x to %04x (PPU.BG[0].HOffset = %04x %d)\n", Byte, Address, PPU.BG[0].HOffset, CPU.V_Counter); break; case 0x210E: PPU.BG[0].VOffset = (Byte<<8) | PPU.BGnxOFSbyte; PPU.BGnxOFSbyte = Byte; // fprintf(stderr, "%02x to %04x (PPU.BG[0].VOffset = %04x %d)\n", Byte, Address, PPU.BG[0].VOffset, CPU.V_Counter); break; case 0x210F: PPU.BG[1].HOffset = (Byte<<8) | PPU.BGnxOFSbyte; PPU.BGnxOFSbyte = Byte; // fprintf(stderr, "%02x to %04x (PPU.BG[1].HOffset = %04x %d)\n", Byte, Address, PPU.BG[1].HOffset, CPU.V_Counter); break; case 0x2110: PPU.BG[1].VOffset = (Byte<<8) | PPU.BGnxOFSbyte; PPU.BGnxOFSbyte = Byte; // fprintf(stderr, "%02x to %04x (PPU.BG[1].VOffset = %04x %d)\n", Byte, Address, PPU.BG[1].VOffset, CPU.V_Counter); break; case 0x2111: PPU.BG[2].HOffset = (Byte<<8) | PPU.BGnxOFSbyte; PPU.BGnxOFSbyte = Byte; // fprintf(stderr, "%02x to %04x (PPU.BG[2].HOffset = %04x %d)\n", Byte, Address, PPU.BG[2].HOffset, CPU.V_Counter); break; case 0x2112: PPU.BG[2].VOffset = (Byte<<8) | PPU.BGnxOFSbyte; PPU.BGnxOFSbyte = Byte; // fprintf(stderr, "%02x to %04x (PPU.BG[2].VOffset = %04x %d)\n", Byte, Address, PPU.BG[2].VOffset, CPU.V_Counter); break; case 0x2113: PPU.BG[3].HOffset = (Byte<<8) | PPU.BGnxOFSbyte; PPU.BGnxOFSbyte = Byte; // fprintf(stderr, "%02x to %04x (PPU.BG[3].HOffset = %04x %d)\n", Byte, Address, PPU.BG[3].HOffset, CPU.V_Counter); break; case 0x2114: PPU.BG[3].VOffset = (Byte<<8) | PPU.BGnxOFSbyte; PPU.BGnxOFSbyte = Byte; // fprintf(stderr, "%02x to %04x (PPU.BG[3].VOffset = %04x %d)\n", Byte, Address, PPU.BG[3].VOffset, CPU.V_Counter); break; //end Theme Park case 0x2115: // VRAM byte/word access flag and increment PPU.VMA.High = (Byte & 0x80) == 0 ? FALSE : TRUE; switch (Byte & 3) { case 0: PPU.VMA.Increment = 1; break; case 1: PPU.VMA.Increment = 32; break; case 2: PPU.VMA.Increment = 128; break; case 3: PPU.VMA.Increment = 128; break; }#ifdef DEBUGGER if ((Byte & 3) != 0) missing.vram_inc = Byte & 3;#endif if (Byte & 0x0c) { static uint16 IncCount [4] = { 0, 32, 64, 128 }; static uint16 Shift [4] = { 0, 5, 6, 7 };#ifdef DEBUGGER missing.vram_full_graphic_inc = (Byte & 0x0c) >> 2;#endif// PPU.VMA.Increment = 1; uint8 i = (Byte & 0x0c) >> 2; PPU.VMA.FullGraphicCount = IncCount [i]; PPU.VMA.Mask1 = IncCount [i] * 8 - 1; PPU.VMA.Shift = Shift [i]; } else PPU.VMA.FullGraphicCount = 0; break; case 0x2116: // VRAM read/write address (low) PPU.VMA.Address &= 0xFF00; PPU.VMA.Address |= Byte;#ifdef CORRECT_VRAM_READS if (PPU.VMA.FullGraphicCount) { uint32 addr = PPU.VMA.Address; uint32 rem = addr & PPU.VMA.Mask1; uint32 address = (addr & ~PPU.VMA.Mask1) + (rem >> PPU.VMA.Shift) + ((rem & (PPU.VMA.FullGraphicCount - 1)) << 3); IPPU.VRAMReadBuffer = READ_WORD(Memory.VRAM+((address << 1) & 0xFFFF)); } else IPPU.VRAMReadBuffer = READ_WORD(Memory.VRAM+((PPU.VMA.Address << 1) & 0xffff));#else IPPU.FirstVRAMRead = TRUE;#endif break; case 0x2117: // VRAM read/write address (high) PPU.VMA.Address &= 0x00FF; PPU.VMA.Address |= Byte << 8;#ifdef CORRECT_VRAM_READS if (PPU.VMA.FullGraphicCount) { uint32 addr = PPU.VMA.Address; uint32 rem = addr & PPU.VMA.Mask1;
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