cpuops.cpp

SFC游戏模拟器 snes9x 1.43 的原代码

    STX8 ();
}

static void Op96X0 (void)
{
    DirectIndexedY (WRITE);
    STX16 ();
}

static void Op8EX1 (void)
{
    Absolute (WRITE);
    STX8 ();
}

static void Op8EX0 (void)
{
    Absolute (WRITE);
    STX16 ();
}
/**********************************************************************************************/

/* STY *************************************************************************************** */
static void Op84X1 (void)
{
    Direct (WRITE);
    STY8 ();
}

static void Op84X0 (void)
{
    Direct (WRITE);
    STY16 ();
}

static void Op94X1 (void)
{
    DirectIndexedX (WRITE);
    STY8 ();
}

static void Op94X0 (void)
{
    DirectIndexedX (WRITE);
    STY16 ();
}

static void Op8CX1 (void)
{
    Absolute (WRITE);
    STY8 ();
}

static void Op8CX0 (void)
{
    Absolute (WRITE);
    STY16 ();
}
/**********************************************************************************************/

/* STZ *************************************************************************************** */
static void Op64M1 (void)
{
    Direct (WRITE);
    STZ8 ();
}

static void Op64M0 (void)
{
    Direct (WRITE);
    STZ16 ();
}

static void Op74M1 (void)
{
    DirectIndexedX (WRITE);
    STZ8 ();
}

static void Op74M0 (void)
{
    DirectIndexedX (WRITE);
    STZ16 ();
}

static void Op9CM1 (void)
{
    Absolute (WRITE);
    STZ8 ();
}

static void Op9CM0 (void)
{
    Absolute (WRITE);
    STZ16 ();
}

static void Op9EM1 (void)
{
    AbsoluteIndexedX (WRITE);
    STZ8 ();
}

static void Op9EM0 (void)
{
    AbsoluteIndexedX (WRITE);
    STZ16 ();
}

/**********************************************************************************************/

/* TRB *************************************************************************************** */
static void Op14M1 (void)
{
    Direct (MODIFY);
    TRB8 ();
}

static void Op14M0 (void)
{
    Direct (MODIFY);
    TRB16 ();
}

static void Op1CM1 (void)
{
    Absolute (MODIFY);
    TRB8 ();
}

static void Op1CM0 (void)
{
    Absolute (MODIFY);
    TRB16 ();
}
/**********************************************************************************************/

/* TSB *************************************************************************************** */
static void Op04M1 (void)
{
    Direct (MODIFY);
    TSB8 ();
}

static void Op04M0 (void)
{
    Direct (MODIFY);
    TSB16 ();
}

static void Op0CM1 (void)
{
    Absolute (MODIFY);
    TSB8 ();
}

static void Op0CM0 (void)
{
    Absolute (MODIFY);
    TSB16 ();
}

/**********************************************************************************************/

/* Branch Instructions *********************************************************************** */
#ifndef SA1_OPCODES
#define BranchCheck0()\
    if( CPU.BranchSkip)\
    {\
	CPU.BranchSkip = FALSE;\
	if (!Settings.SoundSkipMethod)\
	    if( CPU.PC - CPU.PCBase > OpAddress)\
	        return;\
    }

#define BranchCheck1()\
    if( CPU.BranchSkip)\
    {\
	CPU.BranchSkip = FALSE;\
	if (!Settings.SoundSkipMethod) {\
	    if( CPU.PC - CPU.PCBase > OpAddress)\
	        return;\
	} else \
	if (Settings.SoundSkipMethod == 1)\
	    return;\
	if (Settings.SoundSkipMethod == 3)\
	    if( CPU.PC - CPU.PCBase > OpAddress)\
	        return;\
	    else\
		CPU.PC = CPU.PCBase + OpAddress;\
    }

#define BranchCheck2()\
    if( CPU.BranchSkip)\
    {\
	CPU.BranchSkip = FALSE;\
	if (!Settings.SoundSkipMethod) {\
	    if( CPU.PC - CPU.PCBase > OpAddress)\
	        return;\
	} else \
	if (Settings.SoundSkipMethod == 1)\
	    CPU.PC = CPU.PCBase + OpAddress;\
	if (Settings.SoundSkipMethod == 3)\
	    if (CPU.PC - CPU.PCBase > OpAddress)\
	        return;\
	    else\
		CPU.PC = CPU.PCBase + OpAddress;\
    }
#else
#define BranchCheck0()
#define BranchCheck1()
#define BranchCheck2()
#endif

#ifdef CPU_SHUTDOWN
#ifndef SA1_OPCODES
inline void CPUShutdown()
{
    if (Settings.Shutdown && CPU.PC == CPU.WaitAddress)
    {
	// Don't skip cycles with a pending NMI or IRQ - could cause delayed
	// interrupt. Interrupts are delayed for a few cycles already, but
	// the delay could allow the shutdown code to cycle skip again.
	// Was causing screen flashing on Top Gear 3000.

	if (CPU.WaitCounter == 0 && 
	    !(CPU.Flags & (IRQ_PENDING_FLAG | NMI_FLAG)))
	{
	    CPU.WaitAddress = NULL;
	    if (Settings.SA1)
		S9xSA1ExecuteDuringSleep ();
	    CPU.Cycles = CPU.NextEvent;
		S9xUpdateAPUTimer();
	    if (IAPU.APUExecuting)
	    {
		ICPU.CPUExecuting = FALSE;
		do
		{
		    APU_EXECUTE1();
		} while (APU.Cycles < CPU.NextEvent);
		ICPU.CPUExecuting = TRUE;
	    }
	}
	else
	if (CPU.WaitCounter >= 2)
	    CPU.WaitCounter = 1;
	else
	    CPU.WaitCounter--;
    }
}
#else
inline void CPUShutdown()
{
    if (Settings.Shutdown && CPU.PC == CPU.WaitAddress)
    {
	if (CPU.WaitCounter >= 1)
	{
	    SA1.Executing = FALSE;
	    SA1.CPUExecuting = FALSE;
	}
	else
	    CPU.WaitCounter++;
    }
}
#endif
#else
#define CPUShutdown()
#endif

/* BCC */
static void Op90 (void)
{
    Relative (JUMP);
    BranchCheck0 ();
    if (!CheckCarry ())
    {
	CPU.PC = CPU.PCBase + OpAddress;
#ifndef SA1_OPCODES
	CPU.Cycles += ONE_CYCLE;
#endif
	CPUShutdown ();
    }
}

/* BCS */
static void OpB0 (void)
{
    Relative (JUMP);
    BranchCheck0 ();
    if (CheckCarry ())
    {
	CPU.PC = CPU.PCBase + OpAddress;
#ifndef SA1_OPCODES
	CPU.Cycles += ONE_CYCLE;
#endif
	CPUShutdown ();
    }
}

/* BEQ */
static void OpF0 (void)
{
    Relative (JUMP);
    BranchCheck2 ();
    if (CheckZero ())
    {
	CPU.PC = CPU.PCBase + OpAddress;
#ifndef SA1_OPCODES
	CPU.Cycles += ONE_CYCLE;
#endif
	CPUShutdown ();
    }
}

/* BMI */
static void Op30 (void)
{
    Relative (JUMP);
    BranchCheck1 ();
    if (CheckNegative ())
    {
	CPU.PC = CPU.PCBase + OpAddress;
#ifndef SA1_OPCODES
	CPU.Cycles += ONE_CYCLE;
#endif
	CPUShutdown ();
    }
}

/* BNE */
static void OpD0 (void)
{
    Relative (JUMP);
    BranchCheck1 ();
    if (!CheckZero ())
    {
	CPU.PC = CPU.PCBase + OpAddress;

#ifndef SA1_OPCODES
	CPU.Cycles += ONE_CYCLE;
#endif
	CPUShutdown ();
    }
}

/* BPL */
static void Op10 (void)
{
    Relative (JUMP);
    BranchCheck1 ();
    if (!CheckNegative ())
    {
	CPU.PC = CPU.PCBase + OpAddress;
#ifndef SA1_OPCODES
	CPU.Cycles += ONE_CYCLE;
#endif
	CPUShutdown ();
    }
}

/* BRA */
static void Op80 (void)
{
    Relative (JUMP);
    CPU.PC = CPU.PCBase + OpAddress;
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
    CPUShutdown ();
}

/* BVC */
static void Op50 (void)
{
    Relative (JUMP);
    BranchCheck0 ();
    if (!CheckOverflow ())
    {
	CPU.PC = CPU.PCBase + OpAddress;
#ifndef SA1_OPCODES
	CPU.Cycles += ONE_CYCLE;
#endif
	CPUShutdown ();
    }
}

/* BVS */
static void Op70 (void)
{
    Relative (JUMP);
    BranchCheck0 ();
    if (CheckOverflow ())
    {
	CPU.PC = CPU.PCBase + OpAddress;
#ifndef SA1_OPCODES
	CPU.Cycles += ONE_CYCLE;
#endif
	CPUShutdown ();
    }
}
/**********************************************************************************************/

/* ClearFlag Instructions ******************************************************************** */
/* CLC */
static void Op18 (void)
{
    ClearCarry ();
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

/* CLD */
static void OpD8 (void)
{
    ClearDecimal ();
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

/* CLI */
static void Op58 (void)
{
    ClearIRQ ();
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
/*    CHECK_FOR_IRQ(); */
}

/* CLV */
static void OpB8 (void)
{
    ClearOverflow ();
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}
/**********************************************************************************************/

/* DEX/DEY *********************************************************************************** */
static void OpCAX1 (void)
{
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
#endif

    Registers.XL--;
    SetZN8 (Registers.XL);
}

static void OpCAX0 (void)
{
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
#endif

    Registers.X.W--;
    SetZN16 (Registers.X.W);
}

static void Op88X1 (void)
{
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
#endif

    Registers.YL--;
    SetZN8 (Registers.YL);
}

static void Op88X0 (void)
{
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
#endif

    Registers.Y.W--;
    SetZN16 (Registers.Y.W);
}
/**********************************************************************************************/

/* INX/INY *********************************************************************************** */
static void OpE8X1 (void)
{
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
#endif

    Registers.XL++;
    SetZN8 (Registers.XL);
}

static void OpE8X0 (void)
{
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
#endif

    Registers.X.W++;
    SetZN16 (Registers.X.W);
}

static void OpC8X1 (void)
{
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
#endif

    Registers.YL++;
    SetZN8 (Registers.YL);
}

static void OpC8X0 (void)
{
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
#ifdef CPU_SHUTDOWN
    CPU.WaitAddress = NULL;
#endif

    Registers.Y.W++;
    SetZN16 (Registers.Y.W);
}

/**********************************************************************************************/

/* NOP *************************************************************************************** */
static void OpEA (void)
{
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif

}
/**********************************************************************************************/

/* PUSH Instructions ************************************************************************* */
/* #define PushW(w) \
 *    S9xSetWord (w, Registers.S.W - 1);\
 *    Registers.S.W -= 2;                 
 */
#define PushB(b)\
    S9xSetByte (b, Registers.S.W--);

#define PushBE(b)\
	S9xSetByte (b, Registers.S.W--);\
	Registers.SH=0x01;


#define PushW(w) \
    S9xSetByte ((w)>>8, Registers.S.W);\
	S9xSetByte ((w)&0xff, (Registers.S.W - 1)&0xFFFF);\
    Registers.S.W -= 2;

#define PushWE(w) \
    S9xSetByte ((w)>>8, Registers.S.W--);\
	Registers.SH=0x01;\
	S9xSetByte ((w)&0xff, (Registers.S.W--)&0xFFFF);\
    Registers.SH = 0x01;

#define PushWENew(w) \
    S9xSetByte ((w)>>8, Registers.S.W--);\
	S9xSetByte ((w)&0xff, (Registers.S.W--)&0xFFFF);\
    Registers.SH = 0x01;

//PEA NL
static void OpF4E1 (void)
{
    Absolute (NONE);
    PushWENew ((unsigned short)OpAddress);
}

static void OpF4 (void)
{
    Absolute (NONE);
    PushW ((unsigned short)OpAddress);
}

//PEI NL
static void OpD4E1 (void)
{
    DirectIndirect (NONE);
    PushWENew ((unsigned short)OpAddress);
}

static void OpD4 (void)
{
    DirectIndirect (NONE);
    PushW ((unsigned short)OpAddress);
}

//PER NL
static void Op62E1 (void)
{
    RelativeLong (NONE);
    PushWENew ((unsigned short)OpAddress);
}

static void Op62 (void)
{
    RelativeLong (NONE);
    PushW ((unsigned short)OpAddress);
}


//PHA
static void Op48E1 (void)
{
    PushBE (Registers.AL);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

static void Op48M1 (void)
{
    PushB (Registers.AL);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

static void Op48M0 (void)
{
    PushW (Registers.A.W);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

//PHB
static void Op8BE1 (void)
{
    PushBE (Registers.DB);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}
static void Op8B (void)
{
    PushB (Registers.DB);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

//PHD NL
static void Op0BE1 (void)
{
    PushWENew (Registers.D.W);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

static void Op0B (void)
{
    PushW (Registers.D.W);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

//PHK
static void Op4BE1 (void)
{
    PushBE (Registers.PB);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

static void Op4B (void)
{
    PushB (Registers.PB);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

//PHP
static void Op08E1 (void)
{
    S9xPackStatus ();
    PushBE (Registers.PL);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

static void Op08 (void)
{
    S9xPackStatus ();
    PushB (Registers.PL);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

//PHX
static void OpDAE1 (void)
{
    PushBE (Registers.XL);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

static void OpDAX1 (void)
{
    PushB (Registers.XL);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

static void OpDAX0 (void)
{
    PushW (Registers.X.W);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

//PHY
static void Op5AE1 (void)
{
    PushBE (Registers.YL);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

static void Op5AX1 (void)
{
    PushB (Registers.YL);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}

static void Op5AX0 (void)
{
    PushW (Registers.Y.W);
#ifndef SA1_OPCODES
    CPU.Cycles += ONE_CYCLE;
#endif
}
/**********************************************************************************************/

/* PULL Instructions ************************************************************************* */
#define PullW(w) \
	w = S9xGetByte (++Registers.S.W); \
	w |= (S9xGetByte (++Registers.S.W)<<8);

/*	w = S9xGetWord (Registers.S.W + 1); \