cpuops.cpp

SFC游戏模拟器 snes9x 1.43 的原代码

/*******************************************************************************
  Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
 
  (c) Copyright 1996 - 2002 Gary Henderson ([e-mail]) and
                            Jerremy Koot ([e-mail])

  (c) Copyright 2001 - 2004 John Weidman ([e-mail])

  (c) Copyright 2002 - 2004 Brad Jorsch ([e-mail]),
                            funkyass ([e-mail]),
                            Joel Yliluoma (http://iki.fi/bisqwit/)
                            Kris Bleakley ([e-mail]),
                            Matthew Kendora,
                            Nach ([e-mail]),
                            Peter Bortas ([e-mail]) and
                            zones ([e-mail])

  C4 x86 assembler and some C emulation code
  (c) Copyright 2000 - 2003 zsKnight ([e-mail]),
                            _Demo_ ([e-mail]), and Nach

  C4 C++ code
  (c) Copyright 2003 Brad Jorsch

  DSP-1 emulator code
  (c) Copyright 1998 - 2004 Ivar ([e-mail]), _Demo_, Gary Henderson,
                            John Weidman, neviksti ([e-mail]),
                            Kris Bleakley, Andreas Naive

  DSP-2 emulator code
  (c) Copyright 2003 Kris Bleakley, John Weidman, neviksti, Matthew Kendora, and
                     Lord Nightmare ([e-mail]

  OBC1 emulator code
  (c) Copyright 2001 - 2004 zsKnight, pagefault ([e-mail]) and
                            Kris Bleakley
  Ported from x86 assembler to C by sanmaiwashi

  SPC7110 and RTC C++ emulator code
  (c) Copyright 2002 Matthew Kendora with research by
                     zsKnight, John Weidman, and Dark Force

  S-DD1 C emulator code
  (c) Copyright 2003 Brad Jorsch with research by
                     Andreas Naive and John Weidman
 
  S-RTC C emulator code
  (c) Copyright 2001 John Weidman
  
  ST010 C++ emulator code
  (c) Copyright 2003 Feather, Kris Bleakley, John Weidman and Matthew Kendora

  Super FX x86 assembler emulator code 
  (c) Copyright 1998 - 2003 zsKnight, _Demo_, and pagefault 

  Super FX C emulator code 
  (c) Copyright 1997 - 1999 Ivar, Gary Henderson and John Weidman


  SH assembler code partly based on x86 assembler code
  (c) Copyright 2002 - 2004 Marcus Comstedt ([e-mail]) 

 
  Specific ports contains the works of other authors. See headers in
  individual files.
 
  Snes9x homepage: http://www.snes9x.com
 
  Permission to use, copy, modify and distribute Snes9x in both binary and
  source form, for non-commercial purposes, is hereby granted without fee,
  providing that this license information and copyright notice appear with
  all copies and any derived work.
 
  This software is provided 'as-is', without any express or implied
  warranty. In no event shall the authors be held liable for any damages
  arising from the use of this software.
 
  Snes9x is freeware for PERSONAL USE only. Commercial users should
  seek permission of the copyright holders first. Commercial use includes
  charging money for Snes9x or software derived from Snes9x.
 
  The copyright holders request that bug fixes and improvements to the code
  should be forwarded to them so everyone can benefit from the modifications
  in future versions.
 
  Super NES and Super Nintendo Entertainment System are trademarks of
  Nintendo Co., Limited and its subsidiary companies.
*******************************************************************************/

/*****************************************************************************/
/* CPU-S9xOpcodes.CPP                                                                            */
/* This file contains all the opcodes                                                         */
/*****************************************************************************/

#include "snes9x.h"
#include "memmap.h"
#include "debug.h"
#include "missing.h"
#include "apu.h"
#include "sa1.h"
#include "spc7110.h"
#include "dsp1.h"

START_EXTERN_C
extern uint8 A1, A2, A3, A4, W1, W2, W3, W4;
extern uint8 Ans8;
extern uint16 Ans16;
extern uint32 Ans32;
extern uint8 Work8;
extern uint16 Work16;
extern uint32 Work32;
extern signed char Int8;
extern short Int16;
extern long Int32;
END_EXTERN_C

#include "cpuexec.h"
#include "cpuaddr.h"
#include "cpuops.h"
#include "cpumacro.h"
#include "apu.h"

/* ADC *************************************************************************************** */
static void Op69M1 (void)
{
    Immediate8 (READ);
    ADC8 ();
}

static void Op69M0 (void)
{
    Immediate16 (READ);
    ADC16 ();
}

static void Op65M1 (void)
{
    Direct (READ);
    ADC8 ();
}

static void Op65M0 (void)
{
    Direct (READ);
    ADC16 ();
}

static void Op75M1 (void)
{
    DirectIndexedX (READ);
    ADC8 ();
}

static void Op75M0 (void)
{
    DirectIndexedX (READ);
    ADC16 ();
}

static void Op72M1 (void)
{
    DirectIndirect (READ);
    ADC8 ();
}

static void Op72M0 (void)
{
    DirectIndirect (READ);
    ADC16 ();
}

static void Op61M1 (void)
{
    DirectIndexedIndirect (READ);
    ADC8 ();
}

static void Op61M0 (void)
{
    DirectIndexedIndirect (READ);
    ADC16 ();
}

static void Op71M1 (void)
{
    DirectIndirectIndexed (READ);
    ADC8 ();
}

static void Op71M0 (void)
{
    DirectIndirectIndexed (READ);
    ADC16 ();
}

static void Op67M1 (void)
{
    DirectIndirectLong (READ);
    ADC8 ();
}

static void Op67M0 (void)
{
    DirectIndirectLong (READ);
    ADC16 ();
}

static void Op77M1 (void)
{
    DirectIndirectIndexedLong (READ);
    ADC8 ();
}

static void Op77M0 (void)
{
    DirectIndirectIndexedLong (READ);
    ADC16 ();
}

static void Op6DM1 (void)
{
    Absolute (READ);
    ADC8 ();
}

static void Op6DM0 (void)
{
    Absolute (READ);
    ADC16 ();
}

static void Op7DM1 (void)
{
    AbsoluteIndexedX (READ);
    ADC8 ();
}

static void Op7DM0 (void)
{
    AbsoluteIndexedX (READ);
    ADC16 ();
}

static void Op79M1 (void)
{
    AbsoluteIndexedY (READ);
    ADC8 ();
}

static void Op79M0 (void)
{
    AbsoluteIndexedY (READ);
    ADC16 ();
}

static void Op6FM1 (void)
{
    AbsoluteLong (READ);
    ADC8 ();
}

static void Op6FM0 (void)
{
    AbsoluteLong (READ);
    ADC16 ();
}

static void Op7FM1 (void)
{
    AbsoluteLongIndexedX (READ);
    ADC8 ();
}

static void Op7FM0 (void)
{
    AbsoluteLongIndexedX (READ);
    ADC16 ();
}

static void Op63M1 (void)
{
    StackRelative (READ);
    ADC8 ();
}

static void Op63M0 (void)
{
    StackRelative (READ);
    ADC16 ();
}

static void Op73M1 (void)
{
    StackRelativeIndirectIndexed (READ);
    ADC8 ();
}

static void Op73M0 (void)
{
    StackRelativeIndirectIndexed (READ);
    ADC16 ();
}

/**********************************************************************************************/

/* AND *************************************************************************************** */
static void Op29M1 (void)
{
    Registers.AL &= *CPU.PC++;
#ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed;
#endif
    SetZN8 (Registers.AL);
}

static void Op29M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
    Registers.A.W &= *(uint16 *) CPU.PC;
#else
    Registers.A.W &= *CPU.PC + (*(CPU.PC + 1) << 8);
#endif
    CPU.PC += 2;
#ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
    SetZN16 (Registers.A.W);
}

static void Op25M1 (void)
{
    Direct (READ);
    AND8 ();
}

static void Op25M0 (void)
{
    Direct (READ);
    AND16 ();
}

static void Op35M1 (void)
{
    DirectIndexedX (READ);
    AND8 ();
}

static void Op35M0 (void)
{
    DirectIndexedX (READ);
    AND16 ();
}

static void Op32M1 (void)
{
    DirectIndirect (READ);
    AND8 ();
}

static void Op32M0 (void)
{
    DirectIndirect (READ);
    AND16 ();
}

static void Op21M1 (void)
{
    DirectIndexedIndirect (READ);
    AND8 ();
}

static void Op21M0 (void)
{
    DirectIndexedIndirect (READ);
    AND16 ();
}

static void Op31M1 (void)
{
    DirectIndirectIndexed (READ);
    AND8 ();
}

static void Op31M0 (void)
{
    DirectIndirectIndexed (READ);
    AND16 ();
}

static void Op27M1 (void)
{
    DirectIndirectLong (READ);
    AND8 ();
}

static void Op27M0 (void)
{
    DirectIndirectLong (READ);
    AND16 ();
}

static void Op37M1 (void)
{
    DirectIndirectIndexedLong (READ);
    AND8 ();
}

static void Op37M0 (void)
{
    DirectIndirectIndexedLong (READ);
    AND16 ();
}

static void Op2DM1 (void)
{
    Absolute (READ);
    AND8 ();
}

static void Op2DM0 (void)
{
    Absolute (READ);
    AND16 ();
}

static void Op3DM1 (void)
{
    AbsoluteIndexedX (READ);
    AND8 ();
}

static void Op3DM0 (void)
{
    AbsoluteIndexedX (READ);
    AND16 ();
}

static void Op39M1 (void)
{
    AbsoluteIndexedY (READ);
    AND8 ();
}

static void Op39M0 (void)
{
    AbsoluteIndexedY (READ);
    AND16 ();
}

static void Op2FM1 (void)
{
    AbsoluteLong (READ);
    AND8 ();
}

static void Op2FM0 (void)
{
    AbsoluteLong (READ);
    AND16 ();
}

static void Op3FM1 (void)
{
    AbsoluteLongIndexedX (READ);
    AND8 ();
}

static void Op3FM0 (void)
{
    AbsoluteLongIndexedX (READ);
    AND16 ();
}

static void Op23M1 (void)
{
    StackRelative (READ);
    AND8 ();
}

static void Op23M0 (void)
{
    StackRelative (READ);
    AND16 ();
}

static void Op33M1 (void)
{
    StackRelativeIndirectIndexed (READ);
    AND8 ();
}

static void Op33M0 (void)
{
    StackRelativeIndirectIndexed (READ);
    AND16 ();
}
/**********************************************************************************************/

/* ASL *************************************************************************************** */
static void Op0AM1 (void)
{
    A_ASL8 ();
}

static void Op0AM0 (void)
{
    A_ASL16 ();
}

static void Op06M1 (void)
{
    Direct (MODIFY);
    ASL8 ();
}

static void Op06M0 (void)
{
    Direct (MODIFY);
    ASL16 ();
}

static void Op16M1 (void)
{
    DirectIndexedX (MODIFY);
    ASL8 ();
}

static void Op16M0 (void)
{
    DirectIndexedX (MODIFY);
    ASL16 ();
}

static void Op0EM1 (void)
{
    Absolute (MODIFY);
    ASL8 ();
}

static void Op0EM0 (void)
{
    Absolute (MODIFY);
    ASL16 ();
}

static void Op1EM1 (void)
{
    AbsoluteIndexedX (MODIFY);
    ASL8 ();
}

static void Op1EM0 (void)
{
    AbsoluteIndexedX (MODIFY);
    ASL16 ();
}
/**********************************************************************************************/

/* BIT *************************************************************************************** */
static void Op89M1 (void)
{
    ICPU._Zero = Registers.AL & *CPU.PC++;
#ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed;
#endif
}

static void Op89M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS
    ICPU._Zero = (Registers.A.W & *(uint16 *) CPU.PC) != 0;
#else
    ICPU._Zero = (Registers.A.W & (*CPU.PC + (*(CPU.PC + 1) << 8))) != 0;
#endif	
#ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
    CPU.PC += 2;
}

static void Op24M1 (void)
{
    Direct (READ);
    BIT8 ();
}

static void Op24M0 (void)
{
    Direct (READ);
    BIT16 ();
}

static void Op34M1 (void)
{
    DirectIndexedX (READ);
    BIT8 ();
}

static void Op34M0 (void)
{
    DirectIndexedX (READ);
    BIT16 ();
}

static void Op2CM1 (void)
{
    Absolute (READ);
    BIT8 ();
}

static void Op2CM0 (void)
{
    Absolute (READ);
    BIT16 ();
}

static void Op3CM1 (void)
{
    AbsoluteIndexedX (READ);
    BIT8 ();
}

static void Op3CM0 (void)
{
    AbsoluteIndexedX (READ);
    BIT16 ();
}
/**********************************************************************************************/

/* CMP *************************************************************************************** */
static void OpC9M1 (void)
{
    Int32 = (int) Registers.AL - (int) *CPU.PC++;
    ICPU._Carry = Int32 >= 0;
    SetZN8 ((uint8) Int32);
#ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeed;
#endif
}

static void OpC9M0 (void)
{
#ifdef FAST_LSB_WORD_ACCESS    
    Int32 = (long) Registers.A.W - (long) *(uint16 *) CPU.PC;
#else
    Int32 = (long) Registers.A.W -
	    (long) (*CPU.PC + (*(CPU.PC + 1) << 8));
#endif
    ICPU._Carry = Int32 >= 0;
    SetZN16 ((uint16) Int32);
    CPU.PC += 2;
#ifndef SA1_OPCODES
    CPU.Cycles += CPU.MemSpeedx2;
#endif
}

static void OpC5M1 (void)
{
    Direct (READ);
    CMP8 ();
}

static void OpC5M0 (void)
{
    Direct (READ);
    CMP16 ();
}

static void OpD5M1 (void)
{
    DirectIndexedX (READ);
    CMP8 ();
}

static void OpD5M0 (void)
{
    DirectIndexedX (READ);
    CMP16 ();
}

static void OpD2M1 (void)
{
    DirectIndirect (READ);
    CMP8 ();
}

static void OpD2M0 (void)
{
    DirectIndirect (READ);
    CMP16 ();
}

static void OpC1M1 (void)
{
    DirectIndexedIndirect (READ);
    CMP8 ();
}

static void OpC1M0 (void)
{
    DirectIndexedIndirect (READ);
    CMP16 ();
}

static void OpD1M1 (void)
{
    DirectIndirectIndexed (READ);
    CMP8 ();
}

static void OpD1M0 (void)
{
    DirectIndirectIndexed (READ);
    CMP16 ();
}

static void OpC7M1 (void)
{
    DirectIndirectLong (READ);
    CMP8 ();
}

static void OpC7M0 (void)
{
    DirectIndirectLong (READ);
    CMP16 ();
}

static void OpD7M1 (void)
{
    DirectIndirectIndexedLong (READ);
    CMP8 ();
}

static void OpD7M0 (void)
{
    DirectIndirectIndexedLong (READ);
    CMP16 ();
}

static void OpCDM1 (void)
{
    Absolute (READ);
    CMP8 ();
}

static void OpCDM0 (void)
{
    Absolute (READ);
    CMP16 ();
}

static void OpDDM1 (void)
{
    AbsoluteIndexedX (READ);
    CMP8 ();
}

static void OpDDM0 (void)
{
    AbsoluteIndexedX (READ);
    CMP16 ();
}

static void OpD9M1 (void)
{
    AbsoluteIndexedY (READ);
    CMP8 ();
}

static void OpD9M0 (void)
{
    AbsoluteIndexedY (READ);
    CMP16 ();
}

static void OpCFM1 (void)
{
    AbsoluteLong (READ);
    CMP8 ();