read_spi.asm

读SPI接口数据存储器的汇编程控.可用于仿真器,电脑显示读出版界2个字节及起始地址.

#include ht46r23.inc

@read	equ	03h
@write	equ	02h
@wrid	equ	04h
@wren	equ	06h
@rdsr	equ	05h
@wrsr	equ	01h

data  .section  'data'
	reg1	db	?
	reg2	db	?
	reg3	db	?
	reg4	db	?
	
	addrl	db	?
	addrh	db	?
	
	reg01	db	?
	reg02	db	?
	reg03	db	?
	reg04	db	?
	reg05	db	?
	reg06	db	?
	reg07	db	?
	reg08	db	?
	reg09	db	?
	reg10	db	?
	reg11	db	?
	reg12	db	?
	reg13	db	?
	reg14	db	?
	reg15	db	?
	reg16	db	?
	reg17	db	?
	reg18	db	?
	reg19	db	?
	reg20	db	?
	reg21	db	?
	reg22	db	?
	reg23	db	?
	reg24	db	?
	reg25	db	?
	reg26	db	?
	reg27	db	?
	reg28	db	?
	reg29	db	?
	reg30	db	?
	reg31	db	?
	reg32	db	?

;p1	equ	cs
;p2	equ	si
;p3	equ	so

	cs	equ	pc0
	sck	equ	pc1
	si	equ	pc2
	so	equ	pc3

main	.section  at 0 'code' 
	org 	0000h
	jmp	prog_start

delay_2ms:
	mov	a,250
	mov	reg1,a
delay_2ms_1:
	jmp	$+1
	jmp	$+1
	jmp	$+1
	sdz	reg1
	jmp	delay_2ms_1
	ret

rd_status:
	mov	a,@read
	mov	reg1,a
	call	write_byte
	call	read_byte
	mov	a,reg1
	ret

wr_status:
	mov	a,@write
	mov	reg1,a
	call	write_byte
	
	mov	a,reg1
	call	write_byte
;	mov	a,addr_h
	mov	reg1,a
	call	write_byte
;	mov	a,addr_l
	mov	reg1,a
	call	write_byte
	ret

prog_start:
	mov	a,1000b
	mov	pcc,a
	mov	a,1
	mov	pc,a
	call	delay_2ms
	call	delay_2ms
	
	call	delay_2ms
	
	call	delay_2ms
	call	delay_2ms
	
	call	delay_2ms
	call	delay_2ms

	clr	cs
	call	delay_2ms

	mov	a,@read
	mov	reg1,a
	call	write_byte		;comand
	mov	a,0ch
	mov	reg1,a
	call	write_byte		;addrh
	mov	a,40h
	mov	reg1,a
	call	write_byte		;addrl

	mov	a,20h
	mov	addrl,a
	mov	a,6
	mov	addrh,a
loop:	
	call	read_byte
	mov	a,reg1
	mov	reg01,a

	call	read_byte
	mov	a,reg1
	mov	reg02,a

	call	read_byte
	mov	a,reg1
	mov	reg03,a

	call	read_byte
	mov	a,reg1
	mov	reg04,a

	call	read_byte
	mov	a,reg1
	mov	reg05,a

	call	read_byte
	mov	a,reg1
	mov	reg06,a

	call	read_byte
	mov	a,reg1
	mov	reg07,a
	
	call	read_byte
	mov	a,reg1
	mov	reg08,a
	
	call	read_byte
	mov	a,reg1
	mov	reg09,a
	
	call	read_byte
	mov	a,reg1
	mov	reg10,a
	
	call	read_byte
	mov	a,reg1
	mov	reg11,a
	
	call	read_byte
	mov	a,reg1
	mov	reg12,a
	
	call	read_byte
	mov	a,reg1
	mov	reg13,a
	
	call	read_byte
	mov	a,reg1
	mov	reg14,a
	
	call	read_byte
	mov	a,reg1
	mov	reg15,a
	
	call	read_byte
	mov	a,reg1
	mov	reg16,a
	
	call	read_byte
	mov	a,reg1
	mov	reg17,a
	
	call	read_byte
	mov	a,reg1
	mov	reg18,a
	
	call	read_byte
	mov	a,reg1
	mov	reg19,a

	call	read_byte
	mov	a,reg1
	mov	reg20,a

	call	read_byte
	mov	a,reg1
	mov	reg21,a

	call	read_byte
	mov	a,reg1
	mov	reg22,a

	call	read_byte
	mov	a,reg1
	mov	reg23,a

	call	read_byte
	mov	a,reg1
	mov	reg24,a

	call	read_byte
	mov	a,reg1
	mov	reg25,a

	call	read_byte
	mov	a,reg1
	mov	reg26,a

	call	read_byte
	mov	a,reg1
	mov	reg27,a

	call	read_byte
	mov	a,reg1
	mov	reg28,a

	call	read_byte
	mov	a,reg1
	mov	reg29,a

	call	read_byte
	mov	a,reg1
	mov	reg30,a

	call	read_byte
	mov	a,reg1
	mov	reg31,a

	call	read_byte
	mov	a,reg1
	mov	reg32,a

	nop
	nop
	nop
	nop

	mov	a,addrl
	add	a,10h
	mov	addrl,a
	sz	z
	inc	addrh
	jmp	loop

	set	cs
	nop
	jmp	$


read_byte:
	mov	a,8
	mov	reg2,a
read_byte_lp:

	jmp	$+1
	set	sck

	jmp	$+1
	snz	so
	clr	c
	sz	so
	set	c
	rlc	reg1
	clr	sck
	sdz	reg2 
	jmp	read_byte_lp
	ret

write_byte:
	mov	a,8
	mov	reg2,a
write_byte_lp:
	rlc	reg1
	sz	c
	set	si
	snz	c
	clr	si
	jmp	$+1
	set	sck
	jmp	$+1
	clr	sck
	sdz	reg2
	jmp	write_byte_lp
	ret