386rgtbl.c

来自「开放源码的编译器open watcom 1.6.0版的源代码」· C语言 代码 · 共 1,144 行 · 第 1/3 页

    }
    if( HW_COvlap( regs, HW_SEGS ) ) { // a kludge to get GS:[EAX+EDX]
        HW_CTurnOff( regs, HW_SEGS );
        if( NotFloatRegClass( regs ) == FD ) return( CP );
    }
    return( XX );
}

extern  type_class_def  RegClass( hw_reg_set regs ) {
/****************************************************
    return the type associated with "regs".
*/

    hw_reg_set          *possible;

    if( HW_COvlap( regs, HW_FLTS ) ) {
        if( HW_CEqual( regs, HW_ST0 ) ) return( FD );
        possible = STIReg;
        while( !HW_CEqual( *possible, HW_EMPTY ) ) {
            if( HW_Equal( regs, *possible ) ) return( FD );
            ++possible;
        }
        return( XX );
    } else {
        return( NotFloatRegClass( regs ) );
    }
}

extern  bool    IndexRegOk( hw_reg_set reg, bool is_temp_index ) {
/*****************************************************************
    return TRUE if "reg" is ok to be used as in index reg.
    "is_temp_index" means we'll also need to incorporate the
    AR/BP register into the index, since we're indexing an auto
*/

    hw_reg_set  *list;

    is_temp_index = is_temp_index;
    if( RegClass( reg ) == U4 ) {
        list = RegSets[  RL_DOUBLE  ];
    } else {
        list = RegSets[  RL_LONG_INDEX  ];
    }
    while( !HW_CEqual( *list, HW_EMPTY ) ) {
        if( HW_Equal( *list, reg ) ) break;
        ++ list;
    }
    return( HW_Equal( *list, reg ) );
}


extern  bool    IsSegReg( hw_reg_set regs ) {
/********************************************
    return TRUE if "regs" is a segment register
*/

    hw_reg_set  tmp;
    tmp = regs;
    HW_COnlyOn( tmp, HW_SEGS );
    return( HW_Equal( tmp, regs ) );
}


extern  hw_reg_set      Low16Reg( hw_reg_set regs ) {
/****************************************************
    return the low order part of 16 bit register "regs"
*/

    HW_COnlyOn( regs, HW_AL_BL_CL_DL );
    return( regs );
}


extern  hw_reg_set      High16Reg( hw_reg_set regs ) {
/****************************************************
    return the high order part of 16 bit register "regs"
*/

    HW_COnlyOn( regs, HW_AH_BH_CH_DH );
    return( regs );
}


extern  hw_reg_set      Low32Reg( hw_reg_set regs ) {
/****************************************************
    return the low order part of 32 bit register "regs"
*/

    if( HW_CEqual( regs, HW_DX_AX ) ) {
        return( HW_AX );
    }
    HW_COnlyOn( regs, HW_AX_BX_CX_DX_SI_DI );
    return( regs );
}


extern  hw_reg_set      High32Reg( hw_reg_set regs ) {
/****************************************************
    return the high order part of 32 bit register "regs"
*/

    if( HW_CEqual( regs, HW_DX_AX ) ) {
        return( HW_DX );
    }
    return( HW_EMPTY );
}

extern  hw_reg_set      FullReg( hw_reg_set regs ) {
/***************************************************
    given a register (eg AL), return the full register (eg EAX)
*/

    if( HW_COvlap( regs, HW_EAX ) ) {
        HW_CTurnOn( regs, HW_EAX );
    }
    if( HW_COvlap( regs, HW_EBX ) ) {
        HW_CTurnOn( regs, HW_EBX );
    }
    if( HW_COvlap( regs, HW_ECX ) ) {
        HW_CTurnOn( regs, HW_ECX );
    }
    if( HW_COvlap( regs, HW_EDX ) ) {
        HW_CTurnOn( regs, HW_EDX );
    }
    if( HW_COvlap( regs, HW_EDI ) ) {
        HW_CTurnOn( regs, HW_EDI );
    }
    if( HW_COvlap( regs, HW_ESI ) ) {
        HW_CTurnOn( regs, HW_ESI );
    }
    return( regs );
}

extern  hw_reg_set      Low48Reg( hw_reg_set regs ) {
/****************************************************
    return the low order part of 48 bit register "regs"
*/

    if( HW_CEqual( regs, HW_EMPTY ) ) return( HW_EMPTY );
    if( HW_COvlap( regs, HW_SEGS ) ) {
        HW_CTurnOff( regs, HW_SEGS );
        return( regs );
    }
    HW_COnlyOn( regs, HW_32 );
    return( FullReg( regs ) );
}


extern  hw_reg_set      High48Reg( hw_reg_set regs ) {
/****************************************************
    return the high order part of 48 bit register "regs"
*/

    hw_reg_set  high;

    high = Low48Reg( regs );
    if( !HW_CEqual( high, HW_EMPTY ) ) {
        HW_TurnOff( regs, high );
        return( regs );
    }
    return( high );
}

extern  hw_reg_set      Low64Reg( hw_reg_set regs ) {
/****************************************************
    return the low order part of 64 bit register "regs"
*/

    hw_reg_set  low;
    hw_reg_set  *order;

    if( HW_CEqual( regs, HW_EMPTY ) ) return( HW_EMPTY );
    order = Reg64Order;
    for(;;) {
        if( HW_Ovlap( *order, regs ) ) break;
        ++order;
    }
    low = regs;
    HW_OnlyOn( low, *order );
    if( HW_Equal( low, regs ) ) {
        low = HW_EMPTY;
    }
    return( low );
}



extern  hw_reg_set      High64Reg( hw_reg_set regs ) {
/*****************************************************
    return the high order part of 64 bit register "regs"
*/

    hw_reg_set  high;

    high = Low64Reg( regs );
    if( !HW_CEqual( high, HW_EMPTY ) ) {
        HW_TurnOff( regs, high );
        return( regs );
    }
    return( high );
}



extern  hw_reg_set      HighReg( hw_reg_set regs ) {
/**************************************************
    return the high order portion of "regs"
*/

    switch( RegClass( regs ) ) {
    case CP:
        HW_COnlyOn( regs, HW_SEGS );
        return( regs );
    case FD:
    case U8:
    case I8:
        return( High64Reg( regs ) );
    case U4:
    case I4:
        return( High32Reg( regs ) );
    case U2:
        return( High16Reg( regs ) );
    default:
        return( HW_EMPTY );
    }
}

extern  hw_reg_set      HighOffsetReg( hw_reg_set regs ) {
/********************************************************
    return the portion of "regs" which would occupy the high memory address
*/

    return( HighReg( regs ) );
}


extern  hw_reg_set      LowReg( hw_reg_set regs ) {
/**************************************************
    return the low order portion of "regs"
*/

    switch( RegClass( regs ) ) {
    case CP:
        HW_CTurnOff( regs, HW_SEGS );
        return( regs );
    case U8:
    case I8:
    case FD:
        return( Low64Reg( regs ) );
    case U4:
        return( Low32Reg( regs ) );
    case U2:
        return( Low16Reg( regs ) );
    default:
        return( HW_EMPTY );
    }
}

extern  hw_reg_set      LowOffsetReg( hw_reg_set regs ) {
/********************************************************
    return the portion of "regs" which would occupy the low memory address
*/

    return( LowReg( regs ) );
}



extern  bool    IsRegClass( hw_reg_set regs, type_class_def class ) {
/********************************************************************
    return TRUE if "regs" has type "class" (eg I4, U4, etc)
*/

    hw_reg_set  *list;

    list = RegSets[  IsSets[  class  ]  ];
    while( !HW_Equal( *list, HW_EMPTY ) ) {
        if( HW_Equal( *list, regs ) ) break;
        ++ list;
    }
    return( !HW_Equal( *list, HW_EMPTY ) );
}


extern  hw_reg_set      ActualParmReg( hw_reg_set reg ) {
/********************************************************
    given a register "reg", to be used to pass a parameter,
    decide which register name should really be used in
    the instruction generated to load it.
*/

    if( HW_COvlap( reg, HW_FLTS ) ) {
        HW_CAsgn( reg, HW_ST0 );
    }
    return( reg );
}

extern  hw_reg_set      FixedRegs() {
/************************************
    return the set of register which may not be modified within this routine
*/

    hw_reg_set  fixed;
    HW_CAsgn( fixed, HW_SP );
    HW_CTurnOn( fixed, HW_BP );
    HW_CTurnOn( fixed, HW_SS );
    HW_CTurnOn( fixed, HW_CS );
    if( _IsntTargetModel( FLOATING_DS ) ) HW_CTurnOn( fixed, HW_DS );
    if( _IsntTargetModel( FLOATING_ES ) ) HW_CTurnOn( fixed, HW_ES );
    if( _IsntTargetModel( FLOATING_FS ) ) HW_CTurnOn( fixed, HW_FS );
    if( _IsntTargetModel( FLOATING_GS ) ) HW_CTurnOn( fixed, HW_GS );
    if( _IsTargetModel( INDEXED_GLOBALS ) ) HW_CTurnOn( fixed, HW_EBX );
    return( fixed );
}


extern  bool    IsStackReg( name *sp ) {
/**************************************/

    if( sp == NULL ) return( FALSE );
    if( sp->n.class != N_REGISTER ) return( FALSE );
    if( !HW_CEqual( sp->r.reg, HW_SP ) ) return( FALSE );
    return( TRUE );
}


extern  hw_reg_set      StackReg() {
/**********************************/

    return( HW_SP );
}


extern  hw_reg_set      DisplayReg() {
/************************************/

    if( CurrProc->targ.sp_frame ) return( HW_SP );
    return( HW_BP );
}


extern  int     SizeDisplayReg() {
/*********************************
    return the size of the "pascal" display register entry on the stack
*/

    return( WORD_SIZE );
}


extern  hw_reg_set      AllCacheRegs() {
/***************************************
    return the set of all registers that could be used to cache values
*/

    hw_reg_set all;

    HW_CAsgn( all, HW_FLTS );
    HW_CTurnOn( all, HW_EAX );
    HW_CTurnOn( all, HW_EDX );
    HW_CTurnOn( all, HW_EBX );
    HW_CTurnOn( all, HW_ECX );
    HW_CTurnOn( all, HW_ESI );
    HW_CTurnOn( all, HW_EDI );
    HW_CTurnOn( all, HW_ES );
    HW_CTurnOn( all, HW_FS );
    HW_CTurnOn( all, HW_GS );
    if( _IsTargetModel( FLOATING_DS ) ) HW_CTurnOn( all, HW_DS );
    if( _IsTargetModel( INDEXED_GLOBALS ) ) HW_CTurnOff( all, HW_EBX );
    return( all );
}

extern  hw_reg_set      *IdxRegs() {
/***********************************
    return a pointer to the set of "indexable" registers
*/

    return( DoubleRegs );
}