i86table.c
来自「开放源码的编译器open watcom 1.6.0版的源代码」· C语言 代码 · 共 1,444 行 · 第 1/5 页
C
1,444 行
{_Side( C, R|M|U ), V_NO, R_SWAPCMP, RG_DBL_OR_PTR,FU_NO},
{_Side( ANY, ANY ), V_NO, R_MAKECMPCALL, RG_DBL_OR_PTR,FU_NO},
};
static opcode_entry CmpFD[] = {
/*************************/
/* op1 op2 verify gen reg fu*/
{_Side( ANY, C ), V_OP2ZERO, R_HIGHCMP, RG_8,FU_NO},
{_Side( ANY, C ), V_NO, R_FDCONSCMP, RG_8,FU_NO},
{_Side( C, R|M|U ), V_NO, R_SWAPCMP, RG_8,FU_NO},
{_Side( ANY, ANY ), V_NO, R_MAKECMPCALL, RG_8,FU_NO},
};
static opcode_entry Move1[] = {
/*************************/
/* op res eq verify gen reg fu*/
/* optimizing reductions*/
{_UnPP( ANY, ANY, EQ_R1 ), NVI(V_NO), G_NO, RG_,FU_NO},
{_UnPP( M, M, NONE ), V_SAME_LOCN, G_NO, RG_,FU_NO},
/* instructions we can generate*/
{_Un( C, R, NONE ), V_OP1ZERO, R_MAKEXORRR, RG_BYTE,FU_NO},
{_UnPP( C, R, NONE ), V_NO, G_MOVRC, RG_BYTE,FU_ALU1},
{_UnPP( C, M, NONE ), V_NO, G_MOVMC, RG_,FU_ALU1},
{_UnPP( R, M, NONE ), V_RESLOC, G_MOVMA, RG_BYTE_ACC,FU_ALU1},
{_UnPP( M, R, NONE ), V_OP1LOC, G_MOVAM, RG_BYTE_ACC,FU_ALU1},
{_UnPP( R, R, NONE ), V_NO, G_RR1, RG_BYTE,FU_ALU1},
{_UnPP( M, R, NONE ), V_NO, G_RM1, RG_BYTE,FU_ALU1},
{_UnPP( R, M, NONE ), V_NO, G_MR1, RG_BYTE,FU_ALU1},
/* simplifying reductions*/
{_Un( M, M, NONE ), V_NO, R_MOVOP1REG, RG_BYTE,FU_NO},
{_Un( ANY, R, NONE ), V_NO, G_UNKNOWN, RG_BYTE,FU_NO},
{_Un( R|C, ANY, NONE ), V_NO, G_UNKNOWN, RG_BYTE,FU_NO},
{_Un( ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_BYTE_NEED,FU_NO},
};
static opcode_entry Move2CC[] = {
/***************************/
/* op res eq verify gen reg fu*/
/* optimizing reductions*/
{_Un( C, R, NONE ), V_OP1ZERO, R_MAKEXORRR, RG_WORD,FU_NO},
/* fall through into move2 table*/
/**** NB. Move2 points here ****/
/* opcode_entry Move2[]; */
/*************************/
/* op res eq verify gen reg fu*/
/* optimizing reductions*/
{_UnPP( ANY, ANY, EQ_R1 ), NVI(V_NO), G_NO, RG_,FU_NO},
{_UnPP( M, M, NONE ), V_SAME_LOCN, G_NO, RG_,FU_NO},
/* instructions we can generate*/
{_UnPP( C, R, NONE ), V_NO, G_MOVRC, RG_WORD,FU_ALU1},
{_UnPP( C, M, NONE ), V_NO, G_MOVMC, RG_,FU_ALU1},
{_UnPP( R, M, NONE ), V_RESLOC, G_MOVMA, RG_WORD_ACC,FU_ALU1},
{_UnPP( M, R, NONE ), V_OP1LOC, G_MOVAM, RG_WORD_ACC,FU_ALU1},
{_UnPP( R, R, NONE ), V_NO, G_RR1, RG_WORD,FU_ALU1},
{_UnPP( M, R, NONE ), V_NO, G_RM1, RG_WORD,FU_ALU1},
{_UnPP( R, M, NONE ), V_NO, G_MR1, RG_WORD,FU_ALU1},
{_UnPP( R, R, NONE ), V_NO, G_SR, RG_WORD_SEG,FU_ALU1},
{_UnPP( R, R, NONE ), V_NO, G_RS, RG_SEG_WORD,FU_ALU1},
{_UnPP( R, M, NONE ), V_NO, G_MS1, RG_SEG_WORD,FU_ALU1},
{_UnPP( M, R, NONE ), V_NO, G_SM1, RG_WORD_SEG,FU_ALU1},
{_UnPP( R, R, NONE ), V_SIZE, G_SEG_SEG, RG_SEG_SEG,FU_ALU1},
{_UnPP( R, R, NONE ), V_WORDREG_AVAIL,R_SEG_SEG, RG_SEG_SEG,FU_NO},
{_UnPP( R, R, NONE ), V_NO, G_SEG_SEG, RG_SEG_SEG,FU_ALU1},
/* simplifying reductions*/
{_Un( C, R, NONE ), V_NO, R_MOVOP1REG, RG_WORD_SEG,FU_NO},
{_Un( M, M, NONE ), V_NO, R_MOVOP1REG, RG_WORD,FU_NO},
{_Un( R|M|U,R, NONE ), V_NO, G_UNKNOWN, RG_ANYWORD,FU_NO},
{_Un( R, ANY, NONE ), V_NO, G_UNKNOWN, RG_ANYWORD,FU_NO},
{_Un( ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_ANYWORD_NEED,FU_NO},
};
/* Point at where Move2 used to start */
/*************************/
opcode_entry *Move2 = &Move2CC[1]; /* used from intel/c/i86split.c */
static opcode_entry Move4op[] = {
/*************************/
/* op res eq verify gen reg fu*/
/*Un( C, ANY, NONE ), NVI(V_HIGHEQLOW),R_HIGHLOWMOVE,RG_DOUBLE,FU_NO,*/
{_Un( ANY, ANY, NONE ), V_NO, R_SPLITMOVE, RG_DOUBLE,FU_NO},
};
/* Pointer to Move4 table (required for symmetry with 386table.c) */
/*************************/
opcode_entry *Move4 = Move4op; /* used from intel/c/i86split.c */
static opcode_entry Move8[] = {
/*************************/
/* op res eq verify gen reg fu*/
{_Un( R|M, R|M, EQ_R1 ), NVI(V_NO), G_NO, RG_8,FU_NO},
{_Un( M, M, NONE ), V_SAME_LOCN, G_NO, RG_,FU_NO},
{_Un( M, M, NONE ), V_NO, R_MAYBSTRMOVE, RG_,FU_NO},
/*Un( R|M|C,R|M, NONE ), V_NO, R_SPLIT8, RG_8,FU_NO,*/
/*Un( ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_8_NEED_WORD,FU_NO,*/
{_Un( ANY, ANY, NONE ), V_NO, R_SPLIT8, RG_,FU_NO},
};
static opcode_entry MoveXX[] = {
/**************************/
/* op res eq verify gen reg fu*/
{_Un( M|U, M|U, EQ_R1 ), NVI(V_NO), G_NO, RG_,FU_NO},
{_UnPP( M, M, NONE ), V_SAME_LOCN, G_NO, RG_,FU_NO},
{_Un( U, ANY, NONE ), V_NO, R_FORCEOP1MEM, RG_,FU_NO},
{_Un( ANY, U, NONE ), V_NO, R_FORCERESMEM, RG_,FU_NO},
{_Un( ANY, ANY, NONE ), V_NO, R_MAKESTRMOVE, RG_,FU_NO},
};
static opcode_entry CmpXX[] = {
/*************************/
/* op1 op2 verify gen reg fu*/
{_Side( U, ANY ), V_NO, R_FORCEOP1MEM, RG_,FU_NO},
{_Side( ANY, U ), V_NO, R_FORCEOP2MEM, RG_,FU_NO},
{_Side( ANY, ANY ), V_NO, R_MAKESTRCMP, RG_,FU_NO},
};
opcode_entry String[] = {
/**************************/
/* op1 len verify gen reg fu*/
{_Side( ANY, ANY ), V_NO, G_REPOP, RG_,FU_ALU1},
};
static opcode_entry LoadA4[] = {
/**************************/
/* op res eq verify gen reg fu*/
{_Un( M, ANY, NONE ), V_NO, R_LOADLONGADDR, RG_DBL_OR_PTR,FU_NO},
{_Un( ANY, ANY, NONE ), V_NO, R_FORCEOP1MEM, RG_DBL_OR_PTR,FU_NO},
};
static opcode_entry LoadA[] = {
/*************************/
/* op res eq verify gen reg fu*/
/* optimizing reductions*/
{_Un( M, ANY, NONE ), V_OFFSETZERO, R_MOVEINDEX, RG_WORD,FU_NO},
/* instructions we can generate*/
{_UnPP( M, M, NONE ), V_OP1ADDR, G_MADDR, RG_,FU_ALU1},
{_UnPP( M, R, NONE ), V_OP1ADDR, G_RADDR, RG_WORD,FU_ALU1},
{_UnPP( M, R, NONE ), V_NO, G_LOADADDR, RG_WORD,FU_ALU1},
/* simplifying reductions*/
{_Un( M, ANY, NONE ), V_OP1ADDR, G_UNKNOWN, RG_WORD,FU_NO},
{_Un( M, M, NONE ), V_NO, R_RESREG, RG_WORD,FU_NO},
{_Un( M, ANY, NONE ), V_NO, G_UNKNOWN, RG_WORD_NEED,FU_NO},
{_Un( ANY, ANY, NONE ), V_NO, R_FORCEOP1MEM, RG_WORD,FU_NO},
};
static opcode_entry Not1[] = {
/************************/
/* op res eq verify gen reg fu*/
/* instructions we can generate*/
{_UnPP( R, R, EQ_R1 ), V_NO, G_R1, RG_BYTE,FU_ALU1},
{_UnPP( M, M, EQ_R1 ), V_NO, G_M1, RG_,FU_ALU1},
/* Reduction routines*/
{_Un( R|M|C,R, NONE ), V_NO, R_MOVOP1RES, RG_BYTE,FU_NO},
{_Un( R|M|C,M, NONE ), V_NO, R_MOVOP1RES, RG_BYTE,FU_NO},
{_Un( ANY, R, NONE ), V_NO, G_UNKNOWN, RG_BYTE,FU_NO},
{_Un( R, ANY, NONE ), V_NO, G_UNKNOWN, RG_BYTE,FU_NO},
{_Un( ANY, ANY, EQ_R1 ), V_NO, G_UNKNOWN, RG_BYTE,FU_NO},
{_Un( ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_BYTE_NEED,FU_NO},
};
static opcode_entry Not2[] = {
/************************/
/* op res eq verify gen reg fu*/
/* instructions we can generate*/
{_UnPP( R, R, EQ_R1 ), V_NO, G_R1, RG_WORD,FU_ALU1},
{_UnPP( M, M, EQ_R1 ), V_NO, G_M1, RG_,FU_ALU1},
/* Reduction routines*/
{_Un( R|M|C,R, NONE ), V_NO, R_MOVOP1RES, RG_WORD,FU_NO},
{_Un( R|M|C,M, NONE ), V_NO, R_MOVOP1RES, RG_WORD,FU_NO},
{_Un( ANY, R, NONE ), V_NO, G_UNKNOWN, RG_WORD,FU_NO},
{_Un( R, ANY, NONE ), V_NO, G_UNKNOWN, RG_WORD,FU_NO},
{_Un( ANY, ANY, EQ_R1 ), V_NO, G_UNKNOWN, RG_WORD,FU_NO},
{_Un( ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_WORD_NEED,FU_NO},
};
static opcode_entry Not4[] = {
/************************/
/* op res eq verify gen reg fu*/
{_Un( ANY, ANY, NONE ), V_NO, R_SPLITUNARY, RG_DOUBLE,FU_NO},
};
static opcode_entry Not8[] = {
/************************/
/* op res eq verify gen reg fu*/
{_Un( ANY, ANY, NONE ), V_NO, R_SPLIT8, RG_8,FU_NO},
};
static opcode_entry Neg1[] = {
/************************/
/* op res eq verify gen reg fu*/
/* instructions we can generate*/
{_Un( R, R, EQ_R1 ), V_NO, G_R1, RG_BYTE,FU_ALU1},
{_Un( M, M, EQ_R1 ), V_NO, G_M1, RG_,FU_ALU1},
/* Reduction routines*/
{_Un( R|M|C,R, NONE ), V_NO, R_MOVOP1RES, RG_BYTE,FU_NO},
{_Un( R|M|C,M, NONE ), V_NO, R_MOVOP1RES, RG_BYTE,FU_NO},
{_Un( ANY, R, NONE ), V_NO, G_UNKNOWN, RG_BYTE,FU_NO},
{_Un( R, ANY, NONE ), V_NO, G_UNKNOWN, RG_BYTE,FU_NO},
{_Un( ANY, ANY, EQ_R1 ), V_NO, G_UNKNOWN, RG_BYTE,FU_NO},
{_Un( ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_BYTE_NEED,FU_NO},
};
static opcode_entry Neg2[] = {
/************************/
/* op res eq verify gen reg fu*/
/* instructions we can generate*/
{_Un( R, R, EQ_R1 ), V_NO, G_R1, RG_WORD,FU_ALU1},
{_Un( M, M, EQ_R1 ), V_NO, G_M1, RG_,FU_ALU1},
/* Reduction routines*/
{_Un( R|M|C,R, NONE ), V_NO, R_MOVOP1RES, RG_WORD,FU_NO},
{_Un( R|M|C,M, NONE ), V_NO, R_MOVOP1RES, RG_WORD,FU_NO},
{_Un( ANY, R, NONE ), V_NO, G_UNKNOWN, RG_WORD,FU_NO},
{_Un( R, ANY, NONE ), V_NO, G_UNKNOWN, RG_WORD,FU_NO},
{_Un( ANY, ANY, EQ_R1 ), V_NO, G_UNKNOWN, RG_WORD,FU_NO},
{_Un( ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_WORD_NEED,FU_NO},
};
static opcode_entry Neg4[] = {
/************************/
/* op res eq verify gen reg fu*/
{_Un( ANY, ANY, NONE ), V_NO, R_SPLITNEG, RG_,FU_NO},
};
static opcode_entry Neg8[] = {
/************************/
/* op res eq verify gen reg fu*/
{_Un( ANY, ANY, NONE ), V_NO, R_SPLIT8NEG, RG_8,FU_NO},
};
static opcode_entry NegF[] = {
/************************/
/**/
{_Un( ANY, ANY, NONE ), V_NO, R_MAKEFNEG, RG_,FU_NO},
};
static opcode_entry RTCall[] = {
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