i86table.c

来自「开放源码的编译器open watcom 1.6.0版的源代码」· C语言 代码 · 共 1,444 行 · 第 1/5 页

static  opcode_entry    SubCP[] = {
/*************************/
/*       op1   op2   res   eq      verify          gen           reg fu*/
{_Bin(   ANY,  ANY,  ANY,  NONE  ),V_NO,           R_MAKEU2,     RG_,FU_NO},
};


static  opcode_entry    SubPT[] = {
/*************************/
/*       op1   op2   res   eq      verify          gen           reg fu*/
{_Bin(   ANY,  C,    ANY,  NONE  ),V_NO,           R_MAKEADD,    RG_,FU_NO},
{_Bin(   ANY,  ANY,  ANY,  NONE  ),V_NO,           R_MAKECALL, RG_,FU_NO},
{_Bin(   ANY,  ANY,  ANY,  NONE  ),V_NO,           R_NEGADD,     RG_,FU_NO},
};


/* Binary Logical 8 bytes operations: AND, OR, XOR */
static  opcode_entry    Log8[] = {
/************************/
/*       op1   op2   res  eq      verify          gen           reg fu*/
{_Bin(   ANY,  ANY,  ANY, NONE ), V_NO,           R_SPLIT8BIN,   RG_8,FU_NO},
};


static  opcode_entry    Or1[] = {
/***********************/
/*       op1   op2   res   eq      verify          gen           reg fu*/

/* WATCH OUT: Both OR and XOR come through this table!*/
/* optimizing reductions*/

{_Bin(   ANY,  C,    ANY,  NONE ), NVI(V_OP2ZERO), R_MAKEMOVE,   RG_BYTE,FU_NO},

/* instructions that we can generate*/

{_BinSC( R,    C,    R,    EQ_R1 ),V_NO,           G_AC,         RG_BYTE_ACC,FU_ALU1},
{_BinSC( R,    C,    R,    EQ_R1 ),V_NO,           G_RC,         RG_BYTE,FU_ALU1},
{_BinSC( M,    C,    M,    EQ_R1 ),V_NO,           G_MC,         RG_,FU_ALU1},
{_BinSC( R,    R,    R,    EQ_R1 ),V_NO,           G_RR2,        RG_BYTE,FU_ALU1},
{_BinSC( R,    M,    R,    EQ_R1 ),V_NO,           G_RM2,        RG_BYTE,FU_ALU1},
{_BinSC( M,    R,    M,    EQ_R1 ),V_NO,           G_MR2,        RG_BYTE,FU_ALU1},

/* simplifying reductions*/

{_Bin(   C,    R|M|U,ANY,  NONE ), V_NO,           R_SWAPOPS,    RG_BYTE,FU_NO},
{_Bin(   R|M,  R|M|C,R|M,  EQ_R1 ),V_NO,           R_LOADOP2,    RG_BYTE,FU_NO},
{_Bin(   R|M|C,R|M,  R|M,  EQ_R2 ),V_NO,           R_SWAPOPS,    RG_BYTE,FU_NO},
{_Bin(   R,    ANY,  ANY,  NONE ), V_SWAP_GOOD,    R_SWAPOPS,    RG_BYTE,FU_NO},
{_Bin(   R|M|C,R|M|C,R|M,  NONE ), V_NO,           R_USEREGISTER,RG_BYTE,FU_NO},
{_Bin(   R|C,  ANY,  ANY,  EQ_R2), V_NO,           G_UNKNOWN,    RG_BYTE,FU_NO},
{_Bin(   ANY,  R|C,  ANY,  EQ_R1), V_NO,           G_UNKNOWN,    RG_BYTE,FU_NO},
{_Bin(   ANY,  ANY,  ANY,  NONE ), V_NO,           G_UNKNOWN,    RG_BYTE_NEED,FU_NO},
};


static  opcode_entry    Or2[] = {
/***********************/
/*       op1   op2   res   eq      verify          gen           reg fu*/

/* WATCH OUT: Both OR and XOR come through this table!*/
/* optimizing reductions*/

{_Bin(   ANY,  C,    ANY,  NONE ), NVI(V_OP2ZERO), R_MAKEMOVE,   RG_WORD,FU_NO},
{_Bin(   R|M|U,C,    R|M|U,EQ_R1), NVI(V_OP2LOW_B_ZERO),R_CYPHIGH,RG_TWOBYTE,FU_NO},
{_Bin(   R|M|U,C,    R|M|U,EQ_R1), NVI(V_OP2HIGH_B_ZERO),R_CYPLOW,RG_TWOBYTE,FU_NO},

/* instructions that we can generate*/

{_BinSC( R,    C,    R,    EQ_R1 ),V_NO,           G_AC,         RG_WORD_ACC,FU_ALU1},
{_BinSC( R,    C,    R,    EQ_R1 ),V_NO,           G_RC,         RG_WORD,FU_ALU1},
{_BinSC( M,    C,    M,    EQ_R1 ),V_NO,           G_MC,         RG_,FU_ALU1},
{_BinSC( R,    R,    R,    EQ_R1 ),V_NO,           G_RR2,        RG_WORD,FU_ALU1},
{_BinSC( R,    M,    R,    EQ_R1 ),V_NO,           G_RM2,        RG_WORD,FU_ALU1},
{_BinSC( M,    R,    M,    EQ_R1 ),V_NO,           G_MR2,        RG_WORD,FU_ALU1},

/* simplifying reductions*/

{_Bin(   C,    R|M|U,ANY,  NONE ), V_NO,           R_SWAPOPS,    RG_WORD,FU_NO},
{_Bin(   R|M,  R|M|C,R|M,  EQ_R1 ),V_NO,           R_LOADOP2,    RG_WORD,FU_NO},
{_Bin(   R|M|C,R|M,  R|M,  EQ_R2 ),V_NO,           R_SWAPOPS,    RG_WORD,FU_NO},
{_Bin(   R,    ANY,  ANY,  NONE ), V_SWAP_GOOD,    R_SWAPOPS,    RG_WORD,FU_NO},
{_Bin(   R|M|C,R|M|C,R|M,  NONE ), V_NO,           R_USEREGISTER,RG_WORD,FU_NO},
{_Bin(   ANY,  R|C,  ANY,  EQ_R1), V_NO,           G_UNKNOWN,    RG_WORD,FU_NO},
{_Bin(   R|C,  ANY,  ANY,  EQ_R2), V_NO,           G_UNKNOWN,    RG_WORD,FU_NO},
{_Bin(   ANY,  ANY,  ANY,  NONE ), V_NO,           G_UNKNOWN,    RG_WORD_NEED,FU_NO},
};


static  opcode_entry    Or4[] = {
/***********************/
/*       op1   op2   res   eq      verify          gen           reg fu*/
/* WATCH OUT: Both OR and XOR come through this table!*/
{_Bin(   ANY,  ANY,  ANY, NONE ), V_NO,           R_SPLITOP,    RG_DOUBLE,FU_NO},
};


static  opcode_entry    And1[] = {
/************************/
/*       op1   op2   res   eq      verify          gen           reg fu*/

/* optimizing reductions*/

{_Bin(   ANY,  C,    ANY,  NONE ), NVI(V_OP2ZERO),R_MOVOP2,      RG_BYTE,FU_NO},
{_Bin(   ANY,  C,    ANY,  NONE ), NVI(V_OP2LOW_B_FF),R_MAKEMOVE,RG_BYTE,FU_NO},

/* instructions that we can generate*/

{_BinSC( R,    C,    R,    EQ_R1 ),V_NO,           G_AC,         RG_BYTE_ACC,FU_ALU1},
{_BinSC( R,    C,    R,    EQ_R1 ),V_NO,           G_RC,         RG_BYTE,FU_ALU1},
{_BinSC( M,    C,    M,    EQ_R1 ),V_NO,           G_MC,         RG_,FU_ALU1},
{_BinSC( R,    R,    R,    EQ_R1 ),V_NO,           G_RR2,        RG_BYTE,FU_ALU1},
{_BinSC( R,    M,    R,    EQ_R1 ),V_NO,           G_RM2,        RG_BYTE,FU_ALU1},
{_BinSC( M,    R,    M,    EQ_R1 ),V_NO,           G_MR2,        RG_BYTE,FU_ALU1},

/* simplifying reductions*/

{_Bin(   C,    R|M|U,ANY,  NONE ), V_NO,           R_SWAPOPS,    RG_BYTE,FU_NO},
{_Bin(   R|M,  R|M|C,R|M,  EQ_R1 ),V_NO,           R_LOADOP2,    RG_BYTE,FU_NO},
{_Bin(   R|M|C,R|M,  R|M,  EQ_R2 ),V_NO,           R_SWAPOPS,    RG_BYTE,FU_NO},
{_Bin(   R,    ANY,  ANY,  NONE ), V_SWAP_GOOD,    R_SWAPOPS,    RG_BYTE,FU_NO},
{_Bin(   R|M|C,R|M|C,R|M,  NONE ), V_NO,           R_USEREGISTER,RG_BYTE,FU_NO},
{_Bin(   ANY,  R|C,  ANY,  EQ_R1), V_NO,           G_UNKNOWN,    RG_BYTE,FU_NO},
{_Bin(   R|C,  ANY,  ANY,  EQ_R2), V_NO,           G_UNKNOWN,    RG_BYTE,FU_NO},
{_Bin(   ANY,  ANY,  ANY,  NONE ), V_NO,           G_UNKNOWN,    RG_BYTE_NEED,FU_NO},
};


static  opcode_entry    And2[] = {
/************************/
/*       op1   op2   res   eq      verify          gen           reg fu*/

/* optimizing reductions*/

{_Bin(   ANY,  C,    ANY,  NONE ), NVI(V_OP2ZERO), R_MOVOP2,    RG_WORD,FU_NO},
{_Bin(   ANY,  C,    ANY,  NONE ), NVI(V_OP2LOW_W_FFFF),R_MAKEMOVE,RG_WORD,FU_NO},
{_Bin(   R|M|U,C,    R|M|U,EQ_R1), NVI(V_OP2LOW_B_FF),R_CYPHIGH,RG_TWOBYTE,FU_NO},
{_Bin(   R|M|U,C,    R|M|U,EQ_R1), NVI(V_OP2HIGH_B_FF),R_CYPLOW,RG_TWOBYTE,FU_NO},

/* instructions that we can generate*/

{_BinSC( R,    C,    R,    EQ_R1 ),V_NO,           G_AC,         RG_WORD_ACC,FU_ALU1},
{_BinSC( R,    C,    R,    EQ_R1 ),V_NO,           G_RC,         RG_WORD,FU_ALU1},
{_BinSC( M,    C,    M,    EQ_R1 ),V_NO,           G_MC,         RG_,FU_ALU1},
{_BinSC( R,    R,    R,    EQ_R1 ),V_NO,           G_RR2,        RG_WORD,FU_ALU1},
{_BinSC( R,    M,    R,    EQ_R1 ),V_NO,           G_RM2,        RG_WORD,FU_ALU1},
{_BinSC( M,    R,    M,    EQ_R1 ),V_NO,           G_MR2,        RG_WORD,FU_ALU1},

/* simplifying reductions*/

{_Bin(   C,    R|M|U,ANY,  NONE ), V_NO,           R_SWAPOPS,    RG_WORD,FU_NO},
{_Bin(   R|M,  R|M|C,R|M,  EQ_R1 ),V_NO,           R_LOADOP2,    RG_WORD,FU_NO},
{_Bin(   R|M|C,R|M,  R|M,  EQ_R2 ),V_NO,           R_SWAPOPS,    RG_WORD,FU_NO},
{_Bin(   R,    ANY,  ANY,  NONE ), V_SWAP_GOOD,    R_SWAPOPS,    RG_WORD,FU_NO},
{_Bin(   R|M|C,R|M|C,R|M,  NONE ), V_NO,           R_USEREGISTER,RG_WORD,FU_NO},
{_Bin(   ANY,  R|C,  ANY,  EQ_R1), V_NO,           G_UNKNOWN,    RG_WORD,FU_NO},
{_Bin(   R|C,  ANY,  ANY,  EQ_R2), V_NO,           G_UNKNOWN,    RG_WORD,FU_NO},
{_Bin(   ANY,  ANY,  ANY,  NONE ), V_NO,           G_UNKNOWN,    RG_WORD_NEED,FU_NO},
};


static  opcode_entry    And4[] = {
/************************/
/*       op1   op2   res   eq      verify          gen           reg fu*/
{_Bin(   C,    R|M|U,ANY, NONE ), V_NO,           R_SWAPOPS,    RG_DOUBLE,FU_NO},
{_Bin(   ANY,  C,    ANY, EQ_R1), NVI(V_OP2HIGH_W_FFFF),R_CYPLOW,RG_DOUBLE,FU_NO},
{_Bin(   ANY,  C,    ANY, EQ_R1), NVI(V_OP2LOW_W_FFFF),R_CYPHIGH,RG_DOUBLE,FU_NO},
{_Bin(   ANY,  ANY,  ANY, NONE ), V_NO,           R_SPLITOP,    RG_DOUBLE,FU_NO},
};


static  opcode_entry    Rtn4C[] = {
/*************************/
/*       op1   op2   res   eq      verify          gen           reg fu*/
{_Bin(   R,    R,    R,    BOTH_EQ ),V_NO,         R_MAKECALL,   RG_4CRTN,FU_NO},
{_Bin(   ANY,  R,    R,    EQ_R2 ),V_NO,           R_SWAPOPS,    RG_4CRTN,FU_NO},

/* Fall into Rtn4 table*/
/**** NB. Rtn4 points here ****/
/* static  opcode_entry    Rtn4[] = { */
/************************/
/*       op1   op2   res   eq      verify          gen*/
{_Bin(   ANY,  ANY,  ANY,  NONE ), V_NO,           R_MAKECALL,   RG_,FU_NO},
};

/* Point at where Rtn4 used to start */
/*************************/
#define Rtn4 &Rtn4C[2]

static  opcode_entry    Mul1[] = {
/************************/
/*       op1   op2   res   eq      verify          gen           reg fu*/

/* instructions we can generate*/

{_Bin(   R,    R,    R,    NONE ), V_NO,           G_R2,         RG_BYTE_MUL,FU_IMUL},
{_Bin(   R,    M,    R,    NONE ), V_NO,           G_M2,         RG_BYTE_MUL,FU_IMUL},

/* simplifying reductions*/

{_Bin(   R,    C,    R,    NONE ), V_NO,           R_MOVOP2TEMP,RG_BYTE_MUL,FU_NO},
{_Bin(   R,    U,    R,    NONE ), V_NO,           G_UNKNOWN,    RG_BYTE_MUL,FU_NO},
{_Bin(   ANY,  ANY,  ANY,  NONE ), V_NO,           R_MULREGISTER,RG_BYTE_MUL,FU_NO},
};


static  opcode_entry    Mul2[] = {
/************************/
/*       op1   op2   res   eq      verify          gen           reg fu*/

/* instructions we can generate*/

// _Bin(        R,    C,    R,    NONE ),V_OP2ONE,        R_MULSAVEFACE,RG_WORD_MUL,FU_NO},
{_Bin(   R,    C,    R,    NONE ),V_80186,         G_186RMUL,    RG_WORD,FU_IMUL},
{_Bin(   M,    C,    R,    NONE ),V_80186,         G_186MUL,     RG_WORD,FU_IMUL},

/* simplifying reductions*/

{_Bin(   U,    C,    R,    NONE ),V_80186,         G_UNKNOWN,    RG_WORD,FU_NO},
{_Bin(   ANY,  C,    M,    NONE ),V_80186,         R_RESREG,     RG_WORD,FU_NO},
{_Bin(   ANY,  C,    U|M,  NONE ),V_80186,         G_UNKNOWN,    RG_WORD_NEED,FU_NO},
{_Bin(   ANY,  C,    R,    NONE ),V_80186,         G_UNKNOWN,    RG_WORD_NEED,FU_NO},
{_Bin(   C,    ANY,  ANY,  NONE ),V_80186,         R_SWAPOPS,    RG_WORD,FU_NO},

/* instructions we can generate*/

{_Bin(   R,    R,    R,    EQ_R1 ),V_80386,        G_0FRR2,      RG_WORD,FU_IMUL},
{_Bin(   R,    M,    R,    EQ_R1 ),V_80386,        G_0FRM2,      RG_WORD,FU_IMUL},

/* simplifying reductions*/

{_Bin(   C,    R|M|U,ANY,  NONE ), V_80386,        R_SWAPOPS,    RG_WORD,FU_NO},
{_Bin(   R|M|C,R,    R,    EQ_R2 ),V_80386,        R_SWAPOPS,    RG_WORD,FU_NO},
{_Bin(   R,    ANY,  ANY,  NONE ), V_SWAP_GOOD_386,R_SWAPOPS,    RG_WORD,FU_NO},
{_Bin(   R|M|C,R|M|C,R|M,  NONE ), V_80386,        R_USEREGISTER,RG_WORD,FU_NO},
{_Bin(   ANY,  ANY,  ANY,  NONE ), V_80386,        G_UNKNOWN,    RG_WORD_NEED,FU_NO},

/* instructions we can generate*/

{_Bin(   R,    R,    R,    NONE ), V_NO,           G_R2,         RG_WORD_MUL,FU_IMUL},
{_Bin(   R,    M,    R,    NONE ), V_NO,           G_M2,         RG_WORD_MUL,FU_IMUL},

/* simplifying reductions*/

{_Bin(   R,    C,    R,    NONE ), V_NO,           R_MOVOP2TEMP,RG_WORD_MUL,FU_NO},
{_Bin(   R,    U,    R,    NONE ), V_NO,           G_UNKNOWN,    RG_WORD_MUL,FU_NO},
{_Bin(   ANY,  ANY,  ANY,  NONE ), V_NO,           R_MULREGISTER,RG_WORD_MUL,FU_NO},
};


static  opcode_entry    ExtMul[] = {
/**************************/
/*       op1   op2   res   eq      verify          gen           reg fu*/
{_Bin(   ANY,  ANY,  ANY,  NONE ), V_NO,           R_MAKECYPMUL, RG_,FU_NO},
};


static  opcode_entry    Div1[] = {
/************************/
/*       op1   op2   res   eq      verify          gen           reg fu*/
{_Bin(   R,    C,    R,    NONE ), V_OP2TWO,       G_DIV2,       RG_BYTE_DIV,FU_IDIV},
{_Bin(   R,    C,    R,    NONE ), V_OP2POW2_286,  G_POW2DIV_286,RG_BYTE_DIV,FU_IDIV},
{_Bin(   R,    C,    R,    NONE ), V_OP2POW2,      G_POW2DIV,    RG_BYTE_DIVPOW2,FU_IDIV},
{_Bin(   ANY,  C,    ANY,  NONE ), V_OP2POW2,      R_DIVREGISTER,RG_BYTE_DIV,FU_NO},
{_Bin(   ANY,  C,    ANY,  NONE ), V_NO,           R_MOVOP2TEMP, RG_BYTE_DIV,FU_NO},
{_Bin(   R,    R,    R,    NONE ), V_NO,           G_R2,         RG_BYTE_DIV,FU_IDIV},
{_Bin(   R,    M,    R,    NONE ), V_NO,           G_M2,         RG_BYTE_DIV,FU_IDIV},
{_Bin(   R,    U|M,  R,    NONE ), V_DIV_BUG,      R_LOADOP2,    RG_BYTE_DIV,FU_NO},
{_Bin(   R,    U,    R,    NONE ), V_NO,           G_UNKNOWN,    RG_BYTE_DIV,FU_NO},
{_Bin(   ANY,  ANY,  ANY,  NONE ), V_NO,           R_DIVREGISTER,RG_BYTE_DIV,FU_NO},
};


static  opcode_entry    Div2[] = {
/************************/
/*       op1   op2   res   eq      verify          gen           reg fu*/
// _Bin(        R,    C,    R,    NONE ), V_OP2ONE,       R_SAVEFACE,   RG_WORD_DIV,FU_NO},
{_Bin(   R,    C,    R,    NONE ), V_OP2TWO,       G_DIV2,       RG_WORD_DIV,FU_IDIV},
{_Bin(   R,    C,    R,    NONE ), V_OP2POW2_286,  G_POW2DIV_286,RG_WORD_DIV,FU_IDIV},
{_Bin(   R,    C,    R,    NONE ), V_OP2POW2,      G_POW2DIV,    RG_WORD_DIVPOW2,FU_IDIV},
{_Bin(   ANY,  C,    ANY,  NONE ), V_OP2POW2,      R_DIVREGISTER,RG_WORD_DIV,FU_NO},
{_Bin(   ANY,  C,    ANY,  NONE ), V_NO,           R_MOVOP2TEMP, RG_WORD_DIV,FU_NO},
{_Bin(   R,    R,    R,    NONE ), V_NO,           G_R2,         RG_WORD_DIV,FU_IDIV},
{_Bin(   R,    M,    R,    NONE ), V_NO,           G_M2,         RG_WORD_DIV,FU_IDIV},
{_Bin(   R,    U|M,  R,    NONE ), V_DIV_BUG,      R_LOADOP2,    RG_WORD_DIV,FU_NO},
{_Bin(   R,    U,    R,    NONE ), V_NO,           G_UNKNOWN,    RG_WORD_DIV,FU_NO},
{_Bin(   ANY,  ANY,  ANY,  NONE ), V_NO,           R_DIVREGISTER,RG_WORD_DIV,FU_NO},
};