i86table.c
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C
1,444 行
/****************************************************************************
*
* Open Watcom Project
*
* Portions Copyright (c) 1983-2002 Sybase, Inc. All Rights Reserved.
*
* ========================================================================
*
* This file contains Original Code and/or Modifications of Original
* Code as defined in and that are subject to the Sybase Open Watcom
* Public License version 1.0 (the 'License'). You may not use this file
* except in compliance with the License. BY USING THIS FILE YOU AGREE TO
* ALL TERMS AND CONDITIONS OF THE LICENSE. A copy of the License is
* provided with the Original Code and Modifications, and is also
* available at www.sybase.com/developer/opensource.
*
* The Original Code and all software distributed under the License are
* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND SYBASE AND ALL CONTRIBUTORS HEREBY DISCLAIM
* ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR
* NON-INFRINGEMENT. Please see the License for the specific language
* governing rights and limitations under the License.
*
* ========================================================================
*
* Description: Table of possible instructions and reductions for each
* opcode.
*
****************************************************************************/
#include "standard.h"
#include "coderep.h"
#include "pattern.h"
#include "regset.h"
#include "model.h"
#include "vergen.h"
#include "tables.h"
#include "funits.h"
extern opcode_entry Cmp87[];
extern opcode_entry Un87[];
extern opcode_entry Un87Func[];
extern opcode_entry Bin87[];
extern opcode_entry Bin87Func[];
extern opcode_entry Move87S[];
extern opcode_entry Move87D[];
extern opcode_entry Push87S[];
extern opcode_entry Push87D[];
static opcode_entry Add1[] = {
/************************/
/* op1 op2 res eq verify gen reg fu*/
/* optimizing reductions*/
{_Bin( ANY, C, ANY, NONE ), NVI(V_OP2ZERO), R_MAKEMOVE, RG_BYTE,FU_NO},
{_Bin( ANY, C, ANY, NONE ), NVI(V_OP2NEG), R_MAKESUB, RG_BYTE,FU_NO},
{_Bin( R, U, R, NONE ), V_CONSTTEMP, R_TEMP2CONST, RG_BYTE,FU_NO},
/* instructions that we can generate*/
{_BinSC( R, C, R, EQ_R1 ),V_OP2ONE, G_R1, RG_BYTE,FU_ALU1},
{_BinSC( R, C, R, EQ_R1 ),V_NO, G_AC, RG_BYTE_ACC,FU_ALU1},
{_BinSC( R, C, R, EQ_R1 ),V_NO, G_RC, RG_BYTE,FU_ALU1},
{_BinSC( M, C, M, EQ_R1 ),V_OP2ONE, G_M1, RG_,FU_ALU1},
{_BinSC( M, C, M, EQ_R1 ),V_NO, G_MC, RG_,FU_ALU1},
{_BinSC( R, R, R, EQ_R1 ),V_NO, G_RR2, RG_BYTE,FU_ALU1},
{_BinSC( R, M, R, EQ_R1 ),V_NO, G_RM2, RG_BYTE,FU_ALU1},
{_BinSC( M, R, M, EQ_R1 ),V_NO, G_MR2, RG_BYTE,FU_ALU1},
/* simplifying reductions*/
{_Bin( C, R|M|U,ANY, NONE ), V_NO, R_SWAPOPS, RG_BYTE,FU_NO},
{_Bin( R|M, R|M|C,R|M, EQ_R1 ),V_NO, R_LOADOP2, RG_BYTE,FU_NO},
{_Bin( R|M|C,R|M, R|M, EQ_R2 ),V_NO, R_SWAPOPS, RG_BYTE,FU_NO},
{_Bin( R, ANY, ANY, NONE ), V_SWAP_GOOD, R_SWAPOPS, RG_BYTE,FU_NO},
{_Bin( R|M|C,R|M|C,R|M, NONE ), V_NO, R_USEREGISTER,RG_BYTE,FU_NO},
{_Bin( ANY, R|C, ANY, EQ_R1), V_NO, G_UNKNOWN, RG_BYTE,FU_NO},
{_Bin( R|C, ANY, ANY, EQ_R2), V_NO, G_UNKNOWN, RG_BYTE,FU_NO},
{_Bin( ANY, ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_BYTE_NEED,FU_NO},
};
static opcode_entry Add2[] = {
/************************/
/* op1 op2 res eq verify gen reg fu*/
/* optimizing reductions*/
{_Bin( ANY, C, ANY, NONE ), NVI(V_OP2ZERO), R_MAKEMOVE, RG_WORD,FU_NO},
{_Bin( ANY, C, ANY, NONE ), NVI(V_OP2NEG), R_MAKESUB, RG_WORD,FU_NO},
{_Bin( R|M|U,C, R|M|U,EQ_R1), NVI(V_OP2LOW_B_ZERO),R_CYPHIGH,RG_TWOBYTE,FU_NO},
{_Bin( R, U, R, NONE ), V_CONSTTEMP, R_TEMP2CONST, RG_WORD,FU_NO},
/* instructions we can generate*/
{_BinSC( R, C, R, EQ_R1 ),V_OP1SP, G_RC, RG_WORD,FU_ALU1},
{_BinSC( R, C, R, EQ_R1 ),V_OP2ONE, G_WORDR1, RG_WORD,FU_ALU1},
{_BinSC( R, C, R, EQ_R1 ),V_OP2TWO_SIZE, G_WORDR1, RG_WORD,FU_ALU1},
{_BinSC( R, C, R, EQ_R1 ),V_NO, G_AC, RG_WORD_ACC,FU_ALU1},
{_BinSC( R, C, R, EQ_R1 ),V_NO, G_RC, RG_WORD,FU_ALU1},
{_BinPP( R, C, R, NONE ), V_LEA, G_LEA, RG_LEA,FU_ALU1},
{_BinSC( M, C, M, EQ_R1 ),V_OP2ONE, G_M1, RG_,FU_ALU1},
/* Fall into AddExt table*/
/**** NB. AddExt points here ****/
/* opcode_entry AddExt[] = { */
/**************************/
/* op1 op2 res eq verify gen*/
/* instructions that we can generate*/
{_BinSC( R, C, R, EQ_R1 ),V_NO, G_AC, RG_WORD_ACC,FU_ALU1},
{_BinSC( R, C, R, EQ_R1 ),V_NO, G_RC, RG_WORD,FU_ALU1},
{_BinSC( M, C, M, EQ_R1 ),V_NO, G_MC, RG_,FU_ALU1},
{_BinSC( R, R, R, EQ_R1 ),V_NO, G_RR2, RG_WORD,FU_ALU1},
{_BinSC( R, M, R, EQ_R1 ),V_NO, G_RM2, RG_WORD,FU_ALU1},
{_BinSC( M, R, M, EQ_R1 ),V_NO, G_MR2, RG_WORD,FU_ALU1},
/* simplifying reductions*/
{_Bin( R|M, R|M|C,R|M, EQ_R1 ),V_NO, R_LOADOP2, RG_WORD,FU_NO},
{_Bin( R|M|C,R|M, R|M, EQ_R2 ),V_NO, R_SWAPOPS, RG_WORD,FU_NO},
{_Bin( R, ANY, ANY, NONE ), V_SWAP_GOOD, R_SWAPOPS, RG_WORD,FU_NO},
{_Bin( R|M|C,R|M|C,R|M, NONE ), V_NO, R_USEREGISTER,RG_WORD,FU_NO},
{_Bin( ANY, R|C, ANY, EQ_R1), V_NO, G_UNKNOWN, RG_WORD,FU_NO},
{_Bin( R|C, ANY, ANY, EQ_R2), V_NO, G_UNKNOWN, RG_WORD,FU_NO},
{_Bin( ANY, ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_WORD_NEED,FU_NO},
};
/* Point at where AddExt used to start */
/*************************/
#define AddExt &Add2[11]
static opcode_entry Add4[] = {
/************************/
/* op1 op2 res eq verify gen reg fu*/
{_Bin( ANY, ANY, ANY, NONE ), V_NO, R_SPLITOP, RG_DOUBLE,FU_NO},
};
static opcode_entry Add8[] = {
/************************/
/* op1 op2 res eq verify gen reg fu*/
{_Bin( ANY, ANY, ANY, NONE ), V_NO, R_SPLIT8BIN, RG_8,FU_NO},
};
static opcode_entry AddCP[] = {
/*************************/
/* op1 op2 res eq verify gen reg fu*/
/*Bin( C, R|M|U,ANY, NONE ),V_NO, R_SWAPOPS, RG_DBL_OR_PTR,FU_NO,*/
{_Bin( ANY, C, ANY, NONE ), NVI(V_OP2ZERO), R_MAKEMOVE, RG_DBL_OR_PTR,FU_NO},
{_Bin( ANY, C, ANY, NONE ), NVI(V_OP2NEG), R_MAKESUB, RG_DBL_OR_PTR,FU_NO},
{_Bin( ANY, ANY, ANY, NONE ),V_NO, R_MAKEU2, RG_DBL_OR_PTR,FU_NO},
};
static opcode_entry AddPT[] = {
/*************************/
/* op1 op2 res eq verify gen reg fu*/
/*Bin( C, R|M|U,ANY, NONE ),V_NO, R_SWAPOPS, RG_,FU_NO,*/
{_Bin( ANY, ANY, ANY, NONE ),V_NO, R_MAKECALL, RG_,FU_NO},
};
static opcode_entry Sub1[] = {
/************************/
/* op1 op2 res eq verify gen reg fu*/
/* optimizing reductions*/
{_Bin( C, ANY, ANY, NONE ), NVI(V_OP1ZERO), R_MAKENEG, RG_BYTE,FU_NO},
{_Bin( ANY, C, ANY, NONE ), NVI(V_OP2ZERO), R_MAKEMOVE, RG_BYTE,FU_NO},
{_Bin( ANY, C, ANY, NONE ), NVI(V_OP2NEG), R_MAKEADD, RG_BYTE,FU_NO},
{_Bin( R, U, R, NONE ), V_CONSTTEMP, R_TEMP2CONST, RG_BYTE,FU_NO},
/* instructions that we can generate*/
{_BinSC( R, C, R, EQ_R1 ),V_OP2ONE, G_R1, RG_BYTE,FU_ALU1},
{_BinCC( R, C, R, EQ_R1 ),V_NO, G_AC, RG_BYTE_ACC,FU_ALU1},
{_BinCC( R, C, R, EQ_R1 ),V_NO, G_RC, RG_BYTE,FU_ALU1},
{_BinSC( M, C, M, EQ_R1 ),V_OP2ONE, G_M1, RG_,FU_ALU1},
{_BinCC( M, C, M, EQ_R1 ),V_NO, G_MC, RG_,FU_ALU1},
{_BinCC( R, R, R, EQ_R1 ),V_NO, G_RR2, RG_BYTE,FU_ALU1},
{_BinCC( R, M, R, EQ_R1 ),V_NO, G_RM2, RG_BYTE,FU_ALU1},
{_BinCC( M, R, M, EQ_R1 ),V_NO, G_MR2, RG_BYTE,FU_ALU1},
/* simplifying reductions*/
{_Bin( R|M, R|M|C,R|M, EQ_R1 ),V_NO, R_LOADOP2, RG_BYTE,FU_NO},
{_Bin( R|M|C,R|M|C,R|M, NONE ), V_NO, R_USEREGISTER,RG_BYTE,FU_NO},
{_Bin( ANY, R|C, ANY, EQ_R1), V_NO, G_UNKNOWN, RG_BYTE,FU_NO},
{_Bin( ANY, ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_BYTE_NEED,FU_NO},
};
static opcode_entry Sub2[] = {
/************************/
/* op1 op2 res eq verify gen reg fu*/
/* optimizing reductions*/
{_Bin( C, ANY, ANY, NONE ), NVI(V_OP1ZERO), R_MAKENEG, RG_WORD,FU_NO},
{_Bin( ANY, C, ANY, NONE ), NVI(V_OP2ZERO), R_MAKEMOVE, RG_WORD,FU_NO},
{_Bin( ANY, C, ANY, NONE ), NVI(V_OP2NEG), R_MAKEADD, RG_WORD,FU_NO},
{_Bin( R, U, R, NONE ), V_CONSTTEMP, R_TEMP2CONST, RG_WORD,FU_NO},
/* instructions we can generate*/
{_BinSC( R, C, R, EQ_R1 ),V_OP1SP, G_RC, RG_WORD,FU_ALU1},
{_BinSC( R, C, R, EQ_R1 ),V_OP2ONE, G_WORDR1, RG_WORD,FU_ALU1},
{_BinSC( R, C, R, EQ_R1 ),V_OP2TWO_SIZE, G_WORDR1, RG_WORD,FU_ALU1},
{_BinCC( R, C, R, EQ_R1 ),V_NO, G_AC, RG_WORD_ACC,FU_ALU1},
{_BinCC( R, C, R, EQ_R1 ),V_NO, G_RC, RG_WORD,FU_ALU1},
{_BinPP( R, C, R, NONE ), V_LEA, G_LEA, RG_LEA,FU_ALU1},
{_BinSC( M, C, M, EQ_R1 ),V_OP2ONE, G_M1, RG_,FU_ALU1},
/* cheap pointer subtractions come through here since the result type is I2*/
{_Bin( ANY, ANY, ANY, NONE ),V_OP2PTR, R_CPSUB, RG_,FU_NO},
/* from here on down is identical to SubExt table except SubExt uses _BinSC*/
/* instructions that we can generate*/
{_BinCC( R, C, R, EQ_R1 ),V_NO, G_AC, RG_WORD_ACC,FU_ALU1},
{_BinCC( R, C, R, EQ_R1 ),V_NO, G_RC, RG_WORD,FU_ALU1},
{_BinCC( M, C, M, EQ_R1 ),V_NO, G_MC, RG_,FU_ALU1},
{_BinCC( R, R, R, EQ_R1 ),V_NO, G_RR2, RG_WORD,FU_ALU1},
{_BinCC( R, M, R, EQ_R1 ),V_NO, G_RM2, RG_WORD,FU_ALU1},
{_BinCC( M, R, M, EQ_R1 ),V_NO, G_MR2, RG_WORD,FU_ALU1},
/* simplifying reductions*/
{_Bin( R|M, R|M|C,R|M, EQ_R1 ),V_NO, R_LOADOP2, RG_WORD,FU_NO},
{_Bin( R|M|C,R|M|C,R|M, NONE ), V_NO, R_USEREGISTER,RG_WORD,FU_NO},
{_Bin( ANY, R|C, ANY, EQ_R1), V_NO, G_UNKNOWN, RG_WORD,FU_NO},
{_Bin( ANY, ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_WORD_NEED,FU_NO},
};
opcode_entry SubExt[] = {
/**************************/
/* op1 op2 res eq verify gen*/
/* instructions that we can generate*/
/* NOTE: SBB does NOT set conditions right in all cases*/
/* consider SBB AX,DX when AX==0,DX==FFFF,CF==1 -> leaves carry set and a JB*/
/* will take the jump!!!*/
{_BinSC( R, C, R, EQ_R1 ),V_NO, G_AC, RG_WORD_ACC,FU_ALU1},
{_BinSC( R, C, R, EQ_R1 ),V_NO, G_RC, RG_WORD,FU_ALU1},
{_BinSC( M, C, M, EQ_R1 ),V_NO, G_MC, RG_,FU_ALU1},
{_BinSC( R, R, R, EQ_R1 ),V_NO, G_RR2, RG_WORD,FU_ALU1},
{_BinSC( R, M, R, EQ_R1 ),V_NO, G_RM2, RG_WORD,FU_ALU1},
{_BinSC( M, R, M, EQ_R1 ),V_NO, G_MR2, RG_WORD,FU_ALU1},
/* simplifying reductions*/
{_Bin( R|M, R|M|C,R|M, EQ_R1 ),V_NO, R_LOADOP2, RG_WORD,FU_NO},
{_Bin( R|M|C,R|M|C,R|M, NONE ), V_NO, R_USEREGISTER,RG_WORD,FU_NO},
{_Bin( ANY, R|C, ANY, EQ_R1), V_NO, G_UNKNOWN, RG_WORD,FU_NO},
{_Bin( ANY, ANY, ANY, NONE ), V_NO, G_UNKNOWN, RG_WORD_NEED,FU_NO},
};
static opcode_entry Sub4[] = {
/************************/
/* op1 op2 res eq verify gen reg fu*/
/* huge pointer subtractions come through here since the result type is I4*/
{_Bin( ANY, ANY, ANY, NONE ), V_OP2PTR, R_PTSUB, RG_,FU_NO},
{_Bin( C, ANY, ANY, NONE ), NVI(V_OP1ZERO), R_MAKENEG, RG_DOUBLE,FU_NO},
{_Bin( ANY, ANY, ANY, NONE ), V_NO, R_SPLITOP, RG_DOUBLE,FU_NO},
};
static opcode_entry Sub8[] = {
/************************/
/* op1 op2 res eq verify gen reg fu*/
{_Bin( ANY, ANY, ANY, NONE ), V_NO, R_SPLIT8BIN, RG_8,FU_NO},
};
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