insmips.h

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/****************************************************************************
*
*                            Open Watcom Project
*
*    Portions Copyright (c) 1983-2002 Sybase, Inc. All Rights Reserved.
*
*  ========================================================================
*
*    This file contains Original Code and/or Modifications of Original
*    Code as defined in and that are subject to the Sybase Open Watcom
*    Public License version 1.0 (the 'License'). You may not use this file
*    except in compliance with the License. BY USING THIS FILE YOU AGREE TO
*    ALL TERMS AND CONDITIONS OF THE LICENSE. A copy of the License is
*    provided with the Original Code and Modifications, and is also
*    available at www.sybase.com/developer/opensource.
*
*    The Original Code and all software distributed under the License are
*    distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
*    EXPRESS OR IMPLIED, AND SYBASE AND ALL CONTRIBUTORS HEREBY DISCLAIM
*    ALL SUCH WARRANTIES, INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF
*    MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR
*    NON-INFRINGEMENT. Please see the License for the specific language
*    governing rights and limitations under the License.
*
*  ========================================================================
*
* Description:  Table of MIPS opcodes and corresponding decode routines.
*
****************************************************************************/


#define o( p, s, f )        ((p##ul << 26) + (s##ul << 6) + (f##ul))
#define b( p, c )           ((p##ul << 26) + (c##ul << 16))
#define s( p, c )           ((p##ul << 26) + (c##ul))
#define d( p, c )           ((p##ul << 26) + (c##ul << 21))
#define cb( c, p, s )       (((0x10ul + c) << 26) + (p##ul << 21) + (s##ul << 16))
#define cop( c, o )         (((0x10ul + c) << 26) + (0x10ul << 21) + (o##ul))

/*
      Idx,              Name,           Opcode,             Mask,           Handler
*/
// Integer opcodes first
inspick( ADD,           "add",          o(0x00,0x00,0x20),  0xfc0007ff,     MIPSReg3 )
inspick( ADDI,          "addi",         0x20000000,         0xfc000000,     MIPSImmed2 )
inspick( ADDIU,         "addiu",        0x24000000,         0xfc000000,     MIPSImmed2 )
inspick( ADDU,          "addu",         o(0x00,0x00,0x21),  0xfc0007ff,     MIPSReg3 )
inspick( AND,           "and",          o(0x00,0x00,0x24),  0xfc0007ff,     MIPSReg3 )
inspick( ANDI,          "andi",         0x30000000,         0xfc000000,     MIPSImmed2U )
inspick( BC0F,          "bc0f",         cb(0,0x08,0x00),    0xffff0000,     MIPSBranchCop )
inspick( BC0FL,         "bc0fl",        cb(0,0x08,0x02),    0xffff0000,     MIPSBranchCop )
inspick( BC0T,          "bc0t",         cb(0,0x08,0x01),    0xffff0000,     MIPSBranchCop )
inspick( BC0TL,         "bc0tl",        cb(0,0x08,0x03),    0xffff0000,     MIPSBranchCop )
inspick( BEQ,           "beq",          0x10000000,         0xfc000000,     MIPSBranch2 )
inspick( BEQL,          "beql",         0x50000000,         0xfc000000,     MIPSBranch2 )
inspick( BGEZ,          "bgez",         b(0x01,0x01),       0xfc1f0000,     MIPSBranch1 )
inspick( BGEZAL,        "bgezal",       b(0x01,0x11),       0xfc1f0000,     MIPSBranch1 )
inspick( BGEZALL,       "bgezall",      b(0x01,0x13),       0xfc1f0000,     MIPSBranch1 )
inspick( BGEZL,         "bgezl",        b(0x01,0x03),       0xfc1f0000,     MIPSBranch1 )
inspick( BGTZ,          "bgtz",         b(0x07,0x00),       0xfc1f0000,     MIPSBranch3 )
inspick( BGTZL,         "bgtzl",        b(0x17,0x00),       0xfc1f0000,     MIPSBranch3 )
inspick( BLEZ,          "blez",         b(0x06,0x00),       0xfc1f0000,     MIPSBranch3 )
inspick( BLEZL,         "blezl",        b(0x16,0x00),       0xfc1f0000,     MIPSBranch3 )
inspick( BLTZ,          "bltz",         b(0x01,0x00),       0xfc1f0000,     MIPSBranch1 )
inspick( BLTZAL,        "bltzal",       b(0x01,0x10),       0xfc1f0000,     MIPSBranch1 )
inspick( BLTZALL,       "bltzall",      b(0x01,0x12),       0xfc1f0000,     MIPSBranch1 )
inspick( BLTZL,         "bltzl",        b(0x01,0x02),       0xfc1f0000,     MIPSBranch1 )
inspick( BNE,           "bne",          0x14000000,         0xfc000000,     MIPSBranch2 )
inspick( BNEL,          "bnel",         0x54000000,         0xfc000000,     MIPSBranch2 )
inspick( BREAK,         "break",        s(0x00,0x0d),       0xfc00003f,     MIPSCode )
inspick( CACHE,         "cache",        0xbc000000,         0xfc000000,     MIPSCache )
// CFCz
// COPz
// CTCz
inspick( DADD,          "dadd",         s(0x00,0x2c),       0xfc0007ff,     MIPSReg3 )
inspick( DADDI,         "daddi",        0x60000000,         0xfc000000,     MIPSImmed2 )
inspick( DADDIU,        "daddiu",       0x64000000,         0xfc000000,     MIPSImmed2 )
inspick( DADDU,         "daddu",        o(0x00,0x00,0x2d),  0xfc0007ff,     MIPSReg3 )
inspick( DDIV,          "ddiv",         s(0x00,0x1e),       0xfc00ffff,     MIPSMulDiv )
inspick( DDIVU,         "ddivu",        s(0x00,0x1f),       0xfc00ffff,     MIPSMulDiv )
inspick( DIV,           "div",          s(0x00,0x1a),       0xfc00ffff,     MIPSMulDiv )
inspick( DIVU,          "divu",         s(0x00,0x1b),       0xfc00ffff,     MIPSMulDiv )
inspick( DMFC0,         "dmfc0",        d(0x10,0x01),       0xffe007ff,     MIPSReg2 )
inspick( DMTC0,         "dmtc0",        d(0x10,0x05),       0xffe007ff,     MIPSReg2 )
inspick( DMULT,         "dmult",        s(0x00,0x1c),       0xfc00ffff,     MIPSMulDiv )
inspick( DMULTU,        "dmultu",       s(0x00,0x1d),       0xfc00ffff,     MIPSMulDiv )
inspick( DSLL,          "dsll",         s(0x00,0x38),       0xffe0003f,     MIPSShift )
inspick( DSLLV,         "dsllv",        s(0x00,0x14),       0xfc0007ff,     MIPSReg3 )
inspick( DSLL32,        "dsll32",       s(0x00,0x3c),       0xffe0003f,     MIPSShift )
inspick( DSRA,          "dsra",         s(0x00,0x3b),       0xffe0003f,     MIPSShift )
inspick( DSRAV,         "dsrav",        s(0x00,0x17),       0xfc0007ff,     MIPSReg3 )
inspick( DSRA32,        "dsra32",       s(0x00,0x3f),       0xffe0003f,     MIPSShift )
inspick( DSRL,          "dsrl",         s(0x00,0x3a),       0xffe0003f,     MIPSShift )
inspick( DSRLV,         "dsrlv",        s(0x00,0x16),       0xfc0007ff,     MIPSReg3 )
inspick( DSRL32,        "dsrl32",       s(0x00,0x3e),       0xffe0003f,     MIPSShift )
inspick( DSUB,          "dsub",         s(0x00,0x2e),       0xfc0007ff,     MIPSReg3 )
inspick( DSUBU,         "dsubu",        s(0x00,0x2f),       0xfc0007ff,     MIPSReg3 )
inspick( ERET,          "eret",         0x42000018,         0xffffffff,     MIPSNull )
inspick( J,             "j",            s(0x02,0x00),       0xfc000000,     MIPSJType )
inspick( JAL,           "jal",          s(0x03,0x00),       0xfc000000,     MIPSJType )
inspick( JALR,          "jalr",         s(0x00,0x09),       0xfc1f07ff,     MIPSJump2 )
inspick( JR,            "jr",           s(0x00,0x08),       0xfc1fffff,     MIPSJump1 )

// All load instructions bunched together
inspick( LB,            "lb",           s(0x20,0x00),       0xfc000000,     MIPSMemory )
inspick( LBU,           "lbu",          s(0x24,0x00),       0xfc000000,     MIPSMemory )
inspick( LD,            "ld",           s(0x37,0x00),       0xfc000000,     MIPSMemory )
inspick( LDL,           "ldl",          s(0x1a,0x00),       0xfc000000,     MIPSMemory )
inspick( LDR,           "ldr",          s(0x1b,0x00),       0xfc000000,     MIPSMemory )
inspick( LH,            "lh",           s(0x21,0x00),       0xfc000000,     MIPSMemory )
inspick( LHU,           "lhu",          s(0x25,0x00),       0xfc000000,     MIPSMemory )
inspick( LL,            "ll",           s(0x30,0x00),       0xfc000000,     MIPSMemory )
inspick( LLD,           "lld",          s(0x34,0x00),       0xfc000000,     MIPSMemory )
inspick( LW,            "lw",           s(0x23,0x00),       0xfc000000,     MIPSMemory )
inspick( LWL,           "lwl",          s(0x22,0x00),       0xfc000000,     MIPSMemory )
inspick( LWR,           "lwr",          s(0x26,0x00),       0xfc000000,     MIPSMemory )
inspick( LWU,           "lwu",          s(0x27,0x00),       0xfc000000,     MIPSMemory )
inspick( LDC1,          "ldc1",         s(0x35,0x00),       0xfc000000,     MIPSFPUMemory )
inspick( LWC1,          "lwc1",         s(0x31,0x00),       0xfc000000,     MIPSFPUMemory )
// Other LWCz/LDCz instructions