chipd16.asm
来自「开放源码的编译器open watcom 1.6.0版的源代码」· 汇编 代码 · 共 1,168 行 · 第 1/3 页
ASM
1,168 行
denormal_divide_scaled:
mov ax, word ptr[bp + MAIN_DENOM + 8] ; get exponent
and ax, 07fffh ; check for zero exponent
jnz invalid_denom
;
; The following six lines turn off exceptions and set the
; precision control to 80 bits. The former is necessary to
; force any traps to be taken at the divide instead of the scaling
; code. The latter is necessary in order to get full precision for
; codes with incoming 32 and 64 bit precision settings. If
; it can be guaranteed that before reaching this point, the underflow
; exception is masked and the precision control is at 80 bits, these
; six lines can be omitted.
;
fnstcw [bp+PREV_CW] ; save caller's control word
mov ax, [bp+PREV_CW]
or ax, 033fh ; mask exceptions, pc=80
and ax, 0f3ffh ; set rounding mode to nearest
mov [bp+PATCH_CW], ax
fldcw [bp+PATCH_CW] ; mask exceptions & pc=80
mov ax, [bp + MAIN_NUMER +8] ; test numerator exponent
and ax, 07fffh ; check for denormal numerator
je denormal_numer
cmp ax, 07fffh ; NaN or infinity
je invalid_numer
mov ax, [bp + MAIN_NUMER + 6] ; get bits 48..63 of mantissa
add ax, ax ; shift the first bit into carry
jnc invalid_numer ; if there is no carry, we have an
; invalid numer
jmp numer_ok
denormal_numer:
mov ax, [bp + MAIN_NUMER + 6] ; get bits 48..63 of mantissa
add ax, ax ; shift the first bit into carry
jc invalid_numer ; if there is a carry, we have an
; invalid numer
numer_ok:
fxch
fstp st ; pop numerator
fld st ; make copy of denominator
fmul [one_shl_63] ; make denominator not denormal
fstp tbyte ptr [bp+MAIN_DENOM]
fld tbyte ptr [bp+MAIN_NUMER] ; load numerator
fxch ; restore proper order
fwait
; The next line restores the users control word. If the incoming
; control word had the underflow exception masked and precision
; control set to 80 bits, this line can be omitted.
;
fldcw [bp+PREV_CW] ; restore caller's control word
jmp retry ; start the whole thing over
invalid_numer:
;
; The next line restores the users control word. If the incoming
; control word had the underflow exception masked and precision
; control set to 80 bits, this line can be omitted.
;
fldcw [bp + PREV_CW]
fdivp st(1), st ; use of hardware is OK.
ret
fdiv_main_routine ENDP
public __fdiv_fpr
defpe __fdiv_fpr
push bp
push bx
sub sp, STACK_SIZE
shl ax, 1
mov bx,ax
mov bp,sp
jmp word ptr dispatch_table[bx]
label0:
fdiv st,st(0) ; D8 F0 FDIV ST,ST(0)
add sp, STACK_SIZE
pop bx
pop bp
ret
label1:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label2:
fdivr st,st(0) ; D8 F8 FDIVR ST,ST(0)
add sp, STACK_SIZE
pop bx
pop bp
ret
label3:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label4:
fdiv st(0),st ; DC F8/D8 F0 FDIV ST(0),ST
add sp, STACK_SIZE
pop bx
pop bp
ret
label5:
fdivp st(0),st ; DE F8 FDIVP ST(0),ST
add sp, STACK_SIZE
pop bx
pop bp
ret
label6:
fdivr st(0),st ; DC F0/DE F8 FDIVR ST(0),ST
add sp, STACK_SIZE
pop bx
pop bp
ret
label7:
fdivrp st(0),st ; DE F0 FDIVRP ST(0),ST
add sp, STACK_SIZE
pop bx
pop bp
ret
label8:
fdiv_st 1, 0
pop bx
pop bp
ret
label9:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label10:
fdivr_st 1, 0
pop bx
pop bp
ret
label11:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label12:
fdiv_sti 1, 0
pop bx
pop bp
ret
label13:
fdivp_sti 1, 0
pop bx
pop bp
ret
label14:
fdivr_sti 1, 0
pop bx
pop bp
ret
label15:
fdivrp_sti 1, 0
pop bx
pop bp
ret
label16:
fdiv_st 2, 1
pop bx
pop bp
ret
label17:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label18:
fdivr_st 2, 1
pop bx
pop bp
ret
label19:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label20:
fdiv_sti 2, 1
pop bx
pop bp
ret
label21:
fdivp_sti 2, 1
pop bx
pop bp
ret
label22:
fdivr_sti 2, 1
pop bx
pop bp
ret
label23:
fdivrp_sti 2, 1
pop bx
pop bp
ret
label24:
fdiv_st 3, 2
pop bx
pop bp
ret
label25:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label26:
fdivr_st 3, 2
pop bx
pop bp
ret
label27:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label28:
fdiv_sti 3, 2
pop bx
pop bp
ret
label29:
fdivp_sti 3, 2
pop bx
pop bp
ret
label30:
fdivr_sti 3, 2
pop bx
pop bp
ret
label31:
fdivrp_sti 3, 2
pop bx
pop bp
ret
label32:
fdiv_st 4, 3
pop bx
pop bp
ret
label33:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label34:
fdivr_st 4, 3
pop bx
pop bp
ret
label35:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label36:
fdiv_sti 4, 3
pop bx
pop bp
ret
label37:
fdivp_sti 4, 3
pop bx
pop bp
ret
label38:
fdivr_sti 4, 3
pop bx
pop bp
ret
label39:
fdivrp_sti 4, 3
pop bx
pop bp
ret
label40:
fdiv_st 5, 4
pop bx
pop bp
ret
label41:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label42:
fdivr_st 5, 4
pop bx
pop bp
ret
label43:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label44:
fdiv_sti 5, 4
pop bx
pop bp
ret
label45:
fdivp_sti 5, 4
pop bx
pop bp
ret
label46:
fdivr_sti 5, 4
add bx,bx
pop bx
pop bp
ret
label47:
fdivrp_sti 5, 4
pop bx
pop bp
ret
label48:
fdiv_st 6, 5
pop bx
pop bp
ret
label49:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label50:
fdivr_st 6, 5
pop bx
pop bp
ret
label51:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label52:
fdiv_sti 6, 5
pop bx
pop bp
ret
label53:
fdivp_sti 6, 5
pop bx
pop bp
ret
label54:
fdivr_sti 6, 5
pop bx
pop bp
ret
label55:
fdivrp_sti 6, 5
pop bx
pop bp
ret
label56:
fdiv_st 7, 6
pop bx
pop bp
ret
label57:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label58:
fdivr_st 7, 6
pop bx
pop bp
ret
label59:
add sp, STACK_SIZE
pop bx
pop bp
int ILLEGAL_OPC
label60:
fdiv_sti 7, 6
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