tmr1.c

TDK 6521 SOC 芯片 DEMO程序

/***************************************************************************
 * This code and information is provided "as is" without warranty of any   *
 * kind, either expressed or implied, including but not limited to the     *
 * implied warranties of merchantability and/or fitness for a particular   *
 * purpose.                                                                *
 *                                                                         *
 * Copyright (C) 2005 Teridian Semiconductor Corp. All Rights Reserved.    *
 ***************************************************************************/
//**************************************************************************
//
//  DESCRIPTION: 71M651x POWER METER - Timer Routines. 
//
//  AUTHOR:  RGV
//
//  HISTORY: See end of file
//
//**************************************************************************
//
//  File: TIMERS.C
//

#include "options.h"
#if TMR1
#include "wd.h"
#include "tmr1.h"

/*** Public functions declared within this module ***/
// the start function and the isr

/*** External functions used by this module ***/
// None.

/*** External variables used within this module ***/
// None.

/*** Public variables declared within this module ***/
// None.

/*** Private functions declared within this module ***/
// None.

/*** Private variables declared within this module ***/
static uint8_16_t tmr1_reload;
static bool tmr1_restart;
static void (*tmr1_pfn) (void);


/*****************************************************/
//  A single timer, MPU clk speed is fixed.
#pragma save
#pragma NOAREGS
void tmr1_start (uint16_t reload_reg, uint8_t restart, void (*pfn) (void)) small reentrant
{
    // TIMER0: 16-bit timer...  TIMER1: unchanged
    TR1 = FALSE; // turn off the timer
    TF1 = FALSE; // clear any pending interrupts
    tmr1_restart = restart;  // set the restart flag
    tmr1_pfn = pfn; // set the application function
    // configure the timer- set or clear every bit for timer 1
    TMOD = (TMOD & 0x0F) | T1_16_;     // TIMER1: 16-bit timer
    tmr1_reload.i = reload_reg;
    TH1 = tmr1_reload.c[HI]; // set the reload register
    TL1 = tmr1_reload.c[LO];

    // Interrupt priorities are set in main.

    tmr1_enable(); // enable the relevant interrupt

    TR1 = TRUE; // start the timer

    #ifdef WD_TMR1        // if it's defined, then it needs testing
    wd_create ( WD_TMR1 ); // test TMR1's software watchdog
    #endif
}
#pragma restore

//  A single timer, MPU clk speed is fixed.
//  Note, if this is invoked very frequently, change it to have a
//  private register bank, rather than using NOAREGS
//  See the serial interrupts (e.g. es0_isr in io\ser0.c) for examples.
//  Register banks are allocated in main\options_gbl.h
#pragma save
#pragma NOAREGS
void tmr1_isr (void)  small reentrant interrupt TMR1_IV
{                                       // Uses hardware TIMER0.
    // do the default timer stuff first, so the application routine
    // can set up the timer again.
    if (!tmr1_restart)
    {
        TR1 = FALSE; // stop the timer
    }
    else
    {
        TH1 = tmr1_reload.c[HI]; // set the reload register
        TL1 = tmr1_reload.c[LO];
    }
    if (tmr1_pfn != NULL)
        (*tmr1_pfn)();

    #ifdef WD_TMR1        // if it's defined, then it needs testing
    wd_reset ( WD_TMR1 ); // reset TMR1's software watchdog
    #endif
}
#pragma restore

#endif
/***************************************************************************
 * History:
 * $Log: tmr1.c,v $
 * Revision 1.19  2006/09/20 23:49:34  tvander
 * Set interrupt priorities only once, during start-up
 *
 * Revision 1.18  2006/09/18 19:22:44  tvander
 * Sets interrupt priorities.
 *
 * Revision 1.17  2006/09/09 01:10:12  gmikef
 * *** empty log message ***
 *
 * Revision 1.16  2006/08/09 00:56:37  tvander
 * *** empty log message ***
 *
 * Revision 1.15  2006/06/29 00:55:49  tvander
 * Marked NOAREGS on reentrant routines that needed it.
 *
 * Revision 1.14  2006/03/06 03:32:24  Michael T. Fischer
 * More 6530 prep.
 *
 * Revision 1.12  2005/11/29 01:14:13  tvander
 * Automatic software watchdogs
 *
 * Revision 1.11  2005/10/08 04:41:20  tvander
 * Fixed priority inversion.
 * Rewrote watchdog to work in brownout, but of course it doesn't work.
 * Watchdog can now be defeated by clearing watchdog option to 0.
 * Reorganized watt hour modules (at last!).
 * Disabled reading of STATUS in 6521_cli because the CE's status is always SAG.
 * Tested with 6521_CLI; measurements seem to work.
 * Fixed other builds.
 *
 * Revision 1.10  2005/09/22 23:45:09  tvander
 * Clean build all models and unit tests, updated copyright to be fore Teridian
 *
 * Revision 1.9  2005/08/28 02:16:53  gmikef
 * *** empty log message ***
 *
 * Revision 1.8  2005/08/10 21:43:26  tvander
 * Changed the interrupt enable to use a macro.
 *
 * Revision 1.7  2005/07/01 00:24:04  tvander
 * Modified to reduce the idata used.
 *
 * Revision 1.6  2005/05/19 00:43:32  tvander
 * Made hardware timers optional.
 *
 * Revision 1.5  2005/05/03 00:39:44  tvander
 * Incorporated event reporting in tmr0,tmr1 and unit tests.
 * Retested stm, trm0, tmr1.
 * Incorporated untested changes in io651x.h
 *
 * Revision 1.4  2005/04/28 16:16:59  tvander
 * Working timer code
 *
 * Revision 1.3  2005/04/25 19:15:31  tvander
 * tested hardware timer code
 *
 * Revision 1.2  2005/04/21 02:01:42  gmikef
 * *** empty log message ***
 *
 * Revision 1.4  2005/04/09 02:04:27  gmikef
 * *** empty log message ***
 *
 * Revision 1.1  2005/03/23 19:19:33  tvander
 * Added untested timer functions.
 * Updated iicdio and iiceep to reflect improvements in 6510 code.
 * ser0 and ser1 updated to provide features for flag.
 *
 * Revision 1.4  2005/03/08 19:06:53  tvander
 * Self calibration in all software models
 *
 * Revision 1.2  2005/02/17 18:32:40  tvander
 * Added automatic check-in logging to all source code.
 *
 * 2003 OCTOBER 30; First Version.
 *
 * Copyright (C) 2005 Teridian Semiconductor Corp. All Rights Reserved.    *
 * this program is fully protected by the United States copyright          *
 * laws and is the property of Teridian Semiconductor Corporation.         *
 ***************************************************************************/