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📄 uwrdio.c

📁 TDK 6521 SOC 芯片 DEMO程序
💻 C
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    PUT_BIT_TF(_b_,16); \
    PUT_BIT_TF(_b_,8); \
    PUT_BIT_TF(_b_,4); \
    PUT_BIT_TF(_b_,2); \
    PUT_BIT_TF(_b_,1)

// The loops are unrolled in these macros to get the best possible speed.
#define PUT_BYTE_HIZ_TF(_b_) \
    PUT_BIT_TF(_b_,128); \
    PUT_BIT_TF(_b_,64); \
    PUT_BIT_TF(_b_,32); \
    PUT_BIT_TF(_b_,16); \
    PUT_BIT_TF(_b_,8); \
    PUT_BIT_TF(_b_,4); \
    PUT_BIT_TF(_b_,2); \
    PUT_BIT_HIZ_TF(_b_,1)

#define GET_BIT_TF(_b_,_bit_) \
    SCL_ONE; \
    SCL_ZERO; \
    if (SDI != 0) \
    { \
        _b_ |= _bit_; \
    }

// The loops are unrolled in these macros to get the best possible speed.
#define GET_BYTE_TF(_b_) \
    GET_BIT_TF(_b_,128); \
    GET_BIT_TF(_b_,64); \
    GET_BIT_TF(_b_,32); \
    GET_BIT_TF(_b_,16); \
    GET_BIT_TF(_b_,8); \
    GET_BIT_TF(_b_,4); \
    GET_BIT_TF(_b_,2); \
    GET_BIT_TF(_b_,1)


// wait for programming complete; This is probably only useful
// on microwire EEPROMs.
#pragma save
#pragma NOAREGS
void uwr_busy_wait(void) small reentrant
{
    mode |= BUSY_WAIT_MODE;
}
#pragma restore

// The clock polarity should be selected before the device is selected.
// rising edge of leading clock edge is data to device,
// falling edge of trailing clock edge is data from device
// Used on microwire eeproms, and this is the default
#pragma save
#pragma NOAREGS
static void uwr_leading_rising (void) small reentrant
{
    SCL_ZERO;
    SDO_ZERO;
    mode |= LEADING_OUT;
}
#pragma restore

#if SPI_POLARITIES
// The clock polarity should be selected before the device is selected.
// falling edge of leading clock edge is data to device,
// rising edge of trailing clock edge is data from device
#pragma save
#pragma NOAREGS
static void uwr_leading_falling (void) small reentrant
{
    SCL_ONE;
    SDO_ZERO;
    mode |= LEADING_OUT;
}
#pragma restore

// The clock polarity should be selected before the device is selected.
// rising edge of trailing clock edge is data to device,
// falling edge of leading clock edge is data from device
#pragma save
#pragma NOAREGS
static void uwr_trailing_rising (void) small reentrant
{
    SCL_ZERO;
    SDO_ZERO;
    mode &= ~LEADING_OUT;
}
#pragma restore

// The clock polarity should be selected before the device is selected.
// falling edge of trailing clock edge is data to device,
// rising edge of leading clock edge is data from device
#pragma save
#pragma NOAREGS
static void uwr_trailing_falling (void) small reentrant
{
    SCL_ONE;
    SDO_ZERO;
    mode &= ~LEADING_OUT;
}
#pragma restore
#endif // SPI_POLARITIES

// transmit a counted string of bytes to a microwire bus
#pragma save
#pragma NOAREGS
uint8_t uwr_write(uint8x_t *pchOut, uint16_t cnt) small reentrant
{
    uint8_t data b;
    uint16_t timeout;

    SDO_POWERED;

#if SPI_POLARITIES
    if ( SCL == 0 )
    {
        if ( mode & LEADING_OUT )
        {
#endif
            RESET_WD();

            for(; cnt > 1; --cnt)
            {
                b = *pchOut++;
                PUT_BYTE_LR(b);
            }

            if (cnt == 1)
            {
                b = *pchOut++;
                PUT_BYTE_HIZ_LR(b);
        
                if (mode & BUSY_WAIT_MODE)
                {
                    uint8_t cs_index = last_cs_index;
                    uwr_select (UWR_NO_DEVICE);
                    // OSCOPE_INIT; OSCOPE_ONE;
                    uwr_select (cs_index);
                    // OSCOPE_ZERO;
                    mode &= ~BUSY_WAIT_MODE;
                    timeout = HALF_SECOND;
                    while (SDI == 0)
                    {
                       RESET_WD();
                       delay_clks (3);  

                       if (--timeout == 0)
                          return 0;
                    }
                }
            }

            return 1;
#if SPI_POLARITIES
        }
        else
        {
            RESET_WD();

            for(; cnt > 1; --cnt)
            {
                b = *pchOut++;
                PUT_BYTE_LF(b);
            }

            if (cnt == 1)
            {
                b = *pchOut++;
                PUT_BYTE_HIZ_LF(b);
        
                if (mode & BUSY_WAIT_MODE)
                {
                    uint8_t cs_index = last_cs_index;
                    uwr_select (UWR_NO_DEVICE);
                    uwr_select (cs_index);
                    mode &= ~BUSY_WAIT_MODE;
                    timeout = HALF_SECOND;

                    while (SDI == 0)
                    {
                       RESET_WD();
                       delay_clks (3);  

                       if (--timeout == 0)
                          return 0;
                    }
                }
            }
            return 1;
        }
    }
    else
    {
        if ( mode & LEADING_OUT )
        {
            RESET_WD();

            for(; cnt > 1; --cnt)
            {
                b = *pchOut++;
                PUT_BYTE_TR(b);
            }

            if (cnt == 1)
            {
                b = *pchOut++;
                PUT_BYTE_HIZ_TR(b);
        
                if (mode & BUSY_WAIT_MODE)
                {
                    uint8_t cs_index = last_cs_index;
                    uwr_select (UWR_NO_DEVICE);
                    uwr_select (cs_index);
                    mode &= ~BUSY_WAIT_MODE;
                    timeout = HALF_SECOND;

                    while (SDI == 0)
                    {
                       RESET_WD();
                       delay_clks (3);  

                       if (--timeout == 0)
                          return 0;
                    }
                }
            }
            return 1;
        }
        else
        {
            RESET_WD();

            for(; cnt > 1; --cnt)
            {
                b = *pchOut++;
                PUT_BYTE_TF(b);
            }

            if (cnt == 1)
            {
                b = *pchOut++;
                PUT_BYTE_HIZ_TF(b);
        
                if (mode & BUSY_WAIT_MODE)
                {
                    uint8_t cs_index = last_cs_index;
                    uwr_select (UWR_NO_DEVICE);
                    uwr_select (cs_index);
                    mode &= ~BUSY_WAIT_MODE;
                    timeout = HALF_SECOND;

                    while (SDI == 0)
                    {
                       RESET_WD();
                       delay_clks (3);  

                       if (--timeout == 0)
                          return 0;
                    }
                }
            }

            return 1;
        }
    }
#endif
}
#pragma restore

// receive a counted string of bytes from a microwire bus
#pragma save
#pragma NOAREGS
void uwr_read(uint8x_t *pchIn, uint16_t cnt) small reentrant
{
    uint8_t data b;
 
    SDI_UNPOWERED;  // insurance: can't write and read at the same time!
#if SPI_POLARITIES
    if ( SCL == 0 )
    {
        if ( mode & LEADING_OUT )
        {
#endif
            RESET_WD();

            for(; cnt != 0; --cnt)
            {
                b = 0;              // get_byte() ors bits in, so start with 0.
                GET_BYTE_LR(b);     // get a byte from the bus.
                *pchIn++ = b;       // store it.
            }

            RESET_WD();
#if SPI_POLARITIES
        }
        else
        {
            RESET_WD();

            for(; cnt != 0; --cnt)
            {
                b = 0;              // get_byte() ors bits in, so start with 0.
                GET_BYTE_LF(b);     // get a byte from the bus.
                *pchIn++ = b;       // store it.
            }

            RESET_WD();
        }
    }
    else
    {
        if ( mode & LEADING_OUT )
        {
            RESET_WD();

            for(; cnt != 0; --cnt)
            {
                b = 0;              // get_byte() ors bits in, so start with 0
                GET_BYTE_TR(b);     // get a byte from the bus
                *pchIn++ = b;       // store it
            }

            RESET_WD();
        }
        else
        {
            RESET_WD();

            for(; cnt != 0; --cnt)
            {
                b = 0;              // get_byte() ors bits in, so start with 0
                GET_BYTE_TF(b);     // get a byte from the bus
                *pchIn++ = b;       // store it
            }

            RESET_WD();
        }
    }
#endif
}
#pragma restore

#endif // UW_SW

/***************************************************************************
 * $Log: uwrdio.c,v $
 * Revision 1.17  2006/10/13 00:47:29  tvander
 * Removed compile options for 6530, 6515;
 * renamed 6511 and 6513 to trace11 and trace13;
 * Binary verified unchanged from previous version.
 *
 * Revision 1.16  2006/09/09 01:10:19  gmikef
 * *** empty log message ***
 *
 * Revision 1.15  2006/09/06 02:12:02  tvander
 * Fixed too-long timeout.
 *
 * Revision 1.14  2006/08/30 21:55:11  gmikef
 * *** empty log message ***
 *
 * Revision 1.13  2006/08/09 00:56:37  tvander
 * *** empty log message ***
 *
 * Revision 1.12  2006/06/15 19:56:37  tvander
 * Coded fixes to enable operation from interrupts.
 *
 * Revision 1.11  2006/05/18 23:18:45  tvander
 * 16K and 32K
 * First cut at new requirements.
 * 32K 6521 is grossly tested.
 * All others have a clean compile with C51 8.02
 *
 * Revision 1.10  2006/03/08 03:06:54  gmikef
 * *** empty log message ***
 *
 * Revision 1.9  2006/03/08 00:00:57  tvander
 * Revised IO so that multiplexed interrupts are centralized in io65xx.c
 * Added default interrupts to io65xx.c
 * Clean build.
 * Tested CE, serial.
 * interrupting EEPROM driver fails.
 *
 * Revision 1.8  2006/03/06 03:32:40  Michael T. Fischer
 * More 6530 prep.
 *
 * Revision 1.7  2006/03/03 11:26:30  Michael T. Fischer
 * Prep for 6530 LCD, etc.
 *
 * Revision 1.6  2006/01/10 03:58:54  gmikef
 * Added PDATA support for CE Outputs.
 *
 * Revision 1.3  2005/11/19 00:38:37  tvander
 * Working 3-wire EEPROM interface
 *
 * Revision 1.2  2005/10/29 02:25:33  tvander
 * Working Microwire drivers
 *
 * Revision 1.1  2005/10/26 23:52:22  tvander
 * Microwire EEPROM access via DIO
 *
 *
 * Copyright (C) 2005 Teridian Semiconductor Corp. All Rights Reserved.    *
 * this program is fully protected by the United States copyright          *
 * laws and is the property of Teridian Semiconductor Corporation.         *
 ***************************************************************************/

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