6521_readme.txt

TDK 6521 SOC 芯片 DEMO程序

The EEPROM interface status register clocks at a slower rate than the MPU.
Operation via interrupt is correct.  When run by polling, after a command,
the status can take 32 MPU clocks to become available. Verified working 
polling I2C driver code is available with this release (in IO\IICEEP.C).
It has a brief, calibrated delay after each IIC command given to the 
hardware.  There's also a prewritten bit-banging IIC interface that runs
up to 260kHz with a 4.9mHz clock (in IO\IICDIO.C), but this appears to overload
the available power in brownout mode.

The real time clock can be written only one register every 13/32768 seconds
(with a 32 kHz crystal), and the write will still fail if the write enable 
is not written to first.  It can be read more quickly, but the read
must make sure that two consecutive reads of the seconds register are 
identical before reading the other registers.  The code is in "IO\rtc.c".

The main watchdog cannot be disabled by any status in the chip, 
so that the chip will always restart if it is halted by a transient event.
Also, the watchdog reset is very similar to a "Wake" from a sleep mode and 
not a hard reset.

The auxiliary watchdog accessed from WDTREL is not recommended for use,
and can only reset the CPU.

Uart 0 does not work in mode zero.

Timer 0 mode 2 does not work if timer 1 is in mode zero or one.

When a 4.2mHz crystal is used, low power operation is much speedier, but 
duty cycles and frequencies for the serial port's optical modulation are 
inaccurate, and timings for the EEPROM and other interfaces vary by 
several percent.

The chip stops and the emulator does not detect it when a MOVC operation 
fetches code from an address on which a hardware breakpoint is set.
This might occur when debugging code that performs a checksum on itself.



4. Software issues in this version, 4.3.3:

The 6521 has a mask-programmable version for high volume manufacturing.
This eliminates any need to load code into the meter.  ROM code should
include the test code that TSC uses during manufacturing.  This loads at
an absolute address and takes about 0.5k.
If you plan rommable code, e-mail [e-mail]

An issue that came up in many situations was, "Does the user want to experiment
with battery modes?"  TSC ships the demo PCB without a battery.  The code can be
reconfigured for battery operation by jumpering DIO_8 to V3P3D, and attaching the
positive terminal of a 3.6V battery to VBAT.
In non-battery mode, the PLL_OK interrupt waits when it detects brownout
mode.  In battery mode, the interrupt calls a soft reset to transition to the
state machine in main() (see main\main.c).  DIO_8 also enables battery testing in 
meter\battest.c

In a prototype meter, DIO_8 can be a test output, reset the PCB, detect tampering or 
act as a select line for multiple or microwire EEPROMs.
See JP15, where it's brought out to a header.  Some designers reset a meter periodically,
often at midnight, so the meter software can be tested over a finite interval.  To do
this, attach DIO_8 to reset, and configure DIO_8 as an input except when performing the 
reset, so it does not fight the reset switch.

In this demo PCB the pulse outputs have electrical headers, and can also be
conveniently used as test outputs.  The demo code util\oscope.h defines macros
to instrument scope loops using the VAR pulse output.

The demo code multiplexes the watt pulse and UART1's transmit onto the OPT_TX pin on J12 whenever transmission is not occurring.

When setting temp_nom, it's easy to type ]18=1900000000 rather than ]18=[phone].  
With no plus sign the number is hex, and then ppmc and ppmc2 appear grossly 
wrong, and the meter tests badly out of spec. in temperature compensation.

FLAG applications: The 7E1 UART mode is available!  The UARTs cannot physically 
support 7N1 (use 7N2), 8E2 or 8O2 (try 8E1 or 8O1). All devices that require 
1 or 1.5 stop bits will accept 2 stop bits.  There is tested, sample FLAG code.

The included FLAG code was thoroughly debugged, but is not in everyday use.

Polling I2C and microwire drivers are available in the library source both 
for fast bit-banging (iic.h, iicdio.c, uwr.h, uwrdio.c) and using the chip's 
internal logic (iic.h, iiceep.c, uwr.h, uwreep.c).  Both work with polling 
EEPROM code such as the sample code eepromp.c provided for the AT24C1024 
serial EEPROM used on the demo PCBs.  
The demo microwire eeprom is a Microchip 93c76C, controlled by eepromp3.c.

A known problem with the bit-banging eeprom code, iicdio.c, is that it 
causes A03 to enter sleep mode when used in brownout mode.  This behavior has 
not been isolated, but may be caused by bus contention with the EEPROM, which
could overload the current supply of the 6520 in brownout mode, and force it into sleep
mode (This hardware behavior is a design feature to assure correct operation).  
The demo code as released uses the hardware eeprom driver, iiceep.c, which 
does not have this issue.

I-36 Bad data from UARTs.  If the CE is incompletely initialized, or the sag threshold is
zero, the code to save the power registers may run frequently when there is no actual sag
condition.  This causes lost serial data because the sag code briefly speeds up the MPU's 
clock rate to maximum to save the power registers quickly.  The same clock is used by the 
UART.  The result are that a few percent of serial data are lost.

The software pulse generators read the CE configuration and generate 50% duty-cycle 
pulses with the same units and scaling, but with more jitter.  The outputs for PULSE3
and PULSE4 are on DIO1 and DIO2, respectively.  This option disables OPT_TX and OPT_RX.
If psoft.c is modified so OPT_RX is available, ser1cli.c is supposed to automatically switch
between PULSE4 and serial output.

Some REV 1 demo PCBs do not power the debug PCB's isolation chips in brownout mode.  The
result is that serial communications are lost when operating in brownout mode.

I-37 The software pulse outputs (psoft.c) require too many CPU cycles to run at 
slow clock speeds.  They run if main\options_gbl.h is changed to a 4.9mHz clock, and the
code is recompiled.

Meter equations other than equation 0 (single element) are available and 
integrated, but not as well-tested.

Problems in 4.3.2, fixed in 4.3.3:

I-40 As of chip version A04, MPU_DIV must be set to 0 when entering brownout-mode, so that
brownout mode will run at the crystal's speed.

I-41 Every loop that waits and resets the watchdog now includes a delay loop so that it 
doesn't reset the watchdog more often than once in 3/32768 of a second.  The delay loop code
is centralized now, in IO\delay.c, copes with different clock rates, and is reused where needed.

I-42 labs() in math.c conflicted with the Keil's new library, so its name was changed to labsx()

I-43 Recursion errors reported by a defect in Keil's linker did not produce bad code, but caused questions by customers.  In pulsesrc.c, made PulseSrcE() PulseSrcI() and PulseSrcG() 
small reentrant to evade the linker's error.

I-44 the ce code for equation 1 (1e3w) and 2 (2e3w) should be ce21a03, which reads the 
channels correctly.

I-54 PLL_OK interrupt hangs at rare intervals.  Fixed by setting all interrupt priorities in one place once.

I-56 Commands M and M0 should display power.

I-57,61 9600 BAUD and battery modes should be demonstrated:  Moved serial interrupts above 
the xfer_busy interrupt in priority.  Moved the alt-mux bit setting to the ce_busy interrupt.
Increased the clock rate from 614kHz to 1.2mHz.  To demo. battery modes, attach a battery to VBAT, jumper DIO_8 to V3P3D and press reset to select 300 baud and enable battery mode
operation.

I-60 EEPROM operations interrupt metering.  EEPROM commands now report an error and 
do not run if the CE is on.

The build is improved so that the LX51 advanced linker can be used.  If available, it
shrinks the build from 28K to 25K.


Problems in 4.3.1, fixed in 4.3.2:

I-35 The delta_seconds() routine in rtc.c was incorrect.  Under some conditions it could
produce negative numbers of seconds, resulting in spurious negative time corrections.

I-37 The software pulse outputs (psoft.c) don't work.  Logic errors were fixed, but the 
code requires too many cycles to run correctly at 614kHz.  It runs fine at 4.9mHz.

The optional lightweight IO (io_lite.c) was sending multiple XOFFs. (very minor... not 
within the spec, but worth fixing.) IO_LITE.C is enabled when the command line interface
is disabled.

I-38 The calibration loader (invoked by the command CLC) now echoes '*' when "enter" is
pressed in Hyperterminal.  This permits the user to test the serial link from an RS-232 terminal.


Problems in V4.3, fixed in 4.3.1:

I-30 baud rate code could only set 300 BAUD. This was concealed by the fact
     that only 300 baud was normally set.

I-31 The software option to lock the RTC to the line frequency didn't work, 
     especially in creep.

I-32 Pulse counting didn't count pulses.

I-33 CLC (the command line interface's command to invoke the calibration
     protocol) had no timeout and therefore locked the serial interface until
     a reset.

I-34 Long canned scripts sent from Hyperterminal fail.  XON/XOFF needed to be
     enabled. This also affected CLC, which uses long canned scripts.


Changes from V3.x 6511/6513 demo code to 4.3:

Mostly rewritten so that the code is more modular, and more configurable.
If there is an electronic module, most of the code to operate that module will be
in one file.  The interface file for a .c file is usually in the .h file of the
same name, e.g. ser0.c can be accessed by including ser0.h.

Most subroutine names (more than 90%) are unchanged.  The code now uses
industry-standard portable integer definitions, from stdint.h

The serial interface is rewritten with layers.  We did this in self-defense.
Layers help reduce rewriting and debugging generic hardware and buffer handling code.
The upper layers of serial code for uart0 and uart1 are -identical-, so that we had
to debug each feature only once. There is now a hardware layer (ser0.c & .h; ser1.c & .h)
and several upper layer protocols: the circular buffer systems: ser0cli.c, ser1cli.c,
sercli.c; the light-weight IO system io\io_lite.c which simulates selected parts of the
circular buffer system; the FLAG interface: flag0.c, flag1.c and flag.c; the command line
interface in the directory \cli; and a "calibration protocol" in io\cal_ldr.c
(documented in docs\calprotocol*.doc.

The 16K (6521D) stacks the layers: ser0.c, io_lite.c and cal_ldr.c to get a serial
interface that doesn't take much space.

The 32K (6521F) has more space to show off both serial ports.  It stacks ser0.c
and ser1.c feeding ser0cli.c and ser1cli.c, feeding sercli.c, feeding io.c and cli.c.
io.c also feeds cal_ldr.c (the calibration protocol),
which is invoked by a CLI command: clc.

Any defect found through version 3.05 of the 6513/6511 demo code is corrected.

Most configurations are available in "options.h" and the build files.

The code is designed to switch power calculations, nonvolatile memory choices, 
calibration, the command line interface, serial port choice, hardware timer 
choice, the FLAG, calibration loading and command line serial interfaces.
Software options that depend on hardware interface can be moved to a compatible
hardware interface by changing include files (tmr0, tmr1, ser0, ser1), configuration
constants (flash vs. eeprom) or compilation switches (i2c vs microwire, bit-banging vs. hardware).

Creep is more accurate in shunt applications.  This is because
low currents are calculated as the instantaneous VAh/Vh, where VAh is calculated as
sqrt(Wh^2 + VARh^2).  This means that the low currents profit from the filtering
in the Wh and VARh calculations.
The creep calculations are far more exact, adjusted to the exact meter equation.

The data processing code is now about 2x faster than in the 3.x code.
The CE's interrupt copies the CE data to a PDATA area.  This lets the copy occur
faster, because PDATA can be indexed by a register, while XDATA is indexed only
by DPTR.  Many arithmetic routines now accept PDATA pointers, as well.  This may 
speed the arithmetic somewhat. 

Many operations once performed with fixed-point high-precision math are now performed
by floating point.  This is often much faster, as well as easier to read and debug.

The code has been roughly ported to the free compiler SDDC. However, it is
far less economical than Keil in RAM and code size, and execution testing
has not been performed.

The 16k and 32k code are all built from the same code base with different options.  
The command line code's on-line help file is included.  Though not used in the 6521, 
it is helpful in related chips.