📄 f12x_init.lst
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271 //-----------------------------------------------------------------------------
272 // CP220x_RST_Low
273 //-----------------------------------------------------------------------------
274 //
275 // Drives the CP220x's Reset Pin Low.
276 //
277 void CP220x_RST_Low(void)
278 {
279 1 char SFRPAGE_SAVE = SFRPAGE;
*** ERROR C202 IN LINE 279 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
280 1 SFRPAGE = CONFIG_PAGE;
*** ERROR C202 IN LINE 280 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
281 1 P4 &= ~0x20; // Set P4.5 Low
282 1 SFRPAGE = SFRPAGE_SAVE;
*** ERROR C202 IN LINE 282 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
283 1 }
284
C51 COMPILER V7.09 F12X_INIT 06/29/2007 17:12:09 PAGE 6
285 //-----------------------------------------------------------------------------
286 // CP220x_RST_High
287 //-----------------------------------------------------------------------------
288 //
289 // Drives the CP220x's Reset Pin High.
290 //
291 void CP220x_RST_High(void)
292 {
293 1 char SFRPAGE_SAVE = SFRPAGE;
*** ERROR C202 IN LINE 293 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
294 1 SFRPAGE = CONFIG_PAGE;
*** ERROR C202 IN LINE 294 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
295 1 P4 |= 0x20; // Set P4.5 High
296 1 SFRPAGE = SFRPAGE_SAVE;
*** ERROR C202 IN LINE 296 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
297 1 }
298
299 //-----------------------------------------------------------------------------
300 // AB4_RST_State
301 //-----------------------------------------------------------------------------
302 //
303 // Returns the state of the AB4's reset pin.
304 //
305 unsigned char AB4_RST_State(void)
306 {
307 1 char rst_pin_state;
308 1 char SFRPAGE_SAVE = SFRPAGE;
*** ERROR C202 IN LINE 308 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
309 1 SFRPAGE = CONFIG_PAGE;
*** ERROR C202 IN LINE 309 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
310 1 rst_pin_state = P4 & 0x20; // Get P4.5 State
311 1 SFRPAGE = SFRPAGE_SAVE;
*** ERROR C202 IN LINE 311 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
312 1 return rst_pin_state;
313 1 }
314
315 //-----------------------------------------------------------------------------
316 // Local Initialization Routines
317 //-----------------------------------------------------------------------------
318
319 //-----------------------------------------------------------------------------
320 // PORT_Init
321 //-----------------------------------------------------------------------------
322 //
323 // Configure UART1, Interrupts, Crossbar and GPIO ports
324 //
325 void PORT_Init (void)
326 {
327 1 char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page
*** ERROR C202 IN LINE 327 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
328 1
329 1 SFRPAGE = CONFIG_PAGE; // set SFR page
*** ERROR C202 IN LINE 329 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
330 1 P0MDOUT |= 0x01; // set TX1 to push-pull
331 1 P1MDOUT |= 0x40; // Set P1.6(TB_LED) to push-pull
332 1 P2MDOUT |= 0x0C; // Set P2.2(AB4_LED1) and P2.3(AB4_LED2)
333 1 // to push-pull
334 1 // all pins used by the external memory interface are in push-pull mode
335 1 P4MDOUT = 0xC0;
*** ERROR C202 IN LINE 335 OF F12X_INIT.C: 'P4MDOUT': undefined identifier
336 1 P5MDOUT = 0xFF;
*** ERROR C202 IN LINE 336 OF F12X_INIT.C: 'P5MDOUT': undefined identifier
C51 COMPILER V7.09 F12X_INIT 06/29/2007 17:12:09 PAGE 7
337 1 P6MDOUT = 0xFF;
*** ERROR C202 IN LINE 337 OF F12X_INIT.C: 'P6MDOUT': undefined identifier
338 1 P7MDOUT = 0xFF;
*** ERROR C202 IN LINE 338 OF F12X_INIT.C: 'P7MDOUT': undefined identifier
339 1 P4 = 0xDF; // /WR, /RD, are high, RESET is low
340 1 P5 = 0xFF;
341 1 P6 = 0xFF; // P5, P6 contain the address lines
342 1 P7 = 0xFF; // P7 contains the data lines
343 1
344 1 TCON &= ~0x01; // Make /INT0 level triggered
345 1
346 1 // Enable UART0, CP0, and /INT0. This puts /INT0 on P0.3.
347 1 XBR0 = 0x80;
348 1 XBR1 = 0x04;
349 1 XBR2 = 0x44;
350 1 SFRPAGE = SFRPAGE_SAVE; // Restore SFR page
*** ERROR C202 IN LINE 350 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
351 1
352 1 }
353
354 //-----------------------------------------------------------------------------
355 // SYSCLK_Init
356 //-----------------------------------------------------------------------------
357 //
358 // This routine initializes the system clock.
359 //
360 void SYSCLK_Init (void)
361 {
362 1 int i; // software timer
363 1
364 1 char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page
*** ERROR C202 IN LINE 364 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
365 1
366 1 SFRPAGE = CONFIG_PAGE; // set SFR page
*** ERROR C202 IN LINE 366 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
367 1
368 1 OSCICN = 0x83; // set internal oscillator to run
369 1 // at its maximum frequency
370 1
371 1 CLKSEL = 0x00; // Select the internal osc. as
*** ERROR C202 IN LINE 371 OF F12X_INIT.C: 'CLKSEL': undefined identifier
372 1 // the SYSCLK source
373 1 //Turn on the PLL and increase the system clock by a factor of M/N
374 1 PLL0CN = 0x00; // Set internal osc. as PLL source
*** ERROR C202 IN LINE 374 OF F12X_INIT.C: 'PLL0CN': undefined identifier
375 1 SFRPAGE = LEGACY_PAGE;
*** ERROR C202 IN LINE 375 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
376 1 FLSCL = 0x30; // Set FLASH read time for 100 MHz clk
377 1 SFRPAGE = CONFIG_PAGE;
*** ERROR C202 IN LINE 377 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
378 1
379 1 PLL0CN |= 0x01; // Enable Power to PLL
*** ERROR C202 IN LINE 379 OF F12X_INIT.C: 'PLL0CN': undefined identifier
380 1
381 1 PLL0DIV = 0x01; // Set Pre-divide value to N (N = 1)
*** ERROR C202 IN LINE 381 OF F12X_INIT.C: 'PLL0DIV': undefined identifier
382 1 PLL0MUL = 0x04; // Multiply SYSCLK by M (M=4)
*** ERROR C202 IN LINE 382 OF F12X_INIT.C: 'PLL0MUL': undefined identifier
383 1 PLL0FLT = 0x01; // Set the PLL filter register for
*** ERROR C202 IN LINE 383 OF F12X_INIT.C: 'PLL0FLT': undefined identifier
384 1 // a reference clock from 12.2 - 19.5 MHz
385 1 // and an output clock from 65 - 100 MHz
C51 COMPILER V7.09 F12X_INIT 06/29/2007 17:12:09 PAGE 8
386 1 for (i=0; i < 256; i++) ; // Wait at least 5us
387 1 PLL0CN |= 0x02; // Enable the PLL
*** ERROR C202 IN LINE 387 OF F12X_INIT.C: 'PLL0CN': undefined identifier
388 1 // while(!(PLL0CN & 0x10)); // Wait until PLL frequency is locked
389 1 CLKSEL = 0x02; // Select PLL as SYSCLK source
*** ERROR C202 IN LINE 389 OF F12X_INIT.C: 'CLKSEL': undefined identifier
390 1
391 1 SFRPAGE = SFRPAGE_SAVE; // Restore SFR page
*** ERROR C202 IN LINE 391 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
392 1 }
393
394 //-----------------------------------------------------------------------------
395 // EMIF_Init
396 //-----------------------------------------------------------------------------
397 //
398 // Configure the External Memory Interface for both on and off-chip access.
399 //
400 void EMIF_Init (void)
401 {
402 1
403 1 char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page
*** ERROR C202 IN LINE 403 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
404 1
405 1 SFRPAGE = LEGACY_PAGE;
*** ERROR C202 IN LINE 405 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
406 1 EMI0CF = 0xFB; // Split-mode (banked), non-multiplexed
407 1 // on P4 - P7
408 1 EMI0TC = 0xFF; // This constant may be modified
409 1 // according to SYSCLK to meet the
410 1 // timing requirements for the CP2200
411 1
412 1
413 1 EMI0CN = 0x20; // Page of XRAM accessed by EMIF
414 1
415 1 SFRPAGE = SFRPAGE_SAVE; // Restore SFR page
*** ERROR C202 IN LINE 415 OF F12X_INIT.C: 'SFRPAGE': undefined identifier
416 1 }
417
418 //===============
419 // CONDITIONAL
420 //===============
421 #if(UART_ENABLED)
//-----------------------------------------------------------------------------
// UART1_Init
//-----------------------------------------------------------------------------
//
// Configure the UART1 using Timer1, for <baudrate> and 8-N-1.
//
void UART1_Init (void)
{
char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page
SFRPAGE = UART1_PAGE;
SCON1 = 0x10; // SCON1: mode 0, 8-bit UART, enable RX
SFRPAGE = TIMER01_PAGE;
TMOD &= ~0xF0;
TMOD |= 0x20; // TMOD: timer 1, mode 2, 8-bit reload
if (SYSCLK/BAUDRATE/2/256 < 1) {
C51 COMPILER V7.09 F12X_INIT 06/29/2007 17:12:09 PAGE 9
TH1 = -(SYSCLK/BAUDRATE/2);
CKCON |= 0x10; // T1M = 1; SCA1:0 = xx
} else if (SYSCLK/BAUDRATE/2/256 < 4) {
TH1 = -(SYSCLK/BAUDRATE/2/4);
CKCON &= ~0x13; // Clear all T1 related bits
CKCON |= 0x01; // T1M = 0; SCA1:0 = 01
} else if (SYSCLK/BAUDRATE/2/256 < 12) {
TH1 = -(SYSCLK/BAUDRATE/2/12);
CKCON &= ~0x13; // T1M = 0; SCA1:0 = 00
} else {
// Adjust for truncation in special case
// Note: Additional cases may be required if the system clock is changed.
#if ((BAUDRATE == 115200) && (SYSCLK == 98000000))
TH1 = -((SYSCLK/BAUDRATE/2/48)+1);
#else
TH1 = -(SYSCLK/BAUDRATE/2/48);
#endif
CKCON &= ~0x13; // Clear all T1 related bits
CKCON |= 0x02; // T1M = 0; SCA1:0 = 10
}
TL1 = TH1; // initialize Timer1
TR1 = 1; // start Timer1
SFRPAGE = UART1_PAGE;
TI1 = 1; // Indicate TX1 ready
SFRPAGE = SFRPAGE_SAVE; // Restore SFR page
}
//-----------------------------------------------------------------------------
// _getkey
//-----------------------------------------------------------------------------
//
// SFR Paged version of _getkey
//
char _getkey () {
char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page
char c;
SFRPAGE = UART1_PAGE;
while (!RI1);
c = SBUF1;
RI1 = 0;
SFRPAGE = SFRPAGE_SAVE;
return (c);
}
//-----------------------------------------------------------------------------
// putchar
//-----------------------------------------------------------------------------
//
// SFR Paged version of putchar
//
char putchar (char c) {
char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page
SFRPAGE = UART1_PAGE;
C51 COMPILER V7.09 F12X_INIT 06/29/2007 17:12:09 PAGE 10
// output CR
if (c == '\n') {
while (!TI1);
TI1 = 0;
SBUF1 = 0x0d;
}
// output character
while (!TI1);
TI1 = 0;
SBUF1 = c;
SFRPAGE = SFRPAGE_SAVE;
return (c);
}
#endif // UART_ENABLED
523
524 #endif // MCU == F120
525
526 //-----------------------------------------------------------------------------
527 // End Of File
528 //-----------------------------------------------------------------------------
C51 COMPILATION COMPLETE. 0 WARNING(S), 48 ERROR(S)
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