📄 dsp_boot.s54
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;=============================================================================
; Filename: dsp_boot.s54
; Description: This file contains the DSP bootloader.
;
; Copyright (C) 2000 - 2002 Texas Instruments Incorporated
;
; Assumptions: DSP Executable to be bootloaded must be designed to run in
; Microcomputer Mode - MP/MC = 0
;
;=============================================================================
.include dsp_boot.inc
.mmregs
.sect "intvects"
SELF
STM 0FFA8h, PMST ;Set Overlay and DROM Bits
B BootLoad
.text
BootLoad:
;===== Configure DSP Memory =====
;================================
RPT #100-1 ;Delay - didn't work without this
NOP
STM 00010h, BSCR ;Clear API Boot Mode
;===== Set PMST for Bootload of particular DSP Executable =====
STM PMST_VAL, AR1
LD *AR1,B ;Save PMST in B for later
;===== If (OVLY == 0) this is a special condition set rest of PMST, but don't
; set OVLY=0 now
LD *AR1,A
OR #00020h,A ;Make sure OVLY=1
STLM A, PMST
;===== Let MCU Know we are ready to Bootload =====
STM DSP_READY, AR1 ; DSP_READY address used to tell MCU
; time to bootload
ST #1, *AR1 ; API boot mode is done.
; Set *DSP_READY=1
LD 5, ARP ; AR5 used for branch test
NOP ; pipeline conflict avoidance
;===== Main Loop - Wait for Command from Host =====
;==================================================
XMainLoop:
;===== Check if there is program to load =====
MVDM PROG_BUF_READY, AR5 ; Check if there is program data to load
NOP ; pipeline conflict avoidance
BANZ XProgLoad, *AR5 ; Second argument unused.
;===== Check if there is data to load =====
MVDM DATA_BUF_READY, AR5 ; Check if there is data to load
NOP ; pipeline conflict avoidance
BANZ XDataLoad, *AR5 ; Second argument unused.
;===== Check if were done with bootload =====
MVDM COPY_DONE, AR5 ; Check if we're done with bootload
NOP ; pipeline conflict avoidance
BANZ ProgEnd, *AR5 ; Goto End when all done.
B XMainLoop ; Stay in this loop until bootload is
; finished
;===== Load Program =====
;========================
XProgLoad:
;===== AR4->Buffer of Code to be loaded =====
STM API_BUF_START, AR4 ; AR4 pointing to source memory
;===== Section Count = Count - 1, Store for repeat instruction to copy code
LD *AR4, A ; A = count.
SUB #1, A ; RPT instruction takes (n-1) as count.
STL A, *AR4 ; Store decremented count back to memory
MVDP *AR4+, #XProgRPT+1 ; Move count into RPT opcode below.
;===== Main Program Loop =====
XProgLoop:
;===== Code below assumes that DSP Exec will run in MP/MC = 0
; (i.e., Microcomputer Mode) =====
ANDM #0FFBFh, PMST ; Make sure we are in Microcomputer
; Mode MP/MC=0
;===== if (DestADdr < 0x6000) && (OVLY == 0) Then DestAddr is external
; and requires special loading =====
;===== if (DestAddr < 0x6000) Then Check OVLY bit =====
LDU *AR4, A ; A = DestAddr
NOP
NOP
SUB #06000h,A ; If DestAddr < 0x6000, drop through
NOP
NOP
BC StoreDestProgAddr,AGEQ ; Otherwise, DestAddr >= 0x6000,
; take branch
;===== if (OVLY == 0) Then Special Loading Required =====
STM PMST_VAL, AR1
BITF *AR1, #00020h ; Test Overlay Bit, if not set,
; drop through
NOP
NOP
BC StoreDestProgAddr,TC ; Otherwise, if set OVLY = 1, take branch
;===== Load This Section of Code via MP mode and DestAddr + 0x8000 =====
SpecialProgLoad:
ORM #00040h, PMST ; Put DSP in Microprocessor
; Mode MP/MC = 1
NOP
NOP
ORM #08000h,*AR4 ; Add 0x8000 to DestAddr
NOP
NOP
StoreDestProgAddr:
;===== Store Destination Addr for Copy =====
MVDP *AR4, #XProgMVDP+1 ;
; Move destination adr into opcode below.
MVDP *AR4+, #XProgMVDP+1 ; Move destination adr into opcode below.
XProgRPT:
RPT #0FFFFH ; Repeat count times.
; (FFFF will be replaced)
XProgMVDP:
MVDP *AR4+, #0 ; Move from source to destination.
; (note 0 gets overwritten)
LD *AR4, A ; Get next count
STLM A, AR5 ; Store to AR5 for banz test.
SUB #1, A ; RPT instruction takes (n-1) as count.
STL A, *AR4 ; Store decremented count back to memory
MVDP *AR4+, #XProgRPT+1 ; Move count into RPT opcode below.
LD 5, ARP ; ARP = AR5 (used for banz test later)
NOP ; Needed to avoid pipeline conflict
BANZ XProgLoop, *AR5 ; Dummy second argument unused
STM PROG_BUF_READY, AR4 ; Return Address
ST #0, *AR4 ; Write 0 to PROG status word
; signaling complete
B XMainLoop ; Return to main bootloader loop.
;===== Load Data =====
;=====================
XDataLoad:
STM API_BUF_START, AR4 ; AR4 pointing to source memory
LD *AR4, A ; A = count.
SUB #1, A ; RPT instruction takes (n-1) as count.
STL A, *AR4 ; Store decremented count back to memory
MVDP *AR4+, #XDataRPT+1 ; Move count into RPT opcode below.
XDataLoop:
LD *AR4+, A ; Get destination address
STLM A, AR3 ; AR3 points to destination address
NOP ; Needed to avoid pipeline conflict
NOP ; Needed to avoid pipeline conflict
XDataRPT:
RPT #0FFFFH ; Repeat count times.
; (FFFF will be replaced)
MVDD *AR4+, *AR3+ ; Move from source to destination.
LD *AR4, A ; Get next count
STLM A, AR5 ; Store to AR5 for banz test.
SUB #1, A ; RPT instruction takes (n-1) as count.
STL A, *AR4 ; Store decremented count back to memory
MVDP *AR4+, #XDataRPT+1 ; Move count into RPT opcode below.
LD 5, ARP ; ARP = AR5 (used for banz test later)
NOP ; Needed to avoid pipeline conflict
BANZ XDataLoop, *AR5 ; Dummy second argument unused
STM DATA_BUF_READY, AR4 ; Return Address
ST #0, *AR4 ; Write return value to return address,
; signa
B XMainLoop ; Return to main bootloader loop.
ProgEnd:
B 0FF80h
.end
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