📄 mcs912dp256.h
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#define ATD0TEST1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x89)))
#define ATD0DIEN (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x8d)))
#define PORTAD0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x8f)))
#define ATD0DR0H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x90)))
#define ATD0DR0L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x91)))
#define ATD0DR1H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x92)))
#define ATD0DR1L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x93)))
#define ATD0DR2H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x94)))
#define ATD0DR2L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x95)))
#define ATD0DR3H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x96)))
#define ATD0DR3L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x97)))
#define ATD0DR4H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x98)))
#define ATD0DR4L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x99)))
#define ATD0DR5H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x9a)))
#define ATD0DR5L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x9b)))
#define ATD0DR6H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x9c)))
#define ATD0DR6L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x9d)))
#define ATD0DR7H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x9e)))
#define ATD0DR7L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x9f)))
#define PWME (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xa0)))
#define PWMPOL (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xa1)))
#define PWMCLK (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xa2)))
#define PWMPRCLK (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xa3)))
#define PWMCAE (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xa4)))
#define PWMCTL (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xa5)))
#define PWMTST (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xa6)))
#define PWMPRSC (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xa7)))
#define PWMSCLA (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xa8)))
#define PWMSCLB (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xa9)))
#define PWMSCNTA (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xaa)))
#define PWMSCNTB (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xab)))
#define PWMCNT0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xac)))
#define PWMCNT1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xad)))
#define PWMCNT2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xae)))
#define PWMCNT3 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xaf)))
#define PWMCNT4 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xb0)))
#define PWMCNT5 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xb1)))
#define PWMCNT6 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xb2)))
#define PWMCNT7 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xb3)))
#define PWMPER0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xb4)))
#define PWMPER1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xb5)))
#define PWMPER2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xb6)))
#define PWMPER3 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xb7)))
#define PWMPER4 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xb8)))
#define PWMPER5 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xb9)))
#define PWMPER6 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xba)))
#define PWMPER7 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xbb)))
#define PWMDTY0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xbc)))
#define PWMDTY1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xbd)))
#define PWMDTY2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xbe)))
#define PWMDTY3 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xbf)))
#define PWMDTY4 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xc0)))
#define PWMDTY5 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xc1)))
#define PWMDTY6 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xc2)))
#define PWMDTY7 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xc3)))
#define PWMSDN (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xc4)))
#define SCI0BDH (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xc8)))
#define SCI0BDL (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xc9)))
#define SC0CR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xca)))
#define SCI0CR2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xcb)))
#define SCI0SR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xcc)))
#define SC0SR2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xcd)))
#define SCI0DRH (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xce)))
#define SCI0DRL (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xcf)))
#define SCI1BDH (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xd0)))
#define SCI1BDL (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xd1)))
#define SC1CR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xd2)))
#define SCI1CR2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xd3)))
#define SCI1SR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xd4)))
#define SCI1SR2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xd5)))
#define SCI1DRH (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xd6)))
#define SCI1DRL (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xd7)))
#define SPI0CR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xd8)))
#define SPI0CR2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xd9)))
#define SPI0BR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xda)))
#define SPI0SR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xdb)))
#define SPI0DR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xdd)))
#define IBAD (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xe0)))
#define IBFD (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xe1)))
#define IBCR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xe2)))
#define IBSR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xe3)))
#define IICDR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xe4)))
#define DLCBCR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xe8)))
#define DLCBSVR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xe9)))
#define DLCBCR2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xea)))
#define DLCBDR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xeb)))
#define DLCBARD (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xec)))
#define DLCBRSR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xed)))
#define DLCSCR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xee)))
#define DLCBSTAT (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xef)))
#define SPI1CR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xf0)))
#define SPI1CR2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xf1)))
#define SPI1BR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xf2)))
#define SPI1SR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xf3)))
#define SPI1DR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xf5)))
#define SPI2CR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xf8)))
#define SPI2CR2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xf9)))
#define SPI2BR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xfa)))
#define SPI2SR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xfb)))
#define SPI2DR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0xfd)))
#define FCLKDIV (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x100)))
#define FSEC (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x101)))
#define FCNFG (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x103)))
#define FPROT (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x104)))
#define FSTAT (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x105)))
#define FCMD (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x106)))
#define ECLKDIV (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x110)))
#define ECNFG (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x113)))
#define EPROT (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x114)))
#define ESTAT (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x115)))
#define ECMD (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x116)))
#define ATD1CTL0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x120)))
#define ATD1CTL1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x121)))
#define ATD1CTL23 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x122)))
#define ATD1CTL2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x122)))
#define ATD1CTL3 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x123)))
#define ATD1CTL45 (*((volatile unsigned int *)(HC12_IO_BASE_ADR+0x124)))
#define ATD1CTL4 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x124)))
#define ATD1CTL5 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x125)))
#define ATD1STAT0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x126)))
#define ATD1STAT1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x12b)))
#define ATD1TEST0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x128)))
#define ATD1TEST1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x129)))
#define ATDDIEN (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x12d)))
#define PORTAD1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x12f)))
#define ATD1DR0H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x130)))
#define ATD1DR0L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x131)))
#define ATD1DR1H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x132)))
#define ATD1DR1L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x133)))
#define ATD1DR2H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x134)))
#define ATD1DR2L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x135)))
#define ATD1DR3H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x136)))
#define ATD1DR3L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x137)))
#define ATD1DR4H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x138)))
#define ATD1DR4L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x139)))
#define ATD1DR5H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x13a)))
#define ATD1DR5L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x13b)))
#define ATD1DR6H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x13c)))
#define ATD1DR6L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x13d)))
#define ATD1DR7H (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x13e)))
#define ATD1DR7L (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x13f)))
#define CAN0CTL0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x140)))
#define CAN0CTL1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x141)))
#define CAN0BTR0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x142)))
#define CAN0BTR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x143)))
#define CAN0RFLG (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x144)))
#define CAN0RIER (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x145)))
#define CAN0TFLG (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x146)))
#define CAN0TIER (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x147)))
#define CAN0TARQ (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x148)))
#define CAN0TAAK (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x149)))
#define CAN0TBSEL (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x14a)))
#define CAN0IDAC (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x14b)))
#define CAN0RXERR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x14e)))
#define CAN0TXERR (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x14f)))
#define CAN0IDAR0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x150)))
#define CAN0IDAR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x151)))
#define CAN0IDAR2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x152)))
#define CAN0IDAR3 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x153)))
#define CAN0IDMR0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x154)))
#define CAN0IDMR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x155)))
#define CAN0IDMR2 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x156)))
#define CAN0IDMR3 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x157)))
#define CAN0IDAR4 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x158)))
#define CAN0IDAR5 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x159)))
#define CAN0IDAR6 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x15a)))
#define CAN0IDAR7 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x15b)))
#define CAN0IDMR4 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x15c)))
#define CAN0IDMR5 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x15d)))
#define CAN0IDMR6 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x15e)))
#define CAN0IDMR7 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x15f)))
#define CAN1CTL0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x180)))
#define CAN1CTL1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x181)))
#define CAN1BTR0 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x182)))
#define CAN1BTR1 (*((volatile unsigned char *)(HC12_IO_BASE_ADR+0x183)))
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