bandpass.asm

ADSP-21160下的数字带通滤波器实现的汇编代码。 开发环境为 Visual Dsp 4.5++。

/*****************************************************************************************************************

(C) Copyright 2002 - Analog Devices, Inc.  All rights reserved.

File Name:		bandpass.asm

Date Modified:	4/11/02		Rev 1.0	
			
Purpose:	   	ADSP-21160 EZ-KIT Initialization and Main Program Shell					
				
*****************************************************************************************************************/
#include 	"bandpass.h"
#include 	"AD1881_Registers.h"
  
.GLOBAL		_main;
.GLOBAL		Init_DSP;
.EXTERN		init_fir_filter;

//---------------------------------------------------------------------------
.SEGMENT/dm seg_dmda;


.endseg;

//---------------------------------------------------------------------------

.segment /pm seg_pmco;
start:
_main:
	// This is required for disabling SPORT config for EZKIT Parallel Port debugger 
	CALL Clear_All_SPT0_Regs;				// Clear and Reset SPORT0 and DMAs 	
	call Program_SPORT0_Registers;			// Initialize SPORT0 for codec communications 
	call Program_DMA_Controller;			// Start Serial Port 0 tx and rx DMA Transfers 	

	call Codec_Reset;
	call AD1881_Codec_Initialization;		// Initialize & program AD1881 
	
	call init_fir_filter;					// initialize user buffers 

	IRPTL = 0x00000000;
	bit set imask SPR0I | SPT0I;			// start audio processing, enable SPORT0 rx int 
	
	call Blink_LEDs_Test;					// Are We Alive? 

wait_forever:
	idle;
	jump wait_forever;

_main.end:

//--------------------------------------------------------------------------------------
// Note: This routine is first called at the Reset Vector in the Interrupt Vector Table 
//--------------------------------------------------------------------------------------

Init_DSP:
	// Setup hardware interrupts, FLAG LEDs and pushbutton 
	bit set MODE2 FLG0O | FLG1O | FLG2O; 	// flags 1-3 are outputs for LEDs 
	bit set FLAGS FLG0 | FLG1 | FLG2;		// turn on all LEDs 
	bit set mode2 IRQ2E |IRQ0E | IRQ1E;		// irqx edge sensitive 	
	IRPTL = 0x00000000;						// clear pending interrupts 
	bit set mode1 IRPTEN | NESTM;			// enable global interrupts, nesting for monitor integrity 	
	bit set imask IRQ1I | IRQ2I;			// irq2 enabled, keep irq0 and irq1 enabled for Parallel Port Interface 	


	L0 = 0;
	L1 = 0;
	L2 = 0;
	L3 = 0;
	L4 = 0;
	L5 = 0;
	L6 = 0;
	L7 = 0;
	L8 = 0;
	L9 = 0;
	L10 = 0;
	L11 = 0;
	L12 = 0;
	L13 = 0;
	L14 = 0;
	L15 = 0;

	rts;


Init_DSP.end:

Blink_LEDs_Test:

		bit clr FLAGS FLG0|FLG1|FLG2;		// clear flags to start

		// Blink flags 5 times 
		lcntr=10, do blink_loop until lce;
			lcntr=10000000;
			do delay until lce;
delay:			nop;
blink_loop:	
			bit tgl FLAGS FLG0|FLG1|FLG2;
		rts;

.endseg;