sysbuspci.c

移植好的Ibm405ep bsp板极支持包

/* sysBusPci.c - IBM PLB-PCI bridge autoconfig support */

/*******************************************************************************
   This source and object code has been made available to you by IBM on an
   AS-IS basis.

   IT IS PROVIDED WITHOUT WARRANTY OF ANY KIND, INCLUDING THE WARRANTIES OF
   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE OR OF NONINFRINGEMENT
   OF THIRD PARTY RIGHTS.  IN NO EVENT SHALL IBM OR ITS LICENSORS BE LIABLE
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   under IBM patents or patent applications is to be implied by the copyright
   license.

   Any user of this software should understand that neither IBM nor its
   licensors will be responsible for any consequences resulting from the use
   of this software.

   Any person who transfers this source code or any derivative work must
   include the IBM copyright notice, this paragraph, and the preceding two
   paragraphs in the transferred software.

   Any person who transfers this object code or any derivative work must
   include the IBM copyright notice in the transferred software.

   COPYRIGHT   I B M   CORPORATION 2000
   LICENSED MATERIAL  -  PROGRAM PROPERTY OF  I B M"

*******************************************************************************/

/* Copyright 1997-1999 Wind River Systems, Inc. All Rights Reserved */

/*
modification history
--------------------
01a,09may00,mcg  created from templatePpc/sysBusPci.c version 01b

*/
/*
DESCRIPTION

This file contains functions needed to initialize and kick off the PCI
auto-configuration process, functions needed by the PCI auto-configurations
routines to perform configuration cycles (mechanism 0), and a function to
initialize the PCI bridge in the 405GP.

*/

/* includes */

#include "vxWorks.h"
#include "logLib.h"
#include "taskLib.h"
#include "config.h"

#include "drv/pci/pciConfigLib.h"
#include "drv/pci/pciAutoConfigLib.h"

/* defines */

/* typedefs */

/* globals */

PCI_SYSTEM sysParams;

/*
 * For each of the 4 PCI expansion slot on the board, the INTA, INTB,
 * INTC, and INTD pins are wire-ORed together.  Each wire-ORed signal is then
 * connected to a unique pin on the 405GP Universal Interrupt Controller.
 */

#define DEV1_INT    INT_VEC_PCI_SLOT3     /* INTA/B/C/D for PCI slot 3 (J25) */
#define DEV2_INT    INT_VEC_PCI_SLOT2     /* INTA/B/C/D for PCI slot 2 (J26) */
#define DEV3_INT    INT_VEC_PCI_SLOT1     /* INTA/B/C/D for PCI slot 1 (J29) */
#define DEV4_INT    INT_VEC_PCI_SLOT0     /* INTA/B/C/D for PCI slot 0 (J31) */

static UCHAR intLine [][4] =
    {
    /*    IntA      IntB      IntC      IntD                            */
        { 0xff,     0xff,     0xff,     0xff     },  /* device number 0 */
        { DEV1_INT, DEV1_INT, DEV1_INT, DEV1_INT },  /* device number 1 */
        { DEV2_INT, DEV2_INT, DEV2_INT, DEV2_INT },  /* device number 2 */
        { DEV3_INT, DEV3_INT, DEV3_INT, DEV3_INT },  /* device number 3 */
        { DEV4_INT, DEV4_INT, DEV4_INT, DEV4_INT }   /* device number 4 */
    };

/* forward declarations */

LOCAL UCHAR sysPciAutoConfigIntAsgn ( PCI_SYSTEM * pSys, PCI_LOC * pFunc,
    UCHAR intPin );
LOCAL STATUS sysPciAutoConfigInclude ( PCI_SYSTEM *pSys, PCI_LOC *pciLoc,
    UINT devVend );

/* subroutines */

/******************************************************************************
*
* sysPciAutoConfigInclude - Determine if function is to be autoConfigured
*
* This function is called with PCI bus, device, function, and vendor
* information.  It returns an indication of whether or not the particular
* function should be included in the automatic configuration process.
* This capability is useful if it is desired that a particular function
* NOT be automatically configured.  Of course, if the device is not
* included in automatic configuration, it will be unusable unless the
* user's code made provisions to configure the function outside of the
* the automatic process.
*
* RETURNS: TRUE if function is to be included in automatic configuration,
* FALSE otherwise.
*/

LOCAL STATUS sysPciAutoConfigInclude
    (
    PCI_SYSTEM *pSys,           /* input: AutoConfig system information */
    PCI_LOC *pciLoc,            /* input: PCI address of this function */
    UINT     devVend            /* input: Device/vendor ID number      */
    )
    {
    BOOL retVal = OK;

    /* If it's the host bridge then exclude it */

    if ((pciLoc->bus == 0) && (pciLoc->device == 0) && (pciLoc->function == 0))
        return ERROR;


    switch(devVend)
        {

        /* TODO - add any excluded devices by device/vendor ID here */

        default:
            retVal = OK;
            break;
        }

    return retVal;
    }

/******************************************************************************
*
* sysPciAutoConfigIntAssign - Assign the "interrupt line" value
*
* RETURNS: "interrupt line" value.
*
*/

LOCAL UCHAR sysPciAutoConfigIntAsgn
    (
    PCI_SYSTEM * pSys,          /* input: AutoConfig system information */
    PCI_LOC * pFunc,
    UCHAR intPin                /* input: interrupt pin number */
    )
    {
    UCHAR irqValue = 0xff;    /* Calculated value                */


    if (intPin == 0)
        return irqValue;

    irqValue = intLine [(pFunc->device)][(intPin - 1)];

    PCI_AUTO_DEBUG_MSG("intAssign called for device [%d %d %d] IRQ: %d\n",
                pFunc->bus, pFunc->device, pFunc->function,
                irqValue, 0, 0 );

    return (irqValue);
    }

/*******************************************************************************
*
* sysPciAutoConfig - PCI autoConfig support routine
*
* This routine instantiates the PCI_SYSTEM structure needed to configure
* the system. This consists of assigning address ranges to each category
* of PCI system resource: Prefetchable and Non-Prefetchable 32-bit Memory, and
* 16- and 32-bit I/O. Global values for the Cache Line Size and Maximum
* Latency are also specified. Finally, the four supplemental routines for
* device inclusion/exclusion, interrupt assignment, and pre- and
* post-enumeration bridge initialization are specified.
*
* RETURNS: N/A
*/

void sysPciAutoConfig (void)
    {

    /* 32-bit Non-prefetchable Memory Space */

    sysParams.pciMemIo32 = PCI_MSTR_MEMIO_BUS;
    sysParams.pciMemIo32Size = PCI_MSTR_MEMIO_SIZE;

    /* 32-bit Prefetchable Memory Space */

    sysParams.pciMem32= PCI_MSTR_MEM_BUS;
    sysParams.pciMem32Size = PCI_MSTR_MEM_SIZE;

    /* 16-bit ISA I/O Space not supported */

    sysParams.pciIo16 = 0;
    sysParams.pciIo16Size = 0;

    /* 32-bit PCI I/O Space */

    sysParams.pciIo32 = PCI_MSTR_IO_BUS;
    sysParams.pciIo32Size = PCI_MSTR_IO_SIZE;

    /* Configuration space parameters */

    sysParams.cacheSize = (ppc405CACHE_ALIGN_SIZE/4);
    sysParams.maxLatency = PCI_LAT_TIMER;
    sysParams.autoIntRouting = TRUE;
    sysParams.includeRtn = sysPciAutoConfigInclude;
    sysParams.intAssignRtn = sysPciAutoConfigIntAsgn;
    sysParams.bridgePreConfigInit = NULL;
    sysParams.bridgePostConfigInit = NULL;

    /* Perform AutoConfig */

    pciAutoConfig (&sysParams);

    return;
    }

/*******************************************************************************
*
* ibmPciConfigWrite - write to one PCI configuration register location of the
*                     specified size (1, 2 or 4 bytes).
*
* This routine writes one PCI configuration space location
*
* RETURNS: N/A
*
*/
STATUS ibmPciConfigWrite