sysnet.c

移植好的Ibm405ep bsp板极支持包

    )
    {
    return (intEnable (intlvl));
    }

/******************************************************************************
*
* sysLan97xIntDisable - disable the LAN interrupt
*
* Disables the interrupt in the UIC corresponding to the PCI slot where
* the Ethernet card was found
*
* RETURNS: N/A
*
*/

STATUS sysLan97xIntDisable
    (
    UINT intlvl
    )
    {
    return (intDisable (intlvl));
    }

/******************************************************************************
*
* sysLan97xEnetAddrGet - get the Ethernet controller's MAC address
*
* Returns the Ethernet controller's MAC address to the END driver.
*
* RETURNS: N/A
*
*/

STATUS sysLan97xEnetAddrGet
    (
    LN_97X_DRV_CTRL *pDrvCtrl,
    char *enetAdrs
    )
    {
    memcpy(enetAdrs, sysEnetAddr, sizeof(sysEnetAddr));
    return(OK);
    }

#endif /* INCLUDE_LN97XEND */

#ifdef INCLUDE_EMAC_NETWORK
/******************************************************************************
*
* sysIbmEmacEndBldLoadStr - builds the ibmEmacEndLoad parameter string
*
* RETURNS:
*
*/
STATUS sysIbmEmacEndBldLoadStr
    (
    void
    )
    {

    UINT        flags = 0;

    /*
     * The following flags can be used to make the ibmEmacEnd driver work in
     * different modes.  If EMAC_INPUT_UNCACHED_BUF is specified then
     * EMAC_INPUT_TX_COPY must also be, but not vice-versa.
     */

    flags |= EMAC_INPUT_TX_2_CHANNEL;    /* use 2 TX channels       */

#if 0
    flags |= EMAC_INPUT_TX_COPY;         /* FORCE TX COPY !!!!      */
    flags |= EMAC_INPUT_UNCACHED_BUF;    /* USE UNCACHED BUFFERS    */
#endif /* 0 */

    /*
     * Build the initialization string.  It looks like this:
     *
     * <baseAdrs>:<malTxChn0>:<malTxChn1>:<malRxCh0>:<intVec>:<intLvl>:
     * <memAdrs>:<memSize>:<flags>:<phyAdrs>:<cacheLineSize>:<pMalData>:
     * <opbSpeedMhz>
     *
     * The unit number will be tacked onto the beginning by muxEndLoad
     */

    sprintf(sysEmacLoadString0, "0x%X:%d:%d:%d:%d:%d:0x%X:0x%X:0x%X:%d:%d:0x%X:%d",
                                EMAC0_BASE,
                                EMAC0_TX_CHN_0_405EP,
                                EMAC0_TX_CHN_1_405EP,
                                EMAC0_RX_CHN_0_405EP,
                                INT_VEC_ETHERNET_0,
                                INT_LVL_ETHERNET_0,
                                NONE,
                                0,
                                flags,
                                EMAC_PHY_ADRS_0,
                                _CACHE_ALIGN_SIZE,
                                (UINT)pMalData,
                                systemInfo.freqPLB/systemInfo.pllOpbDiv/1000000);


    sprintf(sysEmacLoadString1, "0x%X:%d:%d:%d:%d:%d:0x%X:0x%X:0x%X:%d:%d:0x%X:%d",
                                EMAC1_BASE,
                                EMAC1_TX_CHN_0_405EP,
                                EMAC1_TX_CHN_1_405EP,
                                EMAC1_RX_CHN_0_405EP,
                                INT_VEC_ETHERNET_1,
                                INT_LVL_ETHERNET_1,
                                NONE,
                                0,
                                flags,
                                EMAC_PHY_ADRS_1,
                                _CACHE_ALIGN_SIZE,
                                (UINT)pMalData,
                                systemInfo.freqPLB/systemInfo.pllOpbDiv/1000000);

    return(OK);
    }

/******************************************************************************
*
* sysLanIbmEmacEnable - enable the LAN interrupt
*
* Enables the interrupt in the UIC corresponding to the PCI slot where
* the Ethernet card was found
*
* RETURNS: N/A
*
*/

void sysLanIbmEmacIntEnable
    (
    UINT intlvl
    )
    {

    intEnable (intlvl);

    }

/******************************************************************************
*
* sysLanIbmEmacIntDisable - disable the LAN interrupt
*
* Disables the interrupt in the UIC corresponding to the PCI slot where
* the Ethernet card was found
*
* RETURNS: N/A
*
*/

void sysLanIbmEmacIntDisable
    (
    UINT intlvl
    )
    {

    intDisable (intlvl);

    }

/******************************************************************************
*
* sysLanIbmEmacEnetAddrGet - get the IBM EMAC Ethernet controller's MAC address
*
* Returns the Ethernet controller's MAC address to the END driver.
*
* RETURNS: OK, or ERROR
*
*/
int f_choice_macboot()
{
  int rv;	
  unsigned char macflag[4];
  bcopy((char *)read_default_macflag,macflag,4);
  if((macflag[0]==0xde) && (macflag[1]==0xfa) && (macflag[2]==0x19) && (macflag[3]==0x5b))
    {
      rv=0;          /*default mac*/	
    }	
  else
      rv=1;          /*user set mac */
  return rv;
}
STATUS sysLanIbmEmacEnetAddrGet
    (
    EMAC_DRV_CTRL * pDrvCtrl,
    UINT8 *   enetAdrs
    )
{
    /* Read and store the variable address bytes from flash */
    int flag;	
    #ifndef INCLUDE_SYSTEM_BOOT_PARA
     enetAdrs[0]=0x00;
	enetAdrs[1]=0x60;
	enetAdrs[2]=0x6e;
	enetAdrs[3]=0x42;
	enetAdrs[4]=0xbb;
	enetAdrs[5]=0x08;
	 return (OK);
    #endif
    flag=f_choice_macboot();
    if(flag){ 
        bcopy ((char *)user_set_macaddr,(char *)enetAdrs,6); /*启用用户设置的MAC地址*/
    }else
        bcopy ((char *)system_mac_addr,(char *)enetAdrs,6); /*启用系统的出厂MAC地址*/
    /*    enetAdrs[0]=0x00;
	enetAdrs[1]=0x60;
	enetAdrs[2]=0x6e;
	enetAdrs[3]=0x42;
	enetAdrs[4]=0xb9;
	enetAdrs[5]=0x08;*/
    return (OK);
}
/******************************************************************************
*
* sysLanIbmEmacEnetAddr0Set - set the Ethernet address for EMAC0
*
* This routine sets the variable portion of the Ethernet address, the first
* three bytes contain a fixed manufacturer's code, while the last 3 bytes are
* set locally, to generate a unique Ethernet address on the local network.
*
* RETURN: OK, always.
*
* NOMANUAL
*/

STATUS sysLanIbmEmacEnetAddr0Set
    (
    char byte5,                 /* Ethernet address high order byte */
    char byte4,
    char byte3,
    char byte2,
    char byte1,
    char byte0                  /* Ethernet address low order byte */
    )
    {
    char        bytes[3];

    /* Save the lower three bytes in NVRAM */
    bytes[0] = byte2;
    bytes[1] = byte1;
    bytes[2] = byte0;
    sysNvRamSet (bytes, 3, NV_ENET_OFFSET_0);

    return (OK);
    }

/******************************************************************************
*
* sysLanIbmEmacEnetAddr1Set - set the Ethernet address for EMAC1
*
* This routine sets the variable portion of the Ethernet address, the first
* three bytes contain a fixed manufacturer's code, while the last 3 bytes are
* set locally, to generate a unique Ethernet address on the local network.
*
* RETURN: OK, always.
*
* NOMANUAL
*/

STATUS sysLanIbmEmacEnetAddr1Set
    (
    char byte5,                 /* Ethernet address high order byte */
    char byte4,
    char byte3,
    char byte2,
    char byte1,
    char byte0                  /* Ethernet address low order byte */
    )
    {
    char        bytes[3];

    /* Save the lower three bytes in NVRAM */
    bytes[0] = byte2;
    bytes[1] = byte1;
    bytes[2] = byte0;
    sysNvRamSet (bytes, 3, NV_ENET_OFFSET_1);

    return (OK);
    }

/******************************************************************************
*
* sysEmacRegRead405EP - reads the specified EMAC register in a 405EP
*
* This function is required because both EMACs on the 405EP must share the
* STACR register of EMAC0 to access the registers in the attached PHY.
*
* RETURNS: value of the EMAC register read
*
*/

ULONG sysEmacRegRead405EP
    (
    EMAC_DRV_CTRL * pDrvCtrl,
    UINT32          regAdrs
    )
    {

    /*
     * Special case:
     * If this is EMAC1 and the register being read is the STACR, read
     * from the STACR of EMAC0 instead.
     */

    if ((pDrvCtrl->unit == 1) && (regAdrs == EMAC_STACR))
        return(sysInLong(EMAC0_BASE + regAdrs));
    else
        return(sysInLong(pDrvCtrl->baseAdrs + regAdrs));

    }

/******************************************************************************
*
* sysEmacRegWrite405EP - writes the specified EMAC register in a 405EP
*
* This function is required because both EMACs on the 405EP must share the
* STACR register of EMAC0 to access the registers in the attached PHY.
*
* RETURNS: N/A
*
*/

void sysEmacRegWrite405EP
    (
    EMAC_DRV_CTRL * pDrvCtrl,
    UINT32          regAdrs,
    UINT32          value
    )
    {

    /*
     * Special case:
     * If this is EMAC1 and the register being written is the STACR, write
     * to the STACR of EMAC0 instead.
     */

    if ((pDrvCtrl->unit == 1) && (regAdrs == EMAC_STACR))
        sysOutLong(EMAC0_BASE + regAdrs, value);
    else
        sysOutLong(pDrvCtrl->baseAdrs + regAdrs, value);

    return;
    }

#endif /* INCLUDE_EMAC_NETWORK */

#endif /* INCLUDE_NETWORK */