📄 postinit.c
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/* openbios/arch/pallas/lamar/postinit.c *//*-----------------------------------------------------------------------------+|| This source code has been made available to you by IBM on an AS-IS| basis. Anyone receiving this source is licensed under IBM| copyrights to use it in any way he or she deems fit, including| copying it, modifying it, compiling it, and redistributing it either| with or without modifications. No license under IBM patents or| patent applications is to be implied by the copyright license.|| Any user of this software should understand that IBM cannot provide| technical support for this software and will not be responsible for| any consequences resulting from the use of this software.|| Any person who transfers this source code or any derivative work| must include the IBM copyright notice, this paragraph, and the| preceding two paragraphs in the transferred software.|| COPYRIGHT I B M CORPORATION 1995| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M+-----------------------------------------------------------------------------*//*-----------------------------------------------------------------------------+|| File Name: postinit.c|| Function: Do more board init before OPENBIOS is startup.|| Author: Yudong Yang|| Change Activity-|| Date Description of Change BY| --------- --------------------- ---| 26-Mar-02 Created YYD| 29-Mar-02 Add CS4360 init code YYD|+-----------------------------------------------------------------------------*/void board_post_init(void){ unsigned char buf[16]; MT_DCR(0x1a1, 0x00000410); // enable audio clock and mute // this is a must for the DAC to accept i2c data // set Xilinx reset bits // note that cs4360 need a second reset *((unsigned short *)0xf2030000) = 0xffff; msdelay(1); // delay 1 ms *((unsigned short *)0xf2030000) = 0xfffe; // init cs4360 STEP 1 buf[0] = 0x01; // addr buf[1] = 0x10; // mode control 2, ENABLE CONTROL PORT i2c_bus_write(0, 0x20, buf, 2, 0); buf[0] = 0x02; // addr buf[1] = 0x00; // mode control 2, ENABLE CONTROL PORT i2c_bus_write(0, 0x20, buf, 2, 0); buf[0] = 0x03; // addr buf[1] = 0x09; // mode control 2, ENABLE CONTROL PORT i2c_bus_write(0, 0x20, buf, 2, 0); buf[0] = 0x06; // addr buf[1] = 0x00; // mode control 2, ENABLE CONTROL PORT i2c_bus_write(0, 0x20, buf, 2, 0); buf[0] = 0x08; // addr buf[1] = 0x00; // mode control 2, ENABLE CONTROL PORT i2c_bus_write(0, 0x20, buf, 2, 0); buf[0] = 0x0C; // addr buf[1] = 0x23; // mode control 2, ENABLE CONTROL PORT i2c_bus_write(0, 0x20, buf, 2, 0);/* buf[0] = 0x0C; // addr buf[1] = 0x24; // mode control 2, ENABLE CONTROL PORT i2c_bus_write(0, 0x20, buf, 2, 0); // init cs4360 STEP 2 buf[0] = 0x01; // addr buf[1] = 0x10; // mode control 1 buf[2] = 0x00; // invert signal buf[3] = 0x09; // mixing 1 buf[4] = 0x09; // mixing 2 buf[5] = 0x09; // mixing 3 buf[6] = 0x00; // volumn control buf[7] = 0x00; // volumn control buf[8] = 0x00; // volumn control buf[9] = 0x00; // volumn control buf[10] = 0x00; // volumn control buf[11] = 0x00; // volumn control buf[12] = 0x23; // mode control 2 i2c_bus_write(0, 0x20, buf, 13, 0);*/ msdelay(10); // delay 10 ms // init cxa2161r for S-Video buf[0] = 0x06; buf[1] = 0x00; buf[2] = 0x00; buf[3] = 0x00; buf[4] = 0x01; buf[5] = 0x00; buf[6] = 0x3f; i2c_bus_write(0, 0x90, buf, 7, 0); return; // not needed yet}
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