enetloc.h

Ibmstb02500 miniboot 源码

/* openbios/arch/olivia/enetloc.h, redbios */
/*-----------------------------------------------------------------------------+
|
|       This source code has been made available to you by IBM on an AS-IS
|       basis.  Anyone receiving this source is licensed under IBM
|       copyrights to use it in any way he or she deems fit, including
|       copying it, modifying it, compiling it, and redistributing it either
|       with or without modifications.  No license under IBM patents or
|       patent applications is to be implied by the copyright license.
|
|       Any user of this software should understand that IBM cannot provide
|       technical support for this software and will not be responsible for
|       any consequences resulting from the use of this software.
|
|       Any person who transfers this source code or any derivative work
|       must include the IBM copyright notice, this paragraph, and the
|       preceding two paragraphs in the transferred software.
|
|       COPYRIGHT   I B M   CORPORATION 1995
|       LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M
+-----------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------+
|
|  File Name:   enetloc.h
|
|  Function:    Architecture local dependent defines of enetlib.
|
|  Author:      Alan Booker, Maciej P. Tyrlik
|
|  Change Activity-
|
|  Date        Description of Change                                       BY
|  ---------   ---------------------                                       ---
|  28-Jan-94   Created                                                     ajb
|  24-Mar-94   Code review updates                                         kdw
|  15-Jun-94   Port to Oak                                                 MPT
|  16-Jan-97   Port to DDI Board                                           kdw
|  02-Feb-00   Port to Redwood IV / Vesta                                  jfh
|  30-Dec-01   Splitted from common include headers                        YYD
|
+-----------------------------------------------------------------------------*/
#ifndef _enetloc_h_
#define _enetloc_h_

/*-----------------------------------------------------------------------------+
| Primary register base for Olivia
+-----------------------------------------------------------------------------*/
#define NIC_BASE        0xf3400300
#define NIC_PORT        0xf3400310
#define NIC_DMA         0xf3400300  // fake for CR


#define PAGE0           0x00
#define PAGE1           0x40
#define PAGE2           0x80

#define PBMASK          0xC0
#define ACC_MASK        0x80

#define PACKET_SIZE     256
//RTL8019 has build in 16K buffer mapped from page 0x40 to 0x7f
#define TR_STARTP	0x60	// transmit start page  END AT 0x7F, 16 PAGES is enough for ethernet packet
#define PSTART_VALUE    0x40	// receive start
#define PSTOP_VALUE     0x60	// stop page

/*-----------------------------------------------------------------------------+
| Some page 0 regs.
+-----------------------------------------------------------------------------*/
#define CR              NIC_BASE+ 0x00  /* command register (r/w)             */
#define PS1             0x80            /* page select bit 1                  */
#define PS0             0x40            /* page select bit 0                  */
#define RD2             0x20            /* remote DMA Command bit 2           */
#define RD1             0x10            /* remote DMA Command bit 1           */
#define RD0             0x08            /* remote DMA Command bit 0           */
#define TXP             0x04            /* transmit Packet                    */
#define STA             0x02            /* start NIC core                     */
#define STP             0x01            /* stop NIC core                      */

#define TSR             NIC_BASE+ 0x04  /* transmit status register (r)       */
#define OWC             0x80            /* out of window collision            */
#define CDH             0x40            /* collision detect heartbeat         */
#define FU              0x20            /* fIFO underrun                      */
#define CRS             0x10            /* carrier Sense lost                 */
#define ABT             0x08            /* transmit ended                     */
#define COL             0x04            /* transmit collided                  */
#define PTXS            0x01            /* transmit without error             */

#define ISR             NIC_BASE+ 0x07  /* interrupt status (r/w)             */
#define RST             0x80            /* reset status                       */
#define RDC             0x40            /* remote DMA complete                */
#define CNT             0x20            /* counter overflow                   */
#define OVW             0x10            /* overwrite warning                  */
#define TXE             0x08            /* transmit error                     */
#define RXE             0x04            /* receive error                      */
#define PTX             0x02            /* packet transmitted                 */
#define PRX             0x01            /* packet received                    */

#define RSR             NIC_BASE+ 0x0c  /* receive status register (r)        */
#define DFR             0x80            /* collision                          */
#define DIS             0x40            /* receiver disabled                  */
#define PHY             0x20            /* physical Address match             */
#define MPA             0x10            /* missed packet                      */
#define FO              0x08            /* fIFO Overrun                       */
#define FAE             0x04            /* frame alignment error              */
#define CRCE            0x02            /* cRC error                          */
#define PRXS            0x01            /* packet received intact             */

#define RCR             NIC_BASE+ 0x0c  /* receive config reg (w)             */
#define MMO             0x20            /* monitor mode                       */
#define PRO             0x10            /* promiscuous addressing             */
#define AM              0x08            /* accept multicast                   */
#define AB              0x04            /* accept broadcast                   */
#define AR              0x02            /* accept runt packets                */
#define SEP             0x01            /* save errored packets               */

#define TCR             NIC_BASE+ 0x0d  /* transmit configuration reg (w)     */
#define OFST            0x10            /* collision offset enable            */
#define ATD             0x08            /* auto transmit disable              */
#define LB1             0x04            /* loopback control 1                 */
#define LB0             0x02            /* loopback control 0                 */
#define LBM0            0x00            /* normal mode                        */
#define LBM1            0x02            /* internal NIC loopback              */
#define LBM2            0x04            /* internal ENDEC loopback            */
#define LBM3            0x06            /* extrenal loopback                  */
#define CRC             0x01            /* cRC inhibited                      */

#define DCR             NIC_BASE+ 0x0e  /* data configuration register (w)    */
#define FT1             0x40            /* fifo threshold select bit 1        */
#define FT0             0x20            /* fifo threshold select bit 0        */
#define FT2B            0x00            /* two bytes                          */
#define FT4B            0x20            /* 4 bytes                            */
#define FT8B            0x40            /* 8 bytes                            */
#define FT12B           0x60            /* 12 bytes                           */
#define ARM             0x10            /* auto initialize remote             */
#define LS              0x08            /* loopback select                    */
#define LAS             0x04            /* long Address select                */
#define BOS             0x02            /* byte order select                  */
#define WTS             0x01            /* word DMA transfers                 */

#define IMR             NIC_BASE+ 0x0f  /* interrupt mask (w)                 */
#define RDCE            0x40            /* remote DMA complete enable         */
#define CNTE            0x20            /* counter overflow enable            */
#define OVWE            0x10            /* overwrite warning enable           */
#define TXEE            0x08            /* transmit error enable              */
#define RXEE            0x04            /* recevie error enable               */
#define PTXE            0x02            /* packet transmitted enable          */
#define PRXE            0x01            /* packet received enable             */

#define RTL_RESET	NIC_BASE+ 0x1f		// reset register

/*-----------------------------------------------------------------------------+
| Other reg definitions.
+-----------------------------------------------------------------------------*/
#define PSTART          NIC_BASE+ 0x01  /* receive page start (w, 0)          */
#define PSTOP           NIC_BASE+ 0x02  /* receive page stop (w, 0)           */
#define BNRY            NIC_BASE+ 0x03  /* boundary register (r/w, 0)         */
#define NCR             NIC_BASE+ 0x05  /* number of collisions (r, 0)        */
#define TBCR0           NIC_BASE+ 0x05  /* low order byte count (w, 0)        */
#define FIFO            NIC_BASE+ 0x06  /* fIFO register (r, 0)               */
#define TBCR1           NIC_BASE+ 0x06  /* high order byte count (w, 0)       */
#define CRDA0           NIC_BASE+ 0x08  /* remote DMA address reg 0 (r, 0)    */
#define RSAR0           NIC_BASE+ 0x08  /* remote start address 0 (w, 0)      */
#define CRDA1           NIC_BASE+ 0x09  /* remote DMA address reg 1 (r, 0)    */
#define RSAR1           NIC_BASE+ 0x09  /* remote start address 1 (w, 0)      */
#define RBCR0           NIC_BASE+ 0x0a  /* remote byte count reg 0 (w, 0)     */
#define RBCR1           NIC_BASE+ 0x0b  /* remote byte count reg 1 (w, 0)     */
#define CNTR0           NIC_BASE+ 0x0d  /* frame alignment error count (r, 0) */
#define CNTR1           NIC_BASE+ 0x0e  /* cRC errors (r, 0)                  */
#define CNTR2           NIC_BASE+ 0x0f  /* missed packets (r, 0)              */

#define TPSR            NIC_BASE+ 0x04  /* transmit page start (w, 2)         */
#define CLDA0           NIC_BASE+ 0x01  /* current local DMA reg 0 (w, 2)     */
#define CLDA1           NIC_BASE+ 0x02  /* current local DMA reg 1 (w, 2)     */

#define PAR0            NIC_BASE+ 0x01  /* physical address regs (r/w, 1)     */
#define PAR1            NIC_BASE+ 0x02
#define PAR2            NIC_BASE+ 0x03
#define PAR3            NIC_BASE+ 0x04
#define PAR4            NIC_BASE+ 0x05
#define PAR5            NIC_BASE+ 0x06
#define CURR            NIC_BASE+ 0x07  /* current page register (r/w, 1)     */
#define MAR0            NIC_BASE+ 0x08  /* multicast address regs (r/w, 1)    */
#define MAR1            NIC_BASE+ 0x09
#define MAR2            NIC_BASE+ 0x0a
#define MAR3            NIC_BASE+ 0x0b
#define MAR4            NIC_BASE+ 0x0c
#define MAR5            NIC_BASE+ 0x0d
#define MAR6            NIC_BASE+ 0x0e
#define MAR7            NIC_BASE+ 0x0f

#endif // _enetloc_h_