i2cbase.h

Ibmstb02500 miniboot 源码

/* openbios/arch/vulcan/i2cbase.h, stbbios */
/*-----------------------------------------------------------------------------+
|
|       This source code has been made available to you by IBM on an AS-IS
|       basis.  Anyone receiving this source is licensed under IBM
|       copyrights to use it in any way he or she deems fit, including
|       copying it, modifying it, compiling it, and redistributing it either
|       with or without modifications.  No license under IBM patents or
|       patent applications is to be implied by the copyright license.
|
|       Any user of this software should understand that IBM cannot provide
|       technical support for this software and will not be responsible for
|       any consequences resulting from the use of this software.
|
|       Any person who transfers this source code or any derivative work
|       must include the IBM copyright notice, this paragraph, and the
|       preceding two paragraphs in the transferred software.
|
|       COPYRIGHT   I B M   CORPORATION 1995
|       LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M
+-----------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------+
|
|  File Name:   i2cbase.h
|
|  Function:    I2C bus support for IBM STB 04 chips.
|
|  Author:      Yudong Yang.
|
|  Change Activity-
|
|  Date        Description of Change                                       BY
|  ---------   ---------------------                                       ---
|  25-Mar-02   Created                                                     YYD
|  26-Apr-02   Modified                                                    VK
+-----------------------------------------------------------------------------*/

// start of platform/i2cbase.h


static unsigned int  I2C_BUS_BASE[NUM_OF_I2C_BUSES] =
{
	0x40030000	// i2c 0
};

#define I2C_CLKDIV	6	// for STBx25xx, recommanded value


// defines the I2C bus register offset
#define STB_I2C_MDB      0x0000       /* Master Data Buffer                 */
#define STB_I2C_SDB      0x0002       /* Slave Data Buffer                  */
#define STB_I2C_LMA      0x0004       /* Lo Master Address                  */
#define STB_I2C_HMA      0x0005       /* Hi Master Address                  */
#define STB_I2C_CNTL     0x0006       /* Control                            */
#define STB_I2C_MCNTL    0x0007       /* Mode Control                       */
#define STB_I2C_STAT     0x0008       /* Status                             */
#define STB_I2C_ESTAT    0x0009       /* Extended Status                    */
#define STB_I2C_LSA      0x000A       /* Slave Address                      */
#define STB_I2C_HSA      0x000B       /* Slave Address                      */
#define STB_I2C_CLKDVD   0x000C       /* Clock Divide                       */
#define STB_I2C_INTEN    0x000D       /* Interrupt Enable / Mask            */
#define STB_I2C_TCNT     0x000E       /* Transfer Count                     */
#define STB_I2C_ECSS     0x000F       /* Extended Control and Slave Status  */

#define I2C_CONTROL_TRANSFER_START                      0x01
#define I2C_CONTROL_READ                                0x02
#define I2C_CONTROL_CHAIN                               0x04
#define I2C_CONTROL_REPST                               0x08
#define I2C_CONTROL_ADDRESSING_10_BIT                   0x40
#define I2C_CONTROL_COUNT_1                             0x00
#define I2C_CONTROL_COUNT_2                             0x10
#define I2C_CONTROL_COUNT_3                             0x20
#define I2C_CONTROL_COUNT_4                             0x30

#define I2C_MODE_CONTROL_EN_HOLD_SCL                    0x01
#define I2C_MODE_CONTROL_EXIT_UNK_STATE                 0x02
#define I2C_MODE_CONTROL_EN_INT                         0x04
#define I2C_MODE_CONTROL_FAST_MODE                      0x10
#define I2C_MODE_CONTROL_FLUSH_MASTER_DATA_BUF          0x40
#define I2C_MODE_CONTROL_FLUSH_SLAVE_DATA_BUF           0x80

#define I2C_STATUS_DONE                                 0x01
#define I2C_STATUS_IRQ_ACTIVE                           0x02
#define I2C_STATUS_ERROR                                0x04

#define I2C_EX_STATUS_TR_ABORT                          0x01
#define I2C_EX_STATUS_TR_INCOMPLETE                     0x02
#define I2C_EX_STATUS_TR_SLAVE_W_SER                    0x04
#define I2C_EX_STATUS_TR_SLAVE_R_SER                    0x08
#define I2C_EX_STATUS_TR_BUS_CTRL_0                     0x10
#define I2C_EX_STATUS_TR_BUS_CTRL_1                     0x20
#define I2C_EX_STATUS_TR_BUS_CTRL_2                     0x40
#define I2C_EX_STATUS_TR_SLAVE_R_COMP                   0x80

// end of platform/i2cbase.h