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📄 platform.h

📁 Ibmstb02500 miniboot 源码
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/* openbios/arch/vulcan/redwood6/platform.h, stb-bios *//*-----------------------------------------------------------------------------+||       This source code has been made available to you by IBM on an AS-IS|       basis.  Anyone receiving this source is licensed under IBM|       copyrights to use it in any way he or she deems fit, including|       copying it, modifying it, compiling it, and redistributing it either|       with or without modifications.  No license under IBM patents or|       patent applications is to be implied by the copyright license.||       Any user of this software should understand that IBM cannot provide|       technical support for this software and will not be responsible for|       any consequences resulting from the use of this software.||       Any person who transfers this source code or any derivative work|       must include the IBM copyright notice, this paragraph, and the|       preceding two paragraphs in the transferred software.||       COPYRIGHT   I B M   CORPORATION 1995|       LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M+-----------------------------------------------------------------------------*//*-----------------------------------------------------------------------------+||  File Name:   platform.h||  Function:    STB BIOS architecture depdendent settings for Redwood6.||  Author:      Yudong Yang||  Change Activity-||  Date        Description of Change                                       BY|  ---------   ---------------------                                       ---|  30-Dec-01   Created                                                     YYD|  26-Apr-02   Modified                                                    VK |  21-Jun-02   Increased stack size and enabled dynamic .bss+.data size    YYD+-----------------------------------------------------------------------------*//*-----------------------------------------------------------------------------+| Defines for common addresses for RAM+-----------------------------------------------------------------------------*/// please note that initbrd.s may need to be changed too#define RAM_BANK_0        0x00000000#define RAM_BANK_1        0xA0000000// please note the Pallas 1 Bug#define RAM_BANK_0_SIZE   0x02000000  // RW5 has 32MB RAM in bank 0#define RAM_BANK_1_SIZE   0x00800000  // RW5 has 8MB RAM in bank 1/*-----------------------------------------------------------------------------+| Defines for common addresses for FLASH +-----------------------------------------------------------------------------*/#define AMD_FLASH_2X4M                   //2 x  AM29LV320DB// The size of flash memory 8MB on RW6#define FLASH_START        0x7f000000    // start address of flash memory#define FLASH_DEV_SIZE     0x01000000    // size of each flash device#define FLASH_TOTAL_SIZE   0x01000000   // total size of flash memory#define FLASH_ADDR_MASK    0x7fffffff    // flash device address mask#define FLASH_NUM_DEVS     1		     // number of devices#define FLASH_DEV_STRING   0x227e        // AM29LV320DB/*-----------------------------------------------------------------------------+| Defines for common addresses for BIOS +-----------------------------------------------------------------------------*/// STB-BIOS Memory Map:// RAM_BANK_1//   .data      // the address is also specified in root/mapfile2 and root/mapfile.gnu//   .sdata//   .bss//   .sbss//   C Runtime Stack//   Interrupt Service Stack//   Flash Update Code in RAM//   Flash Update Buffer//   Available RAM//   VIDEO_RAM_ADDRESS   if BOOTLOGO is enabled// In Flash ROM// BIOS_START//   .text     // the address is also specified in root/mapfile2 and root/mapfile.gnu//   .rodata#define BIOS_START	        0xfffe0000       // the start address of BIOS .text segment    // should be exactly the same as specified in mapfile2 / mapfile.gnu.  (STB-BIOS root dir)#define BIOS_SIZE               0x00020000   // 128K BIOS AREA      Please make sure this is the correct one#define BIOS_DATA_ADDR         RAM_BANK_1    // BIOS_DATA now start at this point#define BIOS_STACK_SIZE         0x10000	     // C runtime Stack size#define BIOS_INT_STACK_SIZE     0x2000	     // interrupt handler Stack size#ifndef  __ASSEMBLER__      // defined for assembler preprocessorextern unsigned int BIOS_DATA_SIZE;      // data + bss segment size, rounded to 4K boundary#define BIOS_FLASH_CODE_SIZE    0x2000  // size of flash code which is needed to be placed in memory#define BIOS_FLASH_CODE_ADDR    (RAM_BANK_1 + BIOS_STACK_SIZE + BIOS_INT_STACK_SIZE + BIOS_DATA_SIZE)//#define BIOS_FLASH_BUFFER_SIZE  0x10000 // 64kB buffer for writing flash#define BIOS_FLASH_BUFFER_SIZE  0x20000 // 128kB buffer for writing flash#define BIOS_FLASH_BUFFER_ADDR  (BIOS_FLASH_CODE_ADDR + BIOS_FLASH_CODE_SIZE)#define RAM_ADDRESS             (BIOS_FLASH_BUFFER_ADDR + BIOS_FLASH_BUFFER_SIZE)  // free unused memory address#endif   // __ASSEMBLER__/*-----------------------------------------------------------------------------+| Flash address of the BIOS config data area (resides in FLASH ROM).+-----------------------------------------------------------------------------*/#define BIOS_CONFIG_START         0x7f800000    // Use 2nd chip for BIOS, 1st for some app(MHP)#define BIOS_CONFIG_SIZE          (0x00020000)  // 64K config data#define BIOS_MANAGED_FLASH_SIZE   0x800000      // 4MB /*-----------------------------------------------------------------------------+| Flash address of the BIOS VPD config data area (resides in FLASH ROM).+-----------------------------------------------------------------------------*/#define VPD_ADDR        BIOS_CONFIG_START  // VPD data area#define VPD_SIZE        (0x1000)           // VPD data area size/*-----------------------------------------------------------------------------+| Flash address of the "NVRAM" data area (resides in FLASH ROM).+-----------------------------------------------------------------------------*/#define NVRAM_START     (VPD_ADDR + VPD_SIZE)#define NVRAM_SIZE	    (0x1000)/*-----------------------------------------------------------------------------+| Flash address of the BOOTLOGO data area (resides in FLASH ROM).+-----------------------------------------------------------------------------*/#define BOOTLOGO_FLASH_START (NVRAM_START + NVRAM_SIZE+0x2000) #define BOOTLOGO_FLASH_SIZE  (BIOS_CONFIG_SIZE - NVRAM_SIZE - VPD_SIZE)// The flash memory region can be used by boot image#define IMAGE_FLASH_OFFSET       BIOS_CONFIG_SIZE   // leave starting 64k for misc use#define IMAGE_FLASH_MAX          (BIOS_MANAGED_FLASH_SIZE - (BIOS_SIZE + IMAGE_FLASH_OFFSET)) // 0x003d0000#define IMAGE_FLASH_START        (BIOS_CONFIG_START + IMAGE_FLASH_OFFSET | 0x80000000)/*-----------------------------------------------------------------------------+| Defines for common addresses for BOOT Image +-----------------------------------------------------------------------------*/#define ENTRY_PT_MIN             0x0000A000  // the minimal entry point location of boot image/*-----------------------------------------------------------------------------+| Defines for addresses of BOOTLOGO video buffer+-----------------------------------------------------------------------------*/#define VIDEO_RAM_ADDRESS  (RAM_BANK_1 + 4*1024*1024)	// RAM_BANK1 + 8 MByte// Ethernet interrupt#define ENET_INT	EXI_I2#define PLATFORM_SUPPORT_VERSION  "1.03 (Jun/24/2002)"

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