ser16552.c

2440 wince uart source code

    }

    LeaveCriticalSection(&(pHWHead->RegCritSec));

    RETAILMSG(QYDEBUG,
              (TEXT("-SL_SetStopBits 0x%X\r\n"), pHead));

    return(bRet);
}

ULONG
SL_GetRxBufferSizeq(
                  PVOID pHead
                  )
{
	RETAILMSG(QYDEBUG,(TEXT("SL_GetRufferSizeq() \r\n")));
    return(0);
}

PVOID
SL_GetRxStartq(
             PVOID   pHead // @parm PVOID returned by SC_init.
             )
{
RETAILMSG(QYDEBUG,(TEXT("SL_GetRxStartq\r\n")));
    return(NULL);
}


INTERRUPT_TYPE
SL_GetInterruptTypeq(
                   PVOID pHead      // Pointer to hardware head
                   )
{
    PSER16550_INFO    pHWHead = (PSER16550_INFO)pHead;
    INTERRUPT_TYPE interrupts=INTR_NONE;
    RETAILMSG(0,
              (TEXT("+SL_GetInterruptType 0x%X\r\n"), pHead));

    try {
        pHWHead->IIR = INB(pHWHead, pIIR_FCR);

    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        pHWHead->IIR = SERIAL_IIR_INT_INVALID; // simulate no interrupt
    }

    if ( pHWHead->IIR & SERIAL_IIR_INT_INVALID ) {
        // No interrupts pending, vector is useless
        interrupts = INTR_NONE;//interrupt ID =0
    } else {
        // The interrupt value is valid
        switch ( pHWHead->IIR & SERIAL_IIR_INT_MASK ) {
        case SERIAL_IIR_RLS://Receiver Line Status
            interrupts = INTR_LINE;//interrupt ID=1
            break;

        case SERIAL_IIR_CTI://Receiver Date Time Out
        case SERIAL_IIR_CTI_2://(Transmitter Holding Register Empty) &(Receiver Date Time Out)
        case SERIAL_IIR_RDA://Receiver Date Ready
            interrupts = INTR_RX;//interrupt ID =2
 
            break;

        case SERIAL_IIR_THRE ://Transmitter Holding Register Empty
            interrupts = INTR_TX;//interrupt ID =4
            break;

        case SERIAL_IIR_MS ://Modem Status Register
            interrupts = INTR_MODEM;//interrupt ID =8
            break;

        default:
            interrupts = INTR_NONE;//interrupt ID =0
            break;
        }
    }

    if (pHWHead->AddTXIntr) {
        interrupts |= INTR_TX;
        pHWHead->AddTXIntr = FALSE;
    }

   
   	RETAILMSG(0,((TEXT("-SL_GetInterruptTypeq(return(interrupts= 0x%x))\r\n")),interrupts));
	
    return(interrupts);
}


ULONG
SL_RxIntrq(
         PVOID pHead,                // @parm Pointer to hardware head
         PUCHAR pRxBuffer,           // @parm Pointer to receive buffer
         ULONG *pBufflen             // @parm In = max bytes to read, out = bytes read
         )
{
    PSER16550_INFO   pHWHead    = (PSER16550_INFO)pHead;
    ULONG        RetVal    = 0;
    ULONG        TargetRoom    = *pBufflen;
    BOOL        fRXFlag = FALSE;
    BOOL        fReplaceparityErrors = FALSE;
    BOOL        fNull;
    UCHAR       cEvtChar, cRXChar;

    RETAILMSG(QYDEBUG, (TEXT("+SL_RxIntrq() %d.\r\n"),
                  *pBufflen));
     		*pBufflen = 0;

    // LAM - I have local copies of some DCB elements since I don't
    // want to keep dereferencing inside my read loop and there are too
    // many of them to trust the compiler.
    cEvtChar = pHWHead->dcb.EvtChar;
    fNull = pHWHead->dcb.fNull;
    if ( pHWHead->dcb.fErrorChar && pHWHead->dcb.fParity )
        fReplaceparityErrors = TRUE;

    try {
    	
 
    //      while ( TargetRoom ) 
    //****
    		while (INB(pHWHead, pIIR_FCR)&0x06)
        	{

          // See if there is another byte to be read
	//ReadLSRq( pHWHead );
   	 // pHWHead->LSR = INB(pHWHead, pLSR);

 //	if ( pHWHead->LSR & SERIAL_LSR_DR ) {//receive data ready (0x01) 
	//	if ( pHWHead->LSR & 0x15 ) {
 	// Read the byte
                cRXChar = INB(pHWHead, pData);

     //	}else {
                // We read all chars, so we're done
     //         break;
     //   }

        
		//RETAILMSG(1,(TEXT("SERIAL4 Receive Char =%c \r\n"),cRXChar));
                // But we may want to discard it
                if ( pHWHead->dcb.fDsrSensitivity &&
                     (! (pHWHead->MSR & SERIAL_MSR_DSR)) ) {
                    // Do nothing - byte gets discarded
               RETAILMSG (QYDEBUG,
                              (TEXT("Dropping byte because DSR is low\r\n")));
                } else if (!cRXChar && fNull) {
                    // Do nothing - byte gets discarded
                    RETAILMSG (QYDEBUG,
                              (TEXT("Dropping NULL byte due to fNull\r\n")));
                } else {
                    // Do character replacement if parity error detected.
                    if ( fReplaceparityErrors && (pHWHead->LSR & SERIAL_LSR_PE) ) {
                        cRXChar = pHWHead->dcb.ErrorChar;
                    } else {
                        // See if we need to generate an EV_RXFLAG for the received char.
                        if ( cRXChar == cEvtChar )
                            fRXFlag = TRUE;
                    }

                    // Finally, we can get byte, update status and save.
                    *pRxBuffer++ = cRXChar;
                    (*pBufflen)++;
                    --TargetRoom;
                }
            } 
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        // just exit
    }

    // if we saw one (or more) EVT chars, then generate an event
    if ( fRXFlag )
        pHWHead->EventCallback( pHWHead->pMddHead, EV_RXFLAG );

    if ( pHWHead->DroppedBytes )
        DEBUGMSG (ZONE_WARN, (TEXT("Rx drop %d.\r\n"),
                              pHWHead->DroppedBytes));

    RetVal = pHWHead->DroppedBytes;
    pHWHead->DroppedBytes = 0;
//****
	 OUTB(pHWHead, pIER, 0x01);
  RETAILMSG(QYDEBUG,(TEXT("-SL_Rxtrq() END\r\n")));
    return(RetVal);
}



VOID
SL_TxIntrq(
         PVOID pHead                // Hardware Head
         )
{
    PSER16550_INFO   pHWHead    = (PSER16550_INFO)pHead;

    RETAILMSG(0,
              (TEXT("+SL_TxIntr 0x%X\r\n"), pHead));

    // Disable xmit intr.  Most 16550s will keep hammering
    // us with xmit interrupts if we don't turn them off
    // Whoever gets the FlushDone will then need to turn
    // TX Ints back on if needed.
    EnterCriticalSection(&(pHWHead->RegCritSec));
    try {
        OUTB(pHWHead, pIER, IER_NORMAL_INTS);
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        // Do nothing.  The worst case is that this was a fluke,
        // and a TX Intr will come right back at us and we will
        // resume transmission.
    }
    LeaveCriticalSection(&(pHWHead->RegCritSec));
   
    // Let the putbytes routine know he can continue
    PulseEvent(pHWHead->FlushDone);
   
    RETAILMSG(0,
              (TEXT("-SL_TxIntr 0x%X\r\n"), pHead));
}


//
// @doc OEM
// @func ULONG | SL_TXIntrEx | This routine is called from the new MDD
//   whenever INTR_TX is returned by SL_GetInterruptType
// 
// @rdesc None
//
VOID
SL_TxIntrExq(
           PVOID pHead,                // Hardware Head
           PUCHAR pTxBuffer,          // @parm Pointer to receive buffer
           ULONG *pBufflen            // @parm In = max bytes to transmit, out = bytes transmitted
           )
{
    PSER16550_INFO   pHWHead    = (PSER16550_INFO)pHead;
    ULONG NumberOfBytes = *pBufflen;

    DEBUGMSG (ZONE_THREAD, (TEXT("Transmit Event\r\n")));

    DEBUGMSG (ZONE_WRITE,
              (TEXT("+SL_TxIntrEx 0x%X, Len %d\r\n"), pHead, *pBufflen));
   RETAILMSG (QYDEBUG,
              (TEXT("+SL_TxIntrEx 0x%X, Len %d\r\n"), pHead, *pBufflen));


    // We may be done sending.  If so, just disable the TX interrupts
    // and return to the MDD.  
    if( ! *pBufflen ) {
        DEBUGMSG (ZONE_WRITE, (TEXT("SL_TxIntrEx: Disable INTR_TX.\r\n")));
         RETAILMSG (QYDEBUG, (TEXT("SL_TxIntrEx: Disable INTR_TX.\r\n")));
   
      OUTB(pHWHead, pIER, IER_NORMAL_INTS);
        return;
    }

    *pBufflen = 0;  // In case we don't send anything below.
    
    // Disable xmit intr.  Most 16550s will keep hammering
    // us with xmit interrupts if we don't turn them off
    // Whoever gets the FlushDone will then need to turn
    // TX Ints back on if needed.
    EnterCriticalSection(&(pHWHead->RegCritSec));
    try {
        // Need to signal FlushDone for XmitComChar
        PulseEvent(pHWHead->FlushDone);

        pHWHead->CommErrors &= ~CE_TXFULL;

        // If CTS flow control is desired, check cts. If clear, don't send,
        // but loop.  When CTS comes back on, the OtherInt routine will
        // detect this and re-enable TX interrupts (causing Flushdone).
        // For finest granularity, we would check this in the loop below,
        // but for speed, I check it here (up to 8 xmit characters before
        // we actually flow off.
        if ( pHWHead->dcb.fOutxCtsFlow ) {
            // ReadMSR( pHWHead );
            // We don't need to explicitly read the MSR, since we always enable
            // IER_MS, which ensures that we will get an interrupt and read
            // the MSR whenever CTS, DSR, TERI, or DCD change.

            if (! (pHWHead->MSR & SERIAL_MSR_CTS) ) {
            	ULONG value;
             
                DEBUGMSG (ZONE_WRITE|ZONE_FLOW,
                          (TEXT("SL_TxIntrEx, flowed off via CTS\n") ) );
                pHWHead->CTSFlowOff = TRUE;  // Record flowed off state
            
                // We could return a positive value here, which would
                // cause the MDD to periodically check the flow control
                // status.  However, we don't need to since we know that
                // the DCTS interrupt will cause the MDD to call us, and we
                // will subsequently fake a TX interrupt to the MDD, causing
                // him to call back into PutBytes.
		  value = INB(pHWHead, pIER);
                OUTB(pHWHead, pIER, value & ~SERIAL_IER_THR); // disable TX interrupts while flowed off
                LeaveCriticalSection(&(pHWHead->RegCritSec));
                return;
            }
        }

        // Same thing applies for DSR
        if ( pHWHead->dcb.fOutxDsrFlow ) {
            // ReadMSR( pHWHead );
            // We don't need to explicitly read the MSR, since we always enable
            // IER_MS, which ensures that we will get an interrupt and read
            // the MSR whenever CTS, DSR, TERI, or DCD change.

            if (! (pHWHead->MSR & SERIAL_MSR_DSR) ) {
            	ULONG value;
                DEBUGMSG (ZONE_WRITE|ZONE_FLOW,
                          (TEXT("SL_TxIntrEx, flowed off via DSR\n") ) );
                pHWHead->DSRFlowOff = TRUE;  // Record flowed off state
            	value = INB(pHWHead, pIER);
                    OUTB(pHWHead, pIER, value & ~IER_NORMAL_INTS); // disable TX interrupts while flowed off
 
                // See the comment above above positive return codes.

                LeaveCriticalSection(&(pHWHead->RegCritSec));
                return;
            }
        }
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
        // Do nothing.  The worst case is that this was a fluke,
        // and a TX Intr will come right back at us and we will
        // resume transmission.
    }

    LeaveCriticalSection(&(pHWHead->RegCritSec));


    //  OK, now lets actually transmit some data.
    DEBUGMSG (ZONE_WRITE, (TEXT("SL_TxIntrEx wait for CritSec %x.\r\n"),
                           &(pHWHead->TransmitCritSec)));
    EnterCriticalSection(&(pHWHead->TransmitCritSec));
    DEBUGMSG (ZONE_WRITE, (TEXT("SL_TxIntrEx got CritSec %x.\r\n"),
                           &(pHWHead->TransmitCritSec)));

    EnterCriticalSection(&(pHWHead->RegCritSec));
    try {
  //          ReadLSRq( pHWHead );
   //     if ( pHWHead->LSR & SERIAL_LSR_THRE ) {
   {             UCHAR       byteCount;
               if ( pHWHead->IIR & SERIAL_IIR_FIFOS_ENABLED )
                    byteCount = SERIAL_FIFO_DEPTH;
                else
                   byteCount = 1;
                
                DEBUGMSG (ZONE_WRITE | ZONE_THREAD,
                    (TEXT("SL_TxIntrEx - Write max of %d bytes\r\n"),
                    byteCount));
             RETAILMSG (QYDEBUG,
                    (TEXT("SL_TxIntrEx - Write max of %d bytes\r\n"),
                    byteCount));
               
                for ( *pBufflen=0; NumberOfBytes && byteCount; NumberOfBytes--, byteCount-- ) {
			//InterruptDone(0x26);
			//RETAILMSG(1,(TEXT("send data 0x%c.\r\n"),*pTxBuffer));
                    OUTB(pHWHead, pData, *pTxBuffer);
                    InterruptDone(pHWHead->dwSysIntr);
                    
                    ++pTxBuffer;
                    (*pBufflen)++;
                }
        
      }
        // Enable xmit intr. We need to do this no matter what, 
        // since the MDD relies on one final interrupt before
        // returning to the application. 
         RETAILMSG(QYDEBUG,(TEXT("SL_TxIntrEx:Enable INTR_TX.\r\n")));
        DEBUGMSG (ZONE_WRITE, (TEXT("SL_TxIntrEx: Enable INTR_TX.\r\n")));
       OUTB(pHWHead, pIER, IER_NORMAL_INTS | SERIAL_IER_THR);
 // 		*(volatile PUCHAR)((volatile PUCHAR)pHead+0x1) = (UCHAR)(IER_NORMAL_INTS | SERIAL_IER_THR);