📄 atm.c
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#include <common.h>
#include <mpc8xx.h>
#include <commproc.h>
#include "atm.h"
#include <linux/stddef.h>
#define SYNC __asm__("sync")
#define ALIGN(p, a) ((char *)(((uint32)(p)+(a)-1) & ~((uint32)(a)-1)))
#define FALSE 1
#define TRUE 0
#define OK 0
#define ERROR -1
struct atm_connection_t g_conn[NUM_CONNECTIONS] =
{
{ NULL, 10, NULL, 10, NULL, NULL, NULL, NULL }, /* OAM */
};
struct atm_driver_t g_atm =
{
FALSE, /* loaded */
FALSE, /* started */
NULL, /* csram */
0, /* csram_size */
NULL, /* am_top */
NULL, /* ap_top */
NULL, /* int_reload_ptr */
NULL, /* int_serv_ptr */
NULL, /* rbd_base_ptr */
NULL, /* tbd_base_ptr */
0 /* linerate */
};
char csram[1024]; /* more than enough for doing nothing*/
int atmLoad(void);
void atmUnload(void);
int atmMemInit(void);
void atmIntInit(void);
void atmApcInit(void);
void atmAmtInit(void);
void atmCpmInit(void);
void atmUtpInit(void);
/*****************************************************************************
*
* FUNCTION NAME: atmLoad
*
* DESCRIPTION: Basic ATM initialization.
*
* PARAMETERS: none
*
* RETURNS: OK or ERROR
*
****************************************************************************/
int atmLoad()
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile cpmtimer8xx_t *timers = &immap->im_cpmtimer;
volatile iop8xx_t *iop = &immap->im_ioport;
timers->cpmt_tgcr &= 0x0FFF; SYNC; /* Disable Timer 4 */
immap->im_cpm.cp_scc[4].scc_gsmrl = 0x0; SYNC; /* Disable SCC4 */
iop->iop_pdpar &= 0x3FFF; SYNC; /* Disable SAR and UTOPIA */
if ( atmMemInit() != OK ) return ERROR;
atmIntInit();
atmApcInit();
atmAmtInit();
atmCpmInit();
atmUtpInit();
g_atm.loaded = TRUE;
return OK;
}
/*****************************************************************************
*
* FUNCTION NAME: atmUnload
*
* DESCRIPTION: Disables ATM and UTOPIA.
*
* PARAMETERS: none
*
* RETURNS: void
*
****************************************************************************/
void atmUnload()
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile cpmtimer8xx_t *timers = &immap->im_cpmtimer;
volatile iop8xx_t *iop = &immap->im_ioport;
timers->cpmt_tgcr &= 0x0FFF; SYNC; /* Disable Timer 4 */
immap->im_cpm.cp_scc[4].scc_gsmrl = 0x0; SYNC; /* Disable SCC4 */
iop->iop_pdpar &= 0x3FFF; SYNC; /* Disable SAR and UTOPIA */
g_atm.loaded = FALSE;
}
/*****************************************************************************
*
* FUNCTION NAME: atmMemInit
*
* DESCRIPTION:
*
* The ATM driver uses the following resources:
*
* A. Memory in DPRAM to hold
*
* 1/ CT = Connection Table ( RCT & TCT )
* 2/ TCTE = Transmit Connection Table Extension
* 3/ MPHYPT = Multi-PHY Pointing Table
* 4/ APCP = APC Parameter Table
* 5/ APCT_PRIO_1 = APC Table ( priority 1 for AAL1/2 )
* 6/ APCT_PRIO_2 = APC Table ( priority 2 for VBR )
* 7/ APCT_PRIO_3 = APC Table ( priority 3 for UBR )
* 8/ TQ = Transmit Queue
* 9/ AM = Address Matching Table
* 10/ AP = Address Pointing Table
*
* B. Memory in cache safe RAM to hold
*
* 1/ INT = Interrupt Queue
* 2/ RBD = Receive Buffer Descriptors
* 3/ TBD = Transmit Buffer Descriptors
*
* This function
* 1. clears the ATM DPRAM area,
* 2. Allocates and clears cache safe memory,
* 3. Initializes 'g_conn'.
*
* PARAMETERS: none
*
* RETURNS: OK or ERROR
*
****************************************************************************/
int atmMemInit()
{
int i;
unsigned immr = CFG_IMMR;
int total_num_rbd = 0;
int total_num_tbd = 0;
memset((char *)CFG_IMMR + 0x2000 + ATM_DPRAM_BEGIN, 0x00, ATM_DPRAM_SIZE);
g_atm.csram_size = NUM_INT_ENTRIES * SIZE_OF_INT_ENTRY;
for ( i = 0; i < NUM_CONNECTIONS; ++i ) {
total_num_rbd += g_conn[i].num_rbd;
total_num_tbd += g_conn[i].num_tbd;
}
g_atm.csram_size += total_num_rbd * SIZE_OF_RBD + total_num_tbd * SIZE_OF_TBD + 4;
g_atm.csram = &csram[0];
memset(&(g_atm.csram), 0x00, g_atm.csram_size);
g_atm.int_reload_ptr = (uint32 *)ALIGN(g_atm.csram, 4);
g_atm.rbd_base_ptr = (struct atm_bd_t *)(g_atm.int_reload_ptr + NUM_INT_ENTRIES);
g_atm.tbd_base_ptr = (struct atm_bd_t *)(g_atm.rbd_base_ptr + total_num_rbd);
g_conn[0].rbd_ptr = g_atm.rbd_base_ptr;
g_conn[0].tbd_ptr = g_atm.tbd_base_ptr;
g_conn[0].ct_ptr = CT_PTR(immr);
g_conn[0].tcte_ptr = TCTE_PTR(immr);
return OK;
}
/*****************************************************************************
*
* FUNCTION NAME: atmIntInit
*
* DESCRIPTION:
*
* Initialization of the MPC860 ESAR Interrupt Queue.
* This function
* - clears all entries in the INT,
* - sets the WRAP bit of the last INT entry,
* - initializes the 'int_serv_ptr' attribuut of the AtmDriver structure
* to the first INT entry.
*
* PARAMETERS: none
*
* RETURNS: void
*
* REMARKS:
*
* - The INT resides in external cache safe memory.
* - The base address of the INT is stored in g_atm.int_reload_ptr.
* - The number of entries in the INT is given by NUM_INT_ENTRIES.
* - The INTBASE field in SAR Parameter RAM is set by atmCpmInit().
*
****************************************************************************/
void atmIntInit()
{
int i;
for ( i = 0; i < NUM_INT_ENTRIES - 1; ++i) g_atm.int_reload_ptr[i] = 0;
g_atm.int_reload_ptr[i] = INT_WRAP;
g_atm.int_serv_ptr = g_atm.int_reload_ptr;
}
/*****************************************************************************
*
* FUNCTION NAME: atmApcInit
*
* DESCRIPTION:
*
* This function initializes the following ATM Pace Controller related
* data structures:
*
* - 1 MPHY Pointing Table (contains only one entry)
* - 3 APC Parameter Tables (one PHY with 3 priorities)
* - 3 APC Tables (one table for each priority)
* - 1 Transmit Queue (one transmit queue per PHY)
*
* PARAMETERS: none
*
* RETURNS: void
*
****************************************************************************/
void atmApcInit()
{
int i;
/* unsigned immr = CFG_IMMR; */
uint16 * mphypt_ptr = MPHYPT_PTR(CFG_IMMR);
struct apc_params_t * apcp_ptr = APCP_PTR(CFG_IMMR);
uint16 * apct_prio1_ptr = APCT1_PTR(CFG_IMMR);
uint16 * tq_ptr = TQ_PTR(CFG_IMMR);
/***************************************************/
/* Initialize MPHY Pointing Table (only one entry) */
/***************************************************/
*mphypt_ptr = APCP_BASE;
/********************************************/
/* Initialize APC parameters for priority 1 */
/********************************************/
apcp_ptr->apct_base1 = APCT_PRIO_1_BASE;
apcp_ptr->apct_end1 = APCT_PRIO_1_BASE + NUM_APCT_PRIO_1_ENTRIES * 2;
apcp_ptr->apct_ptr1 = APCT_PRIO_1_BASE;
apcp_ptr->apct_sptr1 = APCT_PRIO_1_BASE;
apcp_ptr->etqbase = TQ_BASE;
apcp_ptr->etqend = TQ_BASE + ( NUM_TQ_ENTRIES - 1 ) * 2;
apcp_ptr->etqaptr = TQ_BASE;
apcp_ptr->etqtptr = TQ_BASE;
apcp_ptr->apc_mi = 8;
apcp_ptr->ncits = 0x0100; /* NCITS = 1 */
apcp_ptr->apcnt = 0;
apcp_ptr->reserved1 = 0;
apcp_ptr->eapcst = 0x2009; /* LAST, ESAR, MPHY */
apcp_ptr->ptp_counter = 0;
apcp_ptr->ptp_txch = 0;
apcp_ptr->reserved2 = 0;
/***************************************************/
/* Initialize APC Tables with empty slots (0xFFFF) */
/***************************************************/
for ( i = 0; i < NUM_APCT_PRIO_1_ENTRIES; ++i ) *(apct_prio1_ptr++) = 0xFFFF;
/************************/
/* Clear Transmit Queue */
/************************/
for ( i = 0; i < NUM_TQ_ENTRIES; ++i ) *(tq_ptr++) = 0;
}
/*****************************************************************************
*
* FUNCTION NAME: atmAmtInit
*
* DESCRIPTION:
*
* This function clears the first entry in the Address Matching Table and
* lets the first entry in the Address Pointing table point to the first
* entry in the TCT table (i.e. the raw cell channel).
*
* PARAMETERS: none
*
* RETURNS: void
*
* REMARKS:
*
* The values for the AMBASE, AMEND and APBASE registers in SAR parameter
* RAM are initialized by atmCpmInit().
*
****************************************************************************/
void atmAmtInit()
{
unsigned immr = CFG_IMMR;
g_atm.am_top = AM_PTR(immr);
g_atm.ap_top = AP_PTR(immr);
*(g_atm.ap_top--) = CT_BASE;
*(g_atm.am_top--) = 0;
}
/*****************************************************************************
*
* FUNCTION NAME: atmCpmInit
*
* DESCRIPTION:
*
* This function initializes the Utopia Interface Parameter RAM Map
* (SCC4, ATM Protocol) of the Communication Processor Modudule.
*
* PARAMETERS: none
*
* RETURNS: void
*
****************************************************************************/
void atmCpmInit()
{
unsigned immr = CFG_IMMR;
memset((char *)immr + 0x3F00, 0x00, 0xC0);
/*-----------------------------------------------------------------*/
/* RBDBASE - Receive buffer descriptors base address */
/* The RBDs reside in cache safe external memory. */
/*-----------------------------------------------------------------*/
*RBDBASE(immr) = (uint32)g_atm.rbd_base_ptr;
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