prim_ops.c
来自「适合KS8695X」· C语言 代码 · 共 2,262 行 · 第 1/5 页
C
2,262 行
if (cnt == 1) {
CONDITIONAL_SET_FLAG(
(((res & 0x8000) == 0x8000) ^
(ACCESS_FLAG(F_CF) != 0)),
F_OF);
} else {
CLEAR_FLAG(F_OF);
}
} else {
res = 0;
CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
CLEAR_FLAG(F_OF);
CLEAR_FLAG(F_SF);
SET_FLAG(F_PF);
SET_FLAG(F_ZF);
}
return (u16)res;
}
/****************************************************************************
REMARKS:
Implements the SHL instruction and side effects.
****************************************************************************/
u32 shl_long(u32 d, u8 s)
{
unsigned int cnt, res, cf;
if (s < 32) {
cnt = s % 32;
if (cnt > 0) {
res = d << cnt;
cf = d & (1 << (32 - cnt));
CONDITIONAL_SET_FLAG(cf, F_CF);
CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
} else {
res = d;
}
if (cnt == 1) {
CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
(ACCESS_FLAG(F_CF) != 0)), F_OF);
} else {
CLEAR_FLAG(F_OF);
}
} else {
res = 0;
CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
CLEAR_FLAG(F_OF);
CLEAR_FLAG(F_SF);
SET_FLAG(F_PF);
SET_FLAG(F_ZF);
}
return res;
}
/****************************************************************************
REMARKS:
Implements the SHR instruction and side effects.
****************************************************************************/
u8 shr_byte(u8 d, u8 s)
{
unsigned int cnt, res, cf;
if (s < 8) {
cnt = s % 8;
if (cnt > 0) {
cf = d & (1 << (cnt - 1));
res = d >> cnt;
CONDITIONAL_SET_FLAG(cf, F_CF);
CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
} else {
res = (u8) d;
}
if (cnt == 1) {
CONDITIONAL_SET_FLAG(XOR2(res >> 6), F_OF);
} else {
CLEAR_FLAG(F_OF);
}
} else {
res = 0;
CONDITIONAL_SET_FLAG((d >> (s-1)) & 0x1, F_CF);
CLEAR_FLAG(F_OF);
CLEAR_FLAG(F_SF);
SET_FLAG(F_PF);
SET_FLAG(F_ZF);
}
return (u8)res;
}
/****************************************************************************
REMARKS:
Implements the SHR instruction and side effects.
****************************************************************************/
u16 shr_word(u16 d, u8 s)
{
unsigned int cnt, res, cf;
if (s < 16) {
cnt = s % 16;
if (cnt > 0) {
cf = d & (1 << (cnt - 1));
res = d >> cnt;
CONDITIONAL_SET_FLAG(cf, F_CF);
CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
} else {
res = d;
}
if (cnt == 1) {
CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
} else {
CLEAR_FLAG(F_OF);
}
} else {
res = 0;
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
SET_FLAG(F_ZF);
CLEAR_FLAG(F_SF);
CLEAR_FLAG(F_PF);
}
return (u16)res;
}
/****************************************************************************
REMARKS:
Implements the SHR instruction and side effects.
****************************************************************************/
u32 shr_long(u32 d, u8 s)
{
unsigned int cnt, res, cf;
if (s < 32) {
cnt = s % 32;
if (cnt > 0) {
cf = d & (1 << (cnt - 1));
res = d >> cnt;
CONDITIONAL_SET_FLAG(cf, F_CF);
CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
} else {
res = d;
}
if (cnt == 1) {
CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
} else {
CLEAR_FLAG(F_OF);
}
} else {
res = 0;
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
SET_FLAG(F_ZF);
CLEAR_FLAG(F_SF);
CLEAR_FLAG(F_PF);
}
return res;
}
/****************************************************************************
REMARKS:
Implements the SAR instruction and side effects.
****************************************************************************/
u8 sar_byte(u8 d, u8 s)
{
unsigned int cnt, res, cf, mask, sf;
res = d;
sf = d & 0x80;
cnt = s % 8;
if (cnt > 0 && cnt < 8) {
mask = (1 << (8 - cnt)) - 1;
cf = d & (1 << (cnt - 1));
res = (d >> cnt) & mask;
CONDITIONAL_SET_FLAG(cf, F_CF);
if (sf) {
res |= ~mask;
}
CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
} else if (cnt >= 8) {
if (sf) {
res = 0xff;
SET_FLAG(F_CF);
CLEAR_FLAG(F_ZF);
SET_FLAG(F_SF);
SET_FLAG(F_PF);
} else {
res = 0;
CLEAR_FLAG(F_CF);
SET_FLAG(F_ZF);
CLEAR_FLAG(F_SF);
CLEAR_FLAG(F_PF);
}
}
return (u8)res;
}
/****************************************************************************
REMARKS:
Implements the SAR instruction and side effects.
****************************************************************************/
u16 sar_word(u16 d, u8 s)
{
unsigned int cnt, res, cf, mask, sf;
sf = d & 0x8000;
cnt = s % 16;
res = d;
if (cnt > 0 && cnt < 16) {
mask = (1 << (16 - cnt)) - 1;
cf = d & (1 << (cnt - 1));
res = (d >> cnt) & mask;
CONDITIONAL_SET_FLAG(cf, F_CF);
if (sf) {
res |= ~mask;
}
CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
} else if (cnt >= 16) {
if (sf) {
res = 0xffff;
SET_FLAG(F_CF);
CLEAR_FLAG(F_ZF);
SET_FLAG(F_SF);
SET_FLAG(F_PF);
} else {
res = 0;
CLEAR_FLAG(F_CF);
SET_FLAG(F_ZF);
CLEAR_FLAG(F_SF);
CLEAR_FLAG(F_PF);
}
}
return (u16)res;
}
/****************************************************************************
REMARKS:
Implements the SAR instruction and side effects.
****************************************************************************/
u32 sar_long(u32 d, u8 s)
{
u32 cnt, res, cf, mask, sf;
sf = d & 0x80000000;
cnt = s % 32;
res = d;
if (cnt > 0 && cnt < 32) {
mask = (1 << (32 - cnt)) - 1;
cf = d & (1 << (cnt - 1));
res = (d >> cnt) & mask;
CONDITIONAL_SET_FLAG(cf, F_CF);
if (sf) {
res |= ~mask;
}
CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
} else if (cnt >= 32) {
if (sf) {
res = 0xffffffff;
SET_FLAG(F_CF);
CLEAR_FLAG(F_ZF);
SET_FLAG(F_SF);
SET_FLAG(F_PF);
} else {
res = 0;
CLEAR_FLAG(F_CF);
SET_FLAG(F_ZF);
CLEAR_FLAG(F_SF);
CLEAR_FLAG(F_PF);
}
}
return res;
}
/****************************************************************************
REMARKS:
Implements the SHLD instruction and side effects.
****************************************************************************/
u16 shld_word (u16 d, u16 fill, u8 s)
{
unsigned int cnt, res, cf;
if (s < 16) {
cnt = s % 16;
if (cnt > 0) {
res = (d << cnt) | (fill >> (16-cnt));
cf = d & (1 << (16 - cnt));
CONDITIONAL_SET_FLAG(cf, F_CF);
CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
} else {
res = d;
}
if (cnt == 1) {
CONDITIONAL_SET_FLAG((((res & 0x8000) == 0x8000) ^
(ACCESS_FLAG(F_CF) != 0)), F_OF);
} else {
CLEAR_FLAG(F_OF);
}
} else {
res = 0;
CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
CLEAR_FLAG(F_OF);
CLEAR_FLAG(F_SF);
SET_FLAG(F_PF);
SET_FLAG(F_ZF);
}
return (u16)res;
}
/****************************************************************************
REMARKS:
Implements the SHLD instruction and side effects.
****************************************************************************/
u32 shld_long (u32 d, u32 fill, u8 s)
{
unsigned int cnt, res, cf;
if (s < 32) {
cnt = s % 32;
if (cnt > 0) {
res = (d << cnt) | (fill >> (32-cnt));
cf = d & (1 << (32 - cnt));
CONDITIONAL_SET_FLAG(cf, F_CF);
CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
} else {
res = d;
}
if (cnt == 1) {
CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
(ACCESS_FLAG(F_CF) != 0)), F_OF);
} else {
CLEAR_FLAG(F_OF);
}
} else {
res = 0;
CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
CLEAR_FLAG(F_OF);
CLEAR_FLAG(F_SF);
SET_FLAG(F_PF);
SET_FLAG(F_ZF);
}
return res;
}
/****************************************************************************
REMARKS:
Implements the SHRD instruction and side effects.
****************************************************************************/
u16 shrd_word (u16 d, u16 fill, u8 s)
{
unsigned int cnt, res, cf;
if (s < 16) {
cnt = s % 16;
if (cnt > 0) {
cf = d & (1 << (cnt - 1));
res = (d >> cnt) | (fill << (16 - cnt));
CONDITIONAL_SET_FLAG(cf, F_CF);
CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
} else {
res = d;
}
if (cnt == 1) {
CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
} else {
CLEAR_FLAG(F_OF);
}
} else {
res = 0;
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
SET_FLAG(F_ZF);
CLEAR_FLAG(F_SF);
CLEAR_FLAG(F_PF);
}
return (u16)res;
}
/****************************************************************************
REMARKS:
Implements the SHRD instruction and side effects.
****************************************************************************/
u32 shrd_long (u32 d, u32 fill, u8 s)
{
unsigned int cnt, res, cf;
if (s < 32) {
cnt = s % 32;
if (cnt > 0) {
cf = d & (1 << (cnt - 1));
res = (d >> cnt) | (fill << (32 - cnt));
CONDITIONAL_SET_FLAG(cf, F_CF);
CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
} else {
res = d;
}
if (cnt == 1) {
CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
} else {
CLEAR_FLAG(F_OF);
}
} else {
res = 0;
CLEAR_FLAG(F_CF);
CLEAR_FLAG(F_OF);
SET_FLAG(F_ZF);
CLEAR_FLAG(F_SF);
CLEAR_FLAG(F_PF);
}
return res;
}
/****************************************************************************
REMARKS:
Implements the SBB instruction and side effects.
****************************************************************************/
u8 sbb_byte(u8 d, u8 s)
{
register u32 res; /* all operands in native machine order */
register u32 bc;
if (ACCESS_FLAG(F_CF))
res = d - s - 1;
else
res = d - s;
CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
/* calculate the borrow chain. See note at top */
bc = (res & (~d | s)) | (~d & s);
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