xsc-util.s

SMSC9118网卡驱动

;/*****************************************************************************
;   
;	Copyright (c) 2004-2005 SMSC. All rights reserved.
;
;	Use of this source code is subject to the terms of the SMSC Software
;	License Agreement (SLA) under which you licensed this software product.	 
;	If you did not accept the terms of the SLA, you are not authorized to use
;	this source code. 
;
;	This code and information is provided as is without warranty of any kind,
;	either expressed or implied, including but not limited to the implied
;	warranties of merchantability and/or fitness for a particular purpose.
;	 
;	File name   : xsc-cache.s
;	Description : Xscale cache related routines
;
;	History	    :
;		03-16-05 WH			First Release
;		08-12-05 MDG		ver 1.01 
;			- add LED1 inversion, add PHY work around
;		11-07-05 WH			ver 1.02
;			- Fixed middle buffer handling bug
;			  (Driver didn't handle middle buffers correctly if it is less than 
;               4bytes size)
;			- workaround for Multicast bug
;			- Workaround for MAC RXEN bug
;		11-17-05 WH			ver 1.03
;			- 1.02 didn't have 1.01 patches
;			- 1.03 is 1.02 + 1.01
;		12-06-05 WH			ver 1.04
;			- Fixed RX doesn't work on Silicon A1 (REV_ID = 0x011x0002)
;			- Support SMSC9118x/117x/116x/115x family
;		02-27-05 WH			ver 1.05
;			- Fixing External Phy bug that doesn't work with 117x/115x
;		03-23-05 WH			ver 1.06
;			- Put the variable to avoid PHY_WORKAROUND for External PHY
;			- Change product name to 9118x->9218, 9115x->9215
;		07-26-06 WH, MDG, NL		ver 1.07
;			- Add RXE and TXE interrupt handlers
;			- Workaround Code for direct GPIO connection from 9118 family 
;			  Interrupt (Level Interrupt -> Edge Interrupt)
;			- Change GPT interrupt interval to 200mSec from 50mSec
;			- clean up un-used SH3 code
;		08-25-06  WH, MDG, NL       ver 1.08
;		    - Fixed RXE and TXE interrupt handlers bug
;			- support for direct and nondirect Interrupt
;		
;*****************************************************************************/
	AREA	|text|, CODE, READONLY, ALIGN=5

	EXPORT	CleanCacheLine
	EXPORT	DrainWriteBuffers
	EXPORT	GetCPSR
	EXPORT	GetTTB
	EXPORT	GetPID
	EXPORT	ReadCLKCFG
	EXPORT	DisableCPUInt
	EXPORT	EnableCPUInt

CleanCacheLine	FUNCTION
	mcr	p15, 0, r0, c7, c10, 1
	mcr	p15, 0, r0, c7, c6, 1

	mov	pc, lr
	ENDFUNC

DrainWriteBuffers
	mcr	p15, 0, r0, c7, c10, 4
	
	mov	pc, lr
	ENDFUNC

GetCPSR
	mrs	r0, cpsr

	mov	pc, lr
	ENDFUNC

GetTTB
	mrc	p15, 0, r0, c2, c0, 0
	mov	pc, lr	
	ENDFUNC

GetPID
	mrc	p15, 0, r0, c13, c0, 0
	mov	pc, lr
	ENDFUNC

ReadCLKCFG
	mrc	 p14, 0, r0, c6, c0, 0
	mov  pc, lr
	ENDFUNC

DisableCPUInt
	mrs  r0, cpsr
	orr  r1, r0, #0x80
	msr  cpsr, r1
	mov  pc, lr
	ENDFUNC

EnableCPUInt
	mrs  r0, cpsr
	bic  r1, r0, #0x80
	msr  cpsr, r1
	mov  pc, lr
	ENDFUNC

	END