📄 lcd.c
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#include "Include\Lcd.h"
unsigned int vf_cnt=0;
unsigned int rev_flag=0;
unsigned int dmy_pix=0;
unsigned int hor_act_pix=0;
unsigned int str_line_no=0;
unsigned int hor_act;
unsigned int ver_act;
unsigned int str_pno;
void MIU_CTRL_REG_SET(S32 FB_ADDR0, S32 FB_ADDR1, S32 FB_ADDR2)
{
S32 *Addr;
Addr = (S32*)0x8807004c; // frmae buffer0
*Addr = FB_ADDR0;
Addr = (S32*)0x88070050; // frmae buffer1
*Addr = FB_ADDR1;
Addr = (S32*)0x88070068; // frame buffer2
*Addr = FB_ADDR2;
}
void TFT_Ctrl_Setting( S32 tft_en, S32 ver_scl, S32 hor_scl, S32 clk_sel,
S32 int_enable )
{
int p_tft_int, p_tft_ctrl, *addr;
p_tft_int = int_enable << 24;
p_tft_ctrl = (tft_en << 24) + (ver_scl << 10) + (hor_scl << 8) + (clk_sel);
addr = (S32*)0x88040050;
*addr = p_tft_int;
addr = (S32*)0x88040000;
*addr = p_tft_ctrl;
}
void Data_FMT_Setting( S32 tft_fmt, S32 fb_fmt )
{
int *addr;
addr = (S32*)0x88040004;
*addr = tft_fmt;
// addr = (S32*)0x88040028;
// *addr = fb_fmt;//3 0-565 1-1555 2-yuv 3- 4y4u4v
//(S32*)0x880400a0 = 0rgb;1yuv
}
void Hor_Time_Setting( S32 hor_act1, S32 hor_fblk, S32 hor_bblk, S32 hor_syncw )
{
int *addr;
addr = (S32*)0x88040008;
*addr = hor_act1;
addr = (S32*)0x8804000c;
*addr = hor_fblk;
addr = (S32*)0x88040010;
*addr = hor_bblk;
addr = (S32*)0x88040014;
*addr = hor_syncw;
}
void Ver_Time_Setting( S32 ver_act1, S32 ver_fblk, S32 ver_bblk, S32 ver_syncw )
{
int *addr;
addr = (S32*)0x88040018;
*addr = ver_act1;
addr = (S32*)0x8804001c;
*addr = ver_fblk;
addr = (S32*)0x88040020;
*addr = ver_bblk;
addr = (S32*)0x88040024;
*addr = ver_syncw;
}
void Dis_area_Setting( S32 str_lno, S32 str_pno, S32 pix_num, S32 dumy_pix )
{
int *addr;
addr = (S32*)0x8804002c;
*addr = str_lno;
addr = (S32*)0x88040030;
*addr = str_pno;
addr = (S32*)0x88040034;
*addr = pix_num;
addr = (S32*)0x88040038;
*addr = dumy_pix;
}
void Data_seq_Setting( S32 yuv_fmt, S32 yuv_seq, S32 rgb_ol_seq, S32 rgb_el_seq )
{
int *addr, p_data_seq;
p_data_seq = (yuv_fmt<<24) + (yuv_seq << 16) + (rgb_ol_seq << 8) + (rgb_el_seq);
addr = (S32*)0x88040040;
*addr = p_data_seq;
}
void Cal_act_area( S32 type, S32 mode, S32 V_SCL, S32 H_SCL, S32 POS, S32 CK )
{
if( V_SCL == 1 )
V_SCL = -1;
if( H_SCL == 1 )
H_SCL = -1;
hor_act_pix = 160 * ( H_SCL + 2 );
ver_act = 120 * ( V_SCL + 2 );
if( type == S_RGB )
hor_act = ((hor_act_pix << 1) + hor_act_pix ) << CK;
else
hor_act = ( hor_act_pix << 2 ) << CK;
str_pno = POS;
if( mode == 2 )
dmy_pix = ( 320 * 2 ) - hor_act_pix - str_pno;
else
dmy_pix = ( 320 * (mode+1) ) - hor_act_pix - str_pno;
}
void InitTFTLcd( S32 Panel_Sel, S32 type, S32 mode, S32 V_SCL, S32 H_SCL, S32 POS )
{
int i;
//MIU_CTRL_REG_SET(FRAME_BUFFER0, FRAME_BUFFER0, FRAME_BUFFER1);
*(U32*)0x88210034 = 0;
for(i=0;i<2000;i++);
*(U32*)0x88210034 = 3;
// Enable PPU to TV Hardware Buffer Control
// *P_PTR_SETTING = *P_PTR_SETTING|PPU_P2L_HARD;
// *P_PTR_SETTING |= LCD_C2P_HARD;
// *P_PTR_SETTING |= LCD_P2L_HW4;
*P_P2L_SETTING = 0x1;//PPU_P2T_EN;
switch(Panel_Sel)
{
/* case AUO_36 : //AUO 3.6" Stripe (051)
Cal_act_area( type, mode, V_SCL, H_SCL, POS, CK_27 );
Data_FMT_Setting( S_RGB, RGB );
Hor_Time_Setting( hor_act, 196, 196, 10 );
Ver_Time_Setting( ver_act, 200, 13, 3 );
Dis_area_Setting( 0, POS, hor_act_pix, dmy_pix );
Data_seq_Setting( 0, 0, O_RGB, E_RGB );
TFT_Ctrl_Setting( TFT_EN, V_SCL, H_SCL, CK_27, INT_DEN );
break;
*/
case AUO_236 : //AUO 2.36" ( 052+CCIR601 )
case AUO_25 : //AUO 2.5" LTPS ( 051+052+CCIR656 )
Cal_act_area( type, mode, V_SCL, H_SCL, POS, CK_27 );
Data_FMT_Setting( type, RGB );
if( type == S_RGB )
{
Hor_Time_Setting( hor_act, 515, 241, 10 );
Data_seq_Setting( 0, 0, O_RGB, E_GBR );
}
else if( type == S_RGBDM )
{
Hor_Time_Setting( hor_act, 79, 241, 10 );
Data_seq_Setting( 0, 0, O_RGB, E_RGB );
}
else if( type == CCIR656_M720 || type == CCIR656_M640 )
{
Hor_Time_Setting( hor_act, 112, 324, 10 );
Data_seq_Setting( dis_YCbCr, U0Y0V0Y1, 0, 0 );
}
if( type == S_RGB || type == S_RGBDM)
Ver_Time_Setting( ver_act, 1, 21, 1 );
else if( type == CCIR656_M720 || type == CCIR656_M640 )
Ver_Time_Setting( ver_act, 2, 21, 9 );
Dis_area_Setting( 0, POS, hor_act_pix, dmy_pix );
TFT_Ctrl_Setting( TFT_EN, V_SCL, H_SCL, CK_27, INT_DEN );
if( type == S_RGB )
{
spi_mst(0x04, 0x07);
spi_mst(0x06, 0x15);
spi_mst(0x07, 0xf1);
spi_mst(0x0c, 0x26);
}
else if( type == S_RGBDM )
{
spi_mst(0x04, 0x17);
spi_mst(0x06, 0x15);
spi_mst(0x07, 0xf1);
spi_mst(0x0c, 0x26);
}
else if( type == CCIR656_M720 || type == CCIR656_M640 )
{
spi_mst(0x05, 0x00);
spi_mst(0x04, 0x57);
spi_mst(0x0c, 0x66);
}
spi_mst(0x08, 0x07);
spi_mst(0x05, 0x77);
break;
/* case AUO_236 : //AUO 2.36" ( 052+CCIR601 )
Cal_act_area( type, mode, V_SCL, H_SCL, POS, CK_27 );
Data_FMT_Setting( type, RGB );
if( type == S_RGBDM )
{
Hor_Time_Setting( hor_act, 200, 249, 10 );
Data_seq_Setting( dis_YCbCr, Y0U0Y1V0, O_RGB, E_RGB );
}
else if( type == CCIR601_M640 || type == CCIR601_M720 )
{
Hor_Time_Setting( hor_act, 200, 252, 10 );
Data_seq_Setting( dis_YCbCr, U0Y0V0Y1, O_RGB, E_GBR );
}
Ver_Time_Setting( ver_act, 10, 16, 4 );
Dis_area_Setting( 0, POS, hor_act_pix, dmy_pix );
TFT_Ctrl_Setting( TFT_EN, V_SCL, H_SCL, CK_27, INT_DEN );
break;
*/
/* case Topsun_42 : //Topsun 4.2" (Parallel + CCIR656 + CCIR 601)
Cal_act_area( type, mode, V_SCL, H_SCL, POS, CK_27 );
Data_FMT_Setting( type, RGB );
if( type == P_RGB )
{
Hor_Time_Setting( hor_act, 256, 256, 10 );
Ver_Time_Setting( ver_act, 2, 20, 4 );
Data_seq_Setting( 0, 0, 0, 0 );
}
else if( type == CCIR601_M640 || type == CCIR601_M720 )
{
Hor_Time_Setting( hor_act, 80, 356, 20 );
Ver_Time_Setting( ver_act, 2, 26, 4 );
Data_seq_Setting( dis_YCbCr, U0Y0V0Y1, 0, 0 );
}
else if( type == CCIR656_M640 || type == CCIR656_M720 )
{
Hor_Time_Setting( hor_act, 112, 324, 10 );
Ver_Time_Setting( ver_act, 2, 20, 4 );
Data_seq_Setting( dis_YCbCr, U0Y0V0Y1, 0, 0 );
}
else if( type == S_RGB )
{
Hor_Time_Setting( hor_act, 200 << 1, 201<<1, 20<<1 );
Ver_Time_Setting( ver_act, 1, 16, 4 );
Data_seq_Setting( 0, 0, O_RGB, E_RGB );
}
Dis_area_Setting( 0, POS, hor_act_pix, dmy_pix );
if( type == P_RGB )
TFT_Ctrl_Setting( TFT_EN, V_SCL, H_SCL, CK_675, INT_DEN );
else
TFT_Ctrl_Setting( TFT_EN, V_SCL, H_SCL, CK_27, INT_DEN );
break;*/
}
}
void spi_mst( S32 addr, S32 data)
{
unsigned int j;
unsigned int *addr1;
unsigned sck_select = 6;
*P_SPI_MISC = SPIOVW_OFF | SPISRT_ON;
*P_SPI_TXSTS = SPITXI_CLR | SPITXI_OFF | SPITXLEVEL1;
*P_SPI_RXSTS = SPIRXI_CLR | SPIRXI_OFF | SPIRXLEVEL3;
switch(sck_select)
{
case 0: *P_SPI_CTRL = SPI_OFF | SPILMP_OFF | SPISOFT_CLR | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL0;
*P_SPI_CTRL = SPI_ON | SPILMP_OFF | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL0;
break;
case 1: *P_SPI_CTRL = SPI_OFF | SPILMP_OFF | SPISOFT_CLR | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL1;
*P_SPI_CTRL = SPI_ON | SPILMP_OFF | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL1;
break;
case 2: *P_SPI_CTRL = SPI_OFF | SPILMP_OFF | SPISOFT_CLR | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL2;
*P_SPI_CTRL = SPI_ON | SPILMP_OFF | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL2;
break;
case 3: *P_SPI_CTRL = SPI_OFF | SPILMP_OFF | SPISOFT_CLR | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL3;
*P_SPI_CTRL = SPI_ON | SPILMP_OFF | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL3;
break;
case 4: *P_SPI_CTRL = SPI_OFF | SPILMP_OFF | SPISOFT_CLR | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL4;
*P_SPI_CTRL = SPI_ON | SPILMP_OFF | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL4;
break;
case 5: //*P_SPI_CTRL = SPI_OFF | SPILMP_OFF | SPISOFT_CLR | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL5;
*P_SPI_CTRL = SPI_ON | SPILMP_OFF | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL5;
break;
case 6: //*P_SPI_CTRL = SPI_OFF | SPILMP_OFF | SPISOFT_CLR | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL6;
*P_SPI_CTRL = SPI_ON | SPILMP_OFF | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL6;
break;
}
*P_SPI_TXDATA = addr;
*P_SPI_TXDATA = data;
j=0;
/* while(j!=0x08000000)
{
addr1=(S32*)0x88110004;
j=*addr1;
j= j&0x08000000;
}*/
*P_SPI_CTRL = SPI_OFF | SPILMP_OFF | SPIMODE_MAS | SPISCKPHA0 | SPISCKPOL0 | SPISCKSEL0;
}
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