📄 lib_at91rm3400.h
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__inline unsigned int AT91F_AIC_IsPending (
AT91PS_AIC pAic, // \arg pointer to the AIC registers
unsigned int irq_id) // \arg Interrupt Number
{
return (pAic->AIC_IPR & (0x1 << irq_id));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_AIC_Open
//* \brief Set exception vectors and AIC registers to default values
//*----------------------------------------------------------------------------
__inline void AT91F_AIC_Open(
AT91PS_AIC pAic, // \arg pointer to the AIC registers
void (*IrqHandler) (), // \arg Default IRQ vector exception
void (*FiqHandler) (), // \arg Default FIQ vector exception
void (*DefaultHandler) (), // \arg Default Handler set in ISR
void (*SpuriousHandler) (), // \arg Default Spurious Handler
unsigned int protectMode) // \arg Debug Control Register
{
int i;
// Disable all interrupts and set IVR to the default handler
for (i = 0; i < 32; ++i) {
AT91F_AIC_DisableIt(pAic, i);
AT91F_AIC_ConfigureIt(pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE, DefaultHandler);
}
// Set the IRQ exception vector
AT91F_AIC_SetExceptionVector((unsigned int *) 0x18, IrqHandler);
// Set the Fast Interrupt exception vector
AT91F_AIC_SetExceptionVector((unsigned int *) 0x1C, FiqHandler);
pAic->AIC_SPU = (unsigned int) SpuriousHandler;
pAic->AIC_DCR = protectMode;
}
/* *****************************************************************************
SOFTWARE API FOR ST
***************************************************************************** */
//*----------------------------------------------------------------------------
//* \fn AT91F_ST_SetPeriodInterval
//* \brief Set Periodic Interval Interrupt (period in ms)
//*----------------------------------------------------------------------------
__inline void AT91F_ST_SetPeriodInterval(
AT91PS_ST pSt,
unsigned int period)
{
int status;
pSt->ST_IDR = AT91C_ST_PITS; /* Interrupt disable Register */
status = pSt->ST_SR;
pSt->ST_PIMR = period << 5; /* Period Interval Mode Register == timer interval = 1ms*/
}
//*----------------------------------------------------------------------------
//* \fn AT91F_ST_EnableIt
//* \brief Enable system timer interrupt
//*----------------------------------------------------------------------------
__inline void AT91F_ST_EnableIt(
AT91PS_ST pSt,
unsigned int flag)
{
pSt->ST_IER = flag;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_ST_DisableIt
//* \brief Disable system timer interrupt
//*----------------------------------------------------------------------------
__inline void AT91F_ST_DisableIt(
AT91PS_ST pSt,
unsigned int flag)
{
pSt->ST_IDR = flag;
}
//*----------------------------------------------------------------------------
//* \fn AT91F_DBGU_CfgPMC
//* \brief Enable Peripheral clock in PMC for DBGU
//*----------------------------------------------------------------------------
__inline void AT91F_DBGU_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_SYS));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_DBGU_CfgPIO
//* \brief Configure PIO controllers to drive DBGU signals
//*----------------------------------------------------------------------------
__inline void AT91F_DBGU_CfgPIO (void)
{
// Configure PIO controllers to periph mode
AT91F_PIO_CfgPeriph(
AT91C_BASE_PIOA, // PIO controller base address
((unsigned int) AT91C_PIN52_DTXD) |
((unsigned int) AT91C_PIN51_DRXD), // Peripheral A
0); // Peripheral B
// Configure PIO controllers to periph mode
AT91F_PIO_CfgPeriph(
AT91C_BASE_PIOB, // PIO controller base address
0, // Peripheral A
((unsigned int) AT91C_PIN93_DTXD)); // Peripheral B
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PMC_CfgPMC
//* \brief Enable Peripheral clock in PMC for PMC
//*----------------------------------------------------------------------------
__inline void AT91F_PMC_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_SYS));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PMC_CfgPIO
//* \brief Configure PIO controllers to drive PMC signals
//*----------------------------------------------------------------------------
__inline void AT91F_PMC_CfgPIO (void)
{
// Configure PIO controllers to periph mode
AT91F_PIO_CfgPeriph(
AT91C_BASE_PIOA, // PIO controller base address
0, // Peripheral A
((unsigned int) AT91C_PIN18_PCK1) |
((unsigned int) AT91C_PIN22_PCK2) |
((unsigned int) AT91C_PIN23_PCK3) |
((unsigned int) AT91C_PIN20_SCK1) |
((unsigned int) AT91C_PIN21_SCK2) |
((unsigned int) AT91C_PIN17_PCK0)); // Peripheral B
// Configure PIO controllers to periph mode
AT91F_PIO_CfgPeriph(
AT91C_BASE_PIOB, // PIO controller base address
0, // Peripheral A
((unsigned int) AT91C_PIN70_PCK1) |
((unsigned int) AT91C_PIN63_PCK1) |
((unsigned int) AT91C_PIN71_PCK2) |
((unsigned int) AT91C_PIN77_PCK3) |
((unsigned int) AT91C_PIN57_PCK0)); // Peripheral B
}
//*----------------------------------------------------------------------------
//* \fn AT91F_RTC_CfgPMC
//* \brief Enable Peripheral clock in PMC for RTC
//*----------------------------------------------------------------------------
__inline void AT91F_RTC_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_SYS));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PIOB_CfgPMC
//* \brief Enable Peripheral clock in PMC for PIOB
//*----------------------------------------------------------------------------
__inline void AT91F_PIOB_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_PIOB));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_PIOA_CfgPMC
//* \brief Enable Peripheral clock in PMC for PIOA
//*----------------------------------------------------------------------------
__inline void AT91F_PIOA_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_PIOA));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SSC2_CfgPMC
//* \brief Enable Peripheral clock in PMC for SSC2
//*----------------------------------------------------------------------------
__inline void AT91F_SSC2_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_SSC2));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SSC1_CfgPMC
//* \brief Enable Peripheral clock in PMC for SSC1
//*----------------------------------------------------------------------------
__inline void AT91F_SSC1_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_SSC1));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SSC0_CfgPMC
//* \brief Enable Peripheral clock in PMC for SSC0
//*----------------------------------------------------------------------------
__inline void AT91F_SSC0_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_SSC0));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_CfgPMC
//* \brief Enable Peripheral clock in PMC for SPI
//*----------------------------------------------------------------------------
__inline void AT91F_SPI_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_SPI));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_SPI_CfgPIO
//* \brief Configure PIO controllers to drive SPI signals
//*----------------------------------------------------------------------------
__inline void AT91F_SPI_CfgPIO (void)
{
// Configure PIO controllers to periph mode
AT91F_PIO_CfgPeriph(
AT91C_BASE_PIOA, // PIO controller base address
((unsigned int) AT91C_PIN18_NPCS0) |
((unsigned int) AT91C_PIN19_NPCS1) |
((unsigned int) AT91C_PIN20_NPCS2) |
((unsigned int) AT91C_PIN21_NPCS3) |
((unsigned int) AT91C_PIN22_TWD) |
((unsigned int) AT91C_PIN17_SPCK) |
((unsigned int) AT91C_PIN16_MOSI) |
((unsigned int) AT91C_PIN15_MISO) |
((unsigned int) AT91C_PIN23_TWCK), // Peripheral A
0); // Peripheral B
// Configure PIO controllers to periph mode
AT91F_PIO_CfgPeriph(
AT91C_BASE_PIOB, // PIO controller base address
0, // Peripheral A
((unsigned int) AT91C_PIN61_NPCS1) |
((unsigned int) AT91C_PIN62_NPCS2) |
((unsigned int) AT91C_PIN69_NPCS3)); // Peripheral B
}
//*----------------------------------------------------------------------------
//* \fn AT91F_TCB0_CfgPIO
//* \brief Configure PIO controllers to drive TCB0 signals
//*----------------------------------------------------------------------------
__inline void AT91F_TCB0_CfgPIO (void)
{
// Configure PIO controllers to periph mode
AT91F_PIO_CfgPeriph(
AT91C_BASE_PIOA, // PIO controller base address
0, // Peripheral A
((unsigned int) AT91C_PIN26_TCLK0)); // Peripheral B
}
//*----------------------------------------------------------------------------
//* \fn AT91F_TWI_CfgPMC
//* \brief Enable Peripheral clock in PMC for TWI
//*----------------------------------------------------------------------------
__inline void AT91F_TWI_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_TWI));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_MCI_CfgPMC
//* \brief Enable Peripheral clock in PMC for MCI
//*----------------------------------------------------------------------------
__inline void AT91F_MCI_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_MCI));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_US3_CfgPMC
//* \brief Enable Peripheral clock in PMC for US3
//*----------------------------------------------------------------------------
__inline void AT91F_US3_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_US3));
}
//*----------------------------------------------------------------------------
//* \fn AT91F_US3_CfgPIO
//* \brief Configure PIO controllers to drive US3 signals
//*----------------------------------------------------------------------------
__inline void AT91F_US3_CfgPIO (void)
{
// Configure PIO controllers to periph mode
AT91F_PIO_CfgPeriph(
AT91C_BASE_PIOB, // PIO controller base address
((unsigned int) AT91C_PIN74_CTS3) |
((unsigned int) AT91C_PIN76_RXD3) |
((unsigned int) AT91C_PIN75_TXD3) |
((unsigned int) AT91C_PIN77_SCK3) |
((unsigned int) AT91C_PIN73_RTS3), // Peripheral A
((unsigned int) AT91C_PIN56_RTS3)); // Peripheral B
}
//*----------------------------------------------------------------------------
//* \fn AT91F_US2_CfgPMC
//* \brief Enable Peripheral clock in PMC for US2
//*----------------------------------------------------------------------------
__inline void AT91F_US2_CfgPMC (void)
{
AT91F_PMC_EnablePeriphClock(
AT91C_BASE_PMC, // PIO controller base address
((unsigned int) 1 << AT91C_ID_US2));
}
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