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📄 thunder_pod.h

📁 ARM9200开发板的ROM boot程序源码1.0
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//*----------------------------------------------------------------------------
//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*----------------------------------------------------------------------------
//* File Name           : boosterLight.h
//* Object              : Booster definition
//*
//* 1.0 19/03/01  HI    : Creation
//*----------------------------------------------------------------------------
#ifndef thunder_h
#define thunder_h

#define AT91C_ROM_BASE  ((char *) 0x000000)
#define AT91C_ROM_SIZE  (128 * 1024)

//*-------------------------------------
//* Peripheral and Interrupt Identifier
//*-------------------------------------

#define FIQ_ID          0         //* Fast Interrupt
#define MC_ID           1         //* Memory controler
#define PMC_ID          1         //* Power management controler interrupt
#define ST_ID           1         //* System Timer
#define RTC_ID          1         //* Real Time Clock interrupt
#define SW_ID           1         //* Soft Interrupt (generated by the AIC)
			                      //*
#ifndef POD	                      //*
#define DBGU_ID         3         //* Debug unit Interrupt
#define PIOA_ID         4         //* PIOA Interrupt
#define SPI_ID          2         //*
#define UDP_ID	        7         //* for test on POD+ only USB ID
#define TWI_ID	        6         //*
#else		                      //*
#define DBGU_ID         1         //* Debug unit Interrupt
#define PIOA_ID         2         //* PIOA Interrupt
#define SPI_ID          13        //*
#define UDP_ID	        11        //* for test on POD+ only USB ID
#define TWI_ID	        12        //*
#endif
#define SYS_ID	        1         //* system peripheral Interrupt
			                      //*
#define PIOB_ID         3         //* PIOB Interrupt
//* RESERVED            4
//* RESERVED            5
#define US0_ID          6         //* USART Channel 0
#define US1_ID          7         //* USART Channel 1
#define US2_ID          8         //* USART Channel 2
#define US3_ID          9         //* USART Channel 3
#define MCI0_ID         10        //* MultimediaCard ID
			                      //*
#define SSC0_ID         14        //*
#define SSC1_ID         15        //*
#define SSC2_ID         16        //*
#define TC0_ID	        17        //*
#define TC1_ID	        18        //*
#define TC2_ID	        19        //*
#define TC3_ID	        20        //*
#define TC4_ID	        21        //*
#define TC5_ID	        22        //*
//* RESERVED            23
//* RESERVED            24
#define IRQ0_ID         25        //* External interrupt 0
#define IRQ1_ID         26        //* External interrupt 1
#define IRQ2_ID         27        //* External interrupt 2
#define IRQ3_ID         28        //* External interrupt 3
#define IRQ4_ID         29        //* External interrupt 4
#define IRQ5_ID         30        //* External interrupt 5
#define IRQ6_ID         31        //* External interrupt 6

//*----------
//* ARM Core
//*----------
#include    "periph/arm7tdmi/arm.h"

//*------------------------
//* External Bus Interface
//*------------------------
#include    "periph/memc/lib_memc.h"
#define	MEMC_BASE		((AT91PS_MEMC) 0xFFFFFF00)		/* Memory Controller */

//*--------------
//* System Timer
//*--------------
#include    "periph/system_timer/lib_st.h"
#define ST_BASE         ((AT91PS_SYSTIMER) 0xFFFFFD00)

//*---------------------------------------------------
//* Advanced Power Management Controller Base Address
//*---------------------------------------------------
#include    "periph/apmc/lib_apmc.h"
#define APMC_BASE        ((AT91PS_APMC) 0xFFFFFC00)

//*-------------------------
//* Parallel I/O Controller
//*-------------------------
#include    "periph/pio/lib_pio.h"
#define PIOB_BASE       ((AT91PS_PIO ) 0xFFFFF600)
#define PIOA_BASE       ((AT91PS_PIO ) 0xFFFFF400)

#define NB_PIOA	       31        //* Number of PIO A Lines */
#define NB_PIOB        31        //* Number of PIO B Lines */
#define NB_PIOC        31        //* Number of PIO C Lines */

//*---------
//* USARTs
//*---------
#include    "periph/usart2/lib_usart2.h"
#define DBGU_BASE		((AT91PS_USART2) 0xFFFFF200)
#define USART3_BASE     ((AT91PS_USART2) 0xFFFCC000)
#define USART2_BASE     ((AT91PS_USART2) 0xFFFC8000)
#define USART1_BASE     ((AT91PS_USART2) 0xFFFC4000)
#define USART0_BASE     ((AT91PS_USART2) 0xFFFC0000)


//*-------------------------------
//* Advanced Interrupt Controller
//*-------------------------------
#include    "periph/aic/lib_aic.h"
#define AIC_BASE        ((AT91PS_AIC) 0xFFFFF000)

//*----------
//* SPI
//*----------
#include    "periph\spi\lib_spi.h"
#define SPI_BASE        ((AT91PS_SPI )0xFFFE0000)

//*---------*/
//* UDP     */
//*---------*/
#include    "periph/udp/lib_udp.h"
#define UDP_BASE 	((AT91PS_UDP) 0xFFFB0000)

//*---------
//* TWI
//*---------
#include    "periph\twi\lib_twi.h"
#define TWI_BASE	((AT91PS_TWI) 0xFFFB8000)


//*------------------
//* Pin Multiplexing
//*------------------
//*----------------------------------------------------
//*          PIO Controller A peripheral A
//*----------------------------------------------------
#ifndef POD
#define PIOMISO			8         //* SPI Master In Slave
#define PIOMOSI			9         //* SPI Master Out Slave
#define PIOSPCK			7         //* SPI clock signal
#define PIONPCS0		3         //* SPI Peripheral Chip Select 0
#define PIONPCS1		4         //* SPI Peripheral Chip Select 1
#define PIONPCS2		5         //* SPI Peripheral Chip Select 2
#define PIONPCS3		6         //* SPI Peripheral Chip Select 3
#define PIOSDA			30        //* TWI Data I/O
#define PIOSCL			31        //* TWI Clock
#define PIODRXD			23        //* USART 2 receive data
#define PIODTXD			22        //* USART 2 receive data
#else
#define PIOMISO			0         //* SPI Master In Slave
#define PIOMOSI			1         //* SPI Master Out Slave
#define PIOSPCK			2         //* SPI clock signal
#define PIONPCS0		3         //* SPI Peripheral Chip Select 0
#define PIONPCS1		4         //* SPI Peripheral Chip Select 1
#define PIONPCS2		5         //* SPI Peripheral Chip Select 2
#define PIONPCS3		6         //* SPI Peripheral Chip Select 3
#define PIOETXCK		7
#define PIOREFCK		7
#define PIOETXEN		8
#define PIOETX0 		9
#define PIOETX1 		10
#define PIOERXDV		11
#define PIOECRSDV		11
#define PIOERX0 		12
#define PIOERX1 		13
#define PIOERXER		14
#define PIOEMDC			15
#define PIOEMDIO		16
#define PIOTXD0			17        //* USART 0 transmit data
#define PIORXD0			18        //* USART 0 receive data
#define PIOSCK0			19        //* USART 0 clock signal
#define PIOCTS0			20        //* USART 0 clear to send
#define PIORTS0			21        //* USART 0 request to send
#define PIORXD2			22        //* USART 2 receive data
#define PIOTXD2			23        //* USART 2 transmit data
#define PIOSCK2			24
#define PIOSDA			25         //* TWI Data I/O
#define PIOSCL			26         //* TWI Clock
#define	PIOMCCK			27        //* MMC A clock
#define PIOMCCDA 		28        //* MMC A cmd
#define	PIOMCDA0 		29        //* MMC A data 0
#define PIODRXD			30        //* USART 2 receive data
#define PIODTXD			31        //* USART 2 receive data
#endif


//*--------------------------------------------------
//*		   PIO Controller A  peripheral B
//*--------------------------------------------------
#define PIOPCK3			0	| PERIPH_B        //*
#define PIOPCK0			1	| PERIPH_B        //*
#define	PIOIRQ4 		2	| PERIPH_B        //*
#define	PIOIRQ5 		3	| PERIPH_B		  //*
#define PIOPCK1			4	| PERIPH_B        //*
#define PIOTXD3			5	| PERIPH_B        //*
#define PIORXD3			6	| PERIPH_B	      //*
#define PIOPCK2			7	| PERIPH_B        //*
#define PIOMCCDB		8	| PERIPH_B        //* MMC B cmd
#define PIOMCDB0		9	| PERIPH_B        //* MMC B data 0
#define PIOMCDB1		10	| PERIPH_B        //* MMC B data 1
#define PIOMCDB2		11	| PERIPH_B        //* MMC B data 2
#define PIOMCDB3		12	| PERIPH_B        //* MMC B data 3
#define PIOTCLK0		13	| PERIPH_B        //* Timer 0 Clock signal
#define PIOTCLK1		14	| PERIPH_B        //* Timer 1 Clock signal
#define PIOTCLK2		15	| PERIPH_B        //* Timer 2 Clock signal
#define PIOIRQ6			16	| PERIPH_B        //*
#define PIOTIOA0		17	| PERIPH_B        //* Timer 3 Signal A
#define PIOTIOB0		18	| PERIPH_B        //* Timer 3 Signal B
#define PIOTIOA1		19	| PERIPH_B        //* Timer 3 Signal A
#define PIOTIOB1		20	| PERIPH_B        //* Timer 3 Signal B
#define PIOTIOA2		21	| PERIPH_B        //* Timer 3 Signal A
#define PIOTIOB2		22	| PERIPH_B        //* Timer 3 Signal B
#define	PIOIRQ3			23	| PERIPH_B        //*
#define PIOPCK1B		24	| PERIPH_B        //*
#define	PIOIRQ2 		25	| PERIPH_B	      //*
#define PIOIRQ1			26	| PERIPH_B        //*
#define PIOTCLK3		27	| PERIPH_B
#define PIOTCLK4		28	| PERIPH_B
#define PIOTCLK5		29	| PERIPH_B
#define PIORTS2			30	| PERIPH_B        //* USART 2 request to send
#define PIOCTS2			31	| PERIPH_B        //* USART 2 clear to send


//*-------------------------------------------------------
//*        PIO Controlle(u_int)r B peripheral A
//*-------------------------------------------------------
#define PIOTF0			0			//*
#define PIOTK0			1			//*
#define PIOTD0			2			//*
#define PIORD0			3			//*
#define PIORK0			4			//*
#define PIORF0			5			//*
#define PIOTF1			6			//*
#define PIOTK1			7			//*
#define PIOTD1			8			//*
#define PIORD1			9			//*
#define PIORK1			10			//*
#define PIORF1			11			//*
#define PIOTF2			12			//*
#define PIOTK2			13			//*
#define PIOTD2			14			//*
#define PIORD2			15			//*
#define PIORK2			16			//*
#define PIORF2			17			//*
#define PIORI1			18
#define PIODTR1			19
#define PIOTXD1			20
#define PIORXD1			21
#define PIOSCK1  		22	      //*
#define PIODCD1			23        //* USART 1 data carrier detect
#define PIOCTS1			24        //* USART 1 clear to send
#define PIODSR1			25        //* USART 1 data send ready
#define PIORTS1			26        //* USART 1 request to send
#define PIOBPCK0		27        //*
#define PIOFIQ			28
#define PIOIRQ0			29
//* UNUSED				30
//* UNUSED				31


//*-------------------------------------------------------
//*		   PIO Controller B peripheral B
//*-------------------------------------------------------
#define PIORTS3		    0	| PERIPH_B        //*
#define PIOCTS3  		1	| PERIPH_B
#define PIOSCK3	    	2	| PERIPH_B
#define	PIOMCDA1 		3	| PERIPH_B         //* MMC A data 1
#define	PIOMCDA2 		4	| PERIPH_B         //* MMC A data 2
#define	PIOMCDA3 		5	| PERIPH_B         //* MMC A data 3
#define PIOTIOA3		6	| PERIPH_B        //*
#define PIOTIOB3		7	| PERIPH_B        //*
#define PIOTIOA4		8	| PERIPH_B        //*
#define PIOTIOB4		9	| PERIPH_B        //*
#define PIOTIOA5		10	| PERIPH_B        //*
#define PIOTIOB5		11	| PERIPH_B        //*
#define PIOETX2			12  | PERIPH_B
#define PIOETX3			13  | PERIPH_B
#define PIOETXER		14  | PERIPH_B
#define PIOERX2			15  | PERIPH_B
#define PIOERX3			16  | PERIPH_B
//#define PIOERXDV		17  | PERIPH_B
#define PIOECOL			18  | PERIPH_B
#define PIORXCK			19  | PERIPH_B


#define PIOUNUSED		32

#endif	//* thunder_h

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