memc.inc

ARM9200开发板的ROM boot程序源码1.0

;------------------------------------------------------------------------------
;-         ATMEL Microcontroller Software Support  -  ROUSSET  -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;------------------------------------------------------------------------------
;- File Name            : memc.inc
;- Object               : Assembler Memory Controller Definition File.
;-
;- 1.0 24/03/01 ED      : Creation
;------------------------------------------------------------------------------

            INCLUDE     periph/ebic/ebic.inc

;-------------------------------------------------------
; Memory Controller User Interface Structure Definition
;-------------------------------------------------------

                ^       0
MEMC_RCR	#	4	;- Remap Control Register
MEMC_ASR	#	4	;- Abort Status Register
MEMC_AASR	#	4	;- Abort Address Status Register
		#	4	;- Reserved
MEMC_PUIA	#	4*16	;- Protection Unit Internal Areas Definition
MEMC_PUP	#	4	;- Peripherals Protection Unit Definition
MEMC_PUER	#	4	;- Protection Unit Enable Register

MEMC_EBIC_CSA	#	4	;- Chip Select Assignment
MEMC_EBIC_CR	#	4	;- Configuration Register
		#	4*2	;- Reserved
MEMC_SMC_MR	#	4*8	;- Chip Select Registers
		#	4*8	;- Reserved
MEMC_SDRC_MR	#	4	;- Mode Register
MEMC_SDRC_TR	#	4	;- Refresh Timer Register
MEMC_SDRC_CR	#	4	;- Configuration Register
MEMC_SDRC_SRR	#	4	;- Self Refresh Command Register
MEMC_SDRC_LPR	#	4	;- Low Power Command Register
MEMC_SDRC_IER	#	4	;- Interrupt Enable Register
MEMC_SDRC_IDR	#	4	;- Interrupt Disable Register
MEMC_SDRC_IMR	#	4	;- Interrupt Mask Register
MEMC_SDRC_ISR	#	4	;- Interrupt Status Register
		#	4*7	;- Reserved
MEMC_BFC_MR	#	4	;- Mode Register

;-----------------------------------------------------------------
;- MEMC_PUIA : Protection Unit Internal Area Registers Definition
;- MEMC_PUP  : Peripherals Protection Unit Register Definition   
;-----------------------------------------------------------------

MEMC_PROT_EN_MASK	EQU	0x3		;- Area Protection enable Mask

MEMC_AREA_NOACC		EQU	0x0		;- No Access to the Area in any Mode
MEMC_AREA_RWSUP		EQU	0x1		;- R/W Access in Supervisor Mode
						;- No Access in User Mode
MEMC_AREA_RWSUP_ROUS	EQU	0x2		;- R/W Access in Supervisor Mode
						;- Read-only Access in User Mode
MEMC_AREA_RWALL		EQU	0x3		;- R/W Access to the Area in any Mode

MEMC_AREA_4KB		EQU	0x0		;- Area Size = 4KB
MEMC_AREA_8KB		EQU	0x10		;- Area Size = 8KB
MEMC_AREA_16KB		EQU	0x20		;- Area Size = 16KB
MEMC_AREA_32KB		EQU	0x30		;- Area Size = 32KB
MEMC_AREA_64KB		EQU	0x40		;- Area Size = 64KB
MEMC_AREA_128KB		EQU	0x50		;- Area Size = 128KB
MEMC_AREA_256KB		EQU	0x60		;- Area Size = 256KB
MEMC_AREA_512KB		EQU	0x70		;- Area Size = 512KB
MEMC_AREA_1MB		EQU	0x80		;- Area Size = 1MB
MEMC_AREA_2MB		EQU	0x90		;- Area Size = 2MB
MEMC_AREA_4MB		EQU	0xA0		;- Area Size = 4MB

MEMC_AREA_BASE_MASK	EQU	0x3FF000	;- Area Base Address Mask

;----------------------------------------------
;- MEMC_PUER : Protection Unit Enable Register
;----------------------------------------------

MEMC_PU_DIS		EQU	0x0		;- MEMC Protection Unit Disabled
MEMC_PU_EN		EQU	0x1		;- MEMC Protection Unit Enabled

;------------------------------------
;- MEMC_RCR : Remap Control Register
;------------------------------------

MEMC_RCB		EQU	0x1		;- Remap Command Bit

;-----------------------------------
;- MEMC_ASR : Abort Status Register
;-----------------------------------

MEMC_UNDADD_MASK	EQU	0x1		;- Undefined Address Abort Status
MEMC_MISADD_MASK	EQU	0x2		;- Misaligned Address Abort Status

MEMC_ABTSZ_MASK		EQU	0x300		;- Abort Size Status Field

MEMC_BYTE_ACC_ABT	EQU	0x0		;- Byte Access Aborted
MEMC_HALFW_ACC_ABT	EQU	0x100		;- Half-Word Access Aborted
MEMC_WORD_ACC_ABT	EQU	0x200		;- Word Access Aborted

MEMC_ABTTYP_MASK	EQU	0xC00		;- Abort Type Status Field

MEMC_DR_ACC_ABT		EQU	0x0		;- Data Read Access Aborted
MEMC_DW_ACC_ABT		EQU	0x400		;- Data Write Access Aborted
MEMC_CF_ACC_ABT		EQU	0x800		;- Code Fetch Access Aborted

MEMC_MCPU_SRC_MASK	EQU	0x4000		;- Memory Controller Protection Unit Abort Source

MEMC_CACHE_SRC_MASK	EQU	0x8000		;- Cache Memory Protection Unit Abort Source

;--------------------------------------------
;- MEMC_AASR : Abort Address Status Register
;--------------------------------------------

MEMC_ABTADD_MASK	EQU	0xFFFFFFFF	;- Address of the Aborted Access


                END