memc.h

ARM9200开发板的ROM boot程序源码1.0

//*----------------------------------------------------------------------------
//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*----------------------------------------------------------------------------
//* File Name           : memc.h
//* Object              : Memory Controller Header File
//*
//* 1.0 24/03/01 ED     : Creation
//*----------------------------------------------------------------------------

#ifndef memc_h
#define memc_h

#include    "periph/stdc/std_c.h"
#include    "periph/ebic/ebic.h"

/*-------------------------------------------------------*/
/* Memory Controller User Interface Structure Definition */
/*-------------------------------------------------------*/

typedef struct _AT91S_MEMC
{
    at91_reg		MEMC_RCR ;			/* Remap Control Register */
    at91_reg		MEMC_ASR ;			/* Abort Status Register */
    at91_reg		MEMC_AASR ;			/* Abort Address Status Register */
    at91_reg		MEMC_MPR ;			/* Master priority register */
    at91_reg		MEMC_PUIA[16] ;		/* Protection Unit Internal Areas Definition */
    at91_reg		MEMC_PUP ;			/* Peripherals Protection Unit Definition */
    at91_reg		MEMC_PUER ;			/* Protection Unit Enable Register */
    at91_reg		Reserved1 ;			/* Reserved */
    at91_reg		Reserved2 ;			/* Reserved */    
    AT91S_EBIC 		MEMC_EBIC ;			/* EBIC Configuration Registers */
} AT91S_MEMC, *AT91PS_MEMC ;

/*----------------------------------------------------------------*/
/* MEMC_PUIA : Protection Unit Internal Area Registers Definition */
/* MEMC_PUP  : Peripherals Protection Unit Register Definition    */
/*----------------------------------------------------------------*/

#define	MEMC_PROT_EN_MASK		0x3			/* Area Protection enable Mask */

#define	MEMC_AREA_NOACC			0x0			/* No Access to the Area in any Mode */
#define	MEMC_AREA_RWSUP			0x1			/* R/W Access in Supervisor Mode
											   No Access in User Mode */
#define	MEMC_AREA_RWSUP_ROUS	0x2			/* R/W Access in Supervisor Mode
											   Read-only Access in User Mode */
#define	MEMC_AREA_RWALL			0x3			/* R/W Access to the Area in any Mode */

#define	MEMC_AREA_4KB			0x0			/* Area Size = 4KB */
#define	MEMC_AREA_8KB			0x10		/* Area Size = 8KB */
#define	MEMC_AREA_16KB			0x20		/* Area Size = 16KB */
#define	MEMC_AREA_32KB			0x30		/* Area Size = 32KB */
#define	MEMC_AREA_64KB			0x40		/* Area Size = 64KB */
#define	MEMC_AREA_128KB			0x50		/* Area Size = 128KB */
#define	MEMC_AREA_256KB			0x60		/* Area Size = 256KB */
#define	MEMC_AREA_512KB			0x70		/* Area Size = 512KB */
#define	MEMC_AREA_1MB			0x80		/* Area Size = 1MB */
#define	MEMC_AREA_2MB			0x90		/* Area Size = 2MB */
#define	MEMC_AREA_4MB			0xA0		/* Area Size = 4MB */

#define	MEMC_AREA_BASE_MASK		0x3FF000	/* Area Base Address Mask */

/*---------------------------------------------*/
/* MEMC_PUER : Protection Unit Enable Register */
/*---------------------------------------------*/

#define	MEMC_PU_DIS				0x0			/* MEMC Protection Unit Disabled */
#define	MEMC_PU_EN				0x1			/* EBIC PProtection Unit Enabled */

/*-----------------------------------*/
/* MEMC_RCR : Remap Control Register */
/*-----------------------------------*/

#define MEMC_RCB				0x1			/* Remap Command Bit */

/*----------------------------------*/
/* MEMC_ASR : Abort Status Register */
/*----------------------------------*/

#define	MEMC_UNDADD_MASK		0x1			/* Undefined Address Abort Status */
#define	MEMC_MISADD_MASK		0x2			/* Misaligned Address Abort Status */

#define	MEMC_ABTSZ_MASK			0x300		/* Abort Size Status Field */

#define	MEMC_BYTE_ACC_ABT		0x0			/* Byte Access Aborted */
#define	MEMC_HALFW_ACC_ABT		0x100		/* Half-Word Access Aborted */
#define	MEMC_WORD_ACC_ABT		0x200		/* Word Access Aborted */

#define	MEMC_ABTTYP_MASK		0xC00		/* Abort Type Status Field */

#define	MEMC_DR_ACC_ABT			0x0			/* Data Read Access Aborted */
#define	MEMC_DW_ACC_ABT			0x400		/* Data Write Access Aborted */
#define	MEMC_CF_ACC_ABT			0x800		/* Code Fetch Access Aborted */

#define	MEMC_MCPU_SRC_MASK		0x4000		/* Memory Controller Protection Unit Abort Source */

#define	MEMC_CACHE_SRC_MASK		0x8000		/* Cache Memory Protection Unit Abort Source */

/*-------------------------------------------*/
/* MEMC_AASR : Abort Address Status Register */
/*-------------------------------------------*/

#define	MEMC_ABTADD_MASK		0xFFFFFFFF	/* Address of the Aborted Access */

#endif /* memc_h */