udp.inc

ARM9200开发板的ROM boot程序源码1.0

;------------------------------------------------------------------------------
;-         ATMEL Microcontroller Software Support  -  ROUSSET  -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;------------------------------------------------------------------------------
;- File Name            : udp.inc
;- Object               : Assembler USB device Definition File.
;-
;- 1.0 17/09/01 ODi     : Creation
;------------------------------------------------------------------------------
;----------------------------------------
; UDP User Interface Structure Definition
;----------------------------------------
               ^        0
UDP_PACKCNTR   #        4    ;-    Register offset 0x00
UDP_PACKRESP   #        4    ;-    Register offset 0x04
UDP_FRM_NUM    #        4    ;-    Register offset 0x08
UDP_GLB_STATE  #        4    ;-    Register offset 0x0C

;- UDB interrupt registers
UDP_UIER       #        4    ;-    Register offset 0x10
UDP_UIDR       #        4    ;-    Register offset 0x14
UDP_UIMR       #        4    ;-    Register offset 0x18
               #        4    ;-    Reserved1
UDP_UISR       #        4    ;-    Register offset 0x20
               #        4    ;-    Reserved2
UDP_UICR       #        4    ;-    Register offset 0x28
               #        4    ;-    Reserved3

;- USB function address register
UDP_FADDR      #        4    ;-    Register offset 0x30
               #        4    ;-    Reserved 4
               #        4
               #        4

;- USB Endpoint registers
UDP_FDR0       #        4    ;-    FIFO DPR access for endpoint 0
UDP_FDR1       #        4    ;-    FIFO DPR access for endpoint 1
UDP_FDR2       #        4    ;-    FIFO DPR access for endpoint 2
UDP_FDR3       #        4    ;-    FIFO DPR access for endpoint 3
UDP_FDR4       #        4    ;-    FIFO DPR access for endpoint 4
UDP_FDR5       #        4    ;-    FIFO DPR access for endpoint 5
UDP_FDR6       #        4    ;-    FIFO DPR access for endpoint 6
UDP_FDR7       #        4    ;-    FIFO DPR access for endpoint 7

UDP_EP0        #        4    ;-    FIFO endpoint control and status register for endpoint 0
UDP_EP1        #        4    ;-    FIFO endpoint control and status register for endpoint 1
UDP_EP2        #        4    ;-    FIFO endpoint control and status register for endpoint 2
UDP_EP3        #        4    ;-    FIFO endpoint control and status register for endpoint 3
UDP_EP4        #        4    ;-    FIFO endpoint control and status register for endpoint 4
UDP_EP5        #        4    ;-    FIFO endpoint control and status register for endpoint 5
UDP_EP6        #        4    ;-    FIFO endpoint control and status register for endpoint 6
UDP_EP7        #        4    ;-    FIFO endpoint control and status register for endpoint 7

UDP_RESET_EP   #        4    ;-    Register offset 0x80
UDP_DPRH       #        4    ;-    Register offset 0x84 
UDP_DPRL       #        4    ;-    Register offset 0x88 
; ...

;---------------------------------------
;- UDP_GLB_STATE : Global State Register
;---------------------------------------
UDP_RSMINPR    EQU      0x0008  ;-  R Set by the HW when resume is sent in USB bus during Remote Wake-up feature
UDP_RMWUP      EQU      0x0004  ;-  R/W Remote Wake-up enable
UDP_CONFG      EQU      0x0002  ;-  R/W Configured
UDP_FADDEN     EQU      0x0001  ;-  R/W Function Address Enable

;-------------------------------------
;- UDP_FEN : Function Address Register
;-------------------------------------
UDP_FEN        EQU      0x0080  ;-  Function enable

;-------------------------------------
;- USB_UIER :
;- USB_UIDR :
;- USB_UIMR :
;- USB_UISR :
;- USB_UICR :
;-------------------------------------
;- Protocol bits definition
UDP_ENDBUSRES  EQU     0x1000  ;- R/W USB end of reset detected
UDP_SOFINT     EQU     0x0800  ;- R/W Start Of Frame interrupt
UDP_EXTRSM     EQU     0x0400  ;- R/W External Resume signaling interrupt
UDP_RCVDRSM    EQU     0x0200  ;- R/W external BUS signaling interrupt
UDP_RCVSUSP    EQU     0x0100  ;- R/W Suspend signaling interrupt

;- Endpoint bits definition
UDP_EP7INT     EQU     0x0080
UDP_EP6INT     EQU     0x0040
UDP_EP5INT     EQU     0x0020
UDP_EP4INT     EQU     0x0010
UDP_EP3INT     EQU     0x0008
UDP_EP2INT     EQU     0x0004
UDP_EP1INT     EQU     0x0002
UDP_EP0INT     EQU     0x0001

;----------------------------------------------
;- UDP_EP : endpoint Register. It cats:
;-     UDP byte count register
;-     UDP FIFO data register
;-     UDP Function endpoint control register
;----------------------------------------------

;- Endpoint control register
UDP_EPDS           EQU    0x1000       ;- Endpoint enable 1/disable 0
UDP_DTGLE          EQU    0x0800       ;- Data toggle
UDP_EPIN           EQU    0x0400       ;- Endpoint direction

UDP_CONTROL        EQU    0x0000       ;- Define EPTYPE bits: endpoint type
UDP_ISOCHRONOUS    EQU    0x0100       ;- Define EPTYPE bits: endpoint type
UDP_BULK           EQU    0x0200       ;- Define EPTYPE bits: endpoint type
UDP_INTERRUPT      EQU    0x0300       ;- Define EPTYPE bits: endpoint type

;- endpoint Control and Status Register
UDP_DIR            EQU    0x0080       ;- Control direction
UDP_RCV_DATA_BANK1 EQU    0x0040       ;- last data packet in FIFO0
UDP_FORCESTALL     EQU    0x0020       ;- Force stall
UDP_TXPKREADY      EQU    0x0010       ;- Tx packet ready
UDP_STALLSENT      EQU    0x0008       ;- Stall sent
UDP_RXSETUP        EQU    0x0004       ;- Valid setup from the host
UDP_RCV_DATA_BANK0 EQU    0x0002       ;- OUT token decoded
UDP_TXCOMPLETE     EQU    0x0001       ;- Control endpoint has received an ACK