📄 lib_udp.sav.txt
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;------------------------------------------------------------------------------
;- ATMEL Microcontroller Software Support - ROUSSET -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;------------------------------------------------------------------------------
;- File Name : lib_udp.arm
;- Object : Assembler USB device FIQ handler.
;-
;- 1.0 17/09/01 ODi : Creation
;------------------------------------------------------------------------------
AREA AT91Lib_fiq, CODE, READONLY, INTERWORK
INCLUDE ../../periph/udp/udp.inc
INCLUDE ../../periph/udp/lib_udp.mac
INCLUDE ../../periph/aic/aic.inc
INCLUDE ../../parts/booster/booster.inc
; ============================================
;- DMA FIQ Handler
;- ---------------
BeginFiqHandler:
;- Look for the origin of the IRQ...
; ldr r8, =UDP_BASE
ldr r9, [r8, #UDP_UISR]
mov r10, sp
ands r11, r9, #UDP_EP0INT
ldmneia r10, {r11, r12, pc}
; add r10, r10, #12
ands r11, r9, #UDP_EP1INT
ldmneia r10, {r11, r12, pc}
; add r10, r10, #12
ands r11, r9, #UDP_EP2INT
ldmneia r10, {r11, r12, pc}
; add r10, r10, #12
;- By default notify the ISR
b dma_notify_isr
;- ---------------------------------------------------------
;- FIQ ending functions invoked by endpoints handlers
;- There are 2 # functions dma_achieve_fiq and dma_notify_isr
;- ---- Exit the FIQ checking there is not another FIQ pending
dma_achieve_fiq:
;- Exit the FIQ, should the interrupt should be pending in the AIC
sub pc, lr, #4
;- ---- Exit the FIQ handler for the following reasons:
;- . the buffer descriptor counter == 0
;- . there is an un handled exception
dma_notify_isr:
;- Disable the fast forcing for the UDP
ldr r9, =AIC_BASE
mov r10, #AIC_UDP
str r10, [r9, #AIC_FFDR]
;- Force an IRQ corresponding to the UDB ISR
mov r10, #AIC_UDP_ISR
mov r10, [r9, #AIC_ISCR]
;- Exit the FIQ, should the interrupt should be pending in the AIC
sub pc, lr, #4
;- ---------------------------------------------------------
;- Endpoint handlers referenced by the endpoint DMA descriptor
fiq_udp_ep0:
ldr r9, [r8, #UDP_EP0]
; MAC_DMA_RX fiq_udp_ep0_rcv
ldr r9, [r8, #UDP_EP0]
; MAC_DMA_TX fiq_udp_ep0_tx
b dma_notify_isr
fiq_udp_ep1:
ldr r9, [r8, #UDP_EP1]
; MAC_DMA_RX fiq_udp_ep1_rcv
b dma_notify_isr
fiq_udp_ep2:
ldr r9, [r8, #UDP_EP2]
; MAC_DMA_RX fiq_udp_ep2_rcv
b dma_notify_isr
;- ---------------------------------------------------------
dma_rx:
;- Get how many bytes have to be copied and compare with the buffer length
;- (udpCsr becomes a scratch register)
mov r9, r9, LSR 16
cmp r9, r12
movge r9, r12
;- Update dma descriptor counter
;- (bufferLength becomes a scratch register)
add r12, r12, r9
str r12, [r10, #0]
;- Update dma pointer value
add r12, r11, r9
str $r11, [r10, #1]
;- Pop values from the FIFO and copy them in the RAM
; MAC_DMA dma_rx, MAX_DMA_POP, r11, r8, r9, r10, r12
;- Beware r9 and r10 are modified
ret
dma_tx:
;- Get how many bytes have to be copied and compare with the buffer length
;- (udpCsr becomes a scratch register)
mov r9, r9, LSR 16
cmp r9, r12
movge r9, r12
;- Update dma descriptor counter
;- (bufferLength becomes a scratch register)
sub r12, r12, r9
str r12, [r10, #0]
;- Update dma pointer value
add r12, r11, r9
str r11, [r10, #1]
;- Pop values from the FIFO and copy them in the RAM
; MAC_DMA dma_tx, MAX_DMA_PUSH, r11, r8, r9, r10, r12
ret
END
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