udp.h

ARM9200开发板的ROM boot程序源码1.0

//*----------------------------------------------------------------------------
//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*-----------------------------------------------------------------------------
//* File Name           : udp.h
//* Object              : UDP Header File.
//*
//* 1.0 06/12/00 ODI    : Creation
//*----------------------------------------------------------------------------

#ifndef udp_h
#define udp_h

#include    "periph/stdc/std_c.h"

#define UDP_NB_ENDPOINT 8
/*-------------------------------------------*/
/* USB User Interface Structure Definition   */
/*-------------------------------------------*/
typedef struct _AT91S_UDP
{
	at91_reg   UDP_FRM_NUM;    /* Register offset 0x00 */
	at91_reg   UDP_GLB_STATE;  /* Register offset 0x04 */
	at91_reg   UDP_FADDR;      /* Register offset 0x08 */
	at91_reg   Reserved1;

	/* USB interrupt registers */
	at91_reg   UDP_UIER;       /* Register offset 0x10 */
	at91_reg   UDP_UIDR;       /* Register offset 0x14 */
	at91_reg   UDP_UIMR;       /* Register offset 0x18 */
	at91_reg   UDP_UISR;       /* Register offset 0x1C */
	at91_reg   UDP_UICR;       /* Register offset 0x20 */
	at91_reg   Reserved2;
	/* USB Reset endpoints register */
	at91_reg   UDP_RESET_EP;   /* Register offset 0x28 */
	at91_reg   Reserved3;
	/* USB control and status register endpoints */
	at91_reg   UDP_CSR[UDP_NB_ENDPOINT];     /* Register offset 0x30 */
	/* USB Fifo access endpoints */
	at91_reg   UDP_FDR[UDP_NB_ENDPOINT];     /* Register offset 0x50 */
} AT91S_UDP, *AT91PS_UDP;

/*---------------------------------------*/
/* UDP_GLB_STATE : Global State Register */
/*---------------------------------------*/
#define UDP_RSMINPR    (1 << 3)      /* R Set by the HW when resume is sent in USB bus during Remote Wake-up feature */
#define UDP_RMWUP      (1 << 2)      /* R/W Remote Wake-up enable */
#define UDP_CONFG      (1 << 1)      /* R/W Configured */
#define UDP_FADDEN     (1 << 0)      /* R/W Function Address Enable */

/*---------------------------------------*/
/* UDP_FADDR : Function Address Register */
/*---------------------------------------*/
#define UDP_FEN        (1 << 8)      /* Function enable */

/*----------------------------------------------------*/
/* UDP_UIER :                                         */
/* UDP_UIDR :                                         */
/* UDP_UIMR :                                         */
/* UDP_UISR :                                         */
/* UDP_UICR :                                         */
/*----------------------------------------------------*/
/* Protocol bits definition */
#define UDP_ENDBUSRES  (1 << (4+8))  /* R/W USB end of reset detected */
#define UDP_SOFINT     (1 << (3+8))  /* R/W Start Of Frame interrupt */
#define UDP_EXTRSM     (1 << (2+8))  /* R/W External Resume signaling interrupt */
#define UDP_RCVDRSM    (1 << (1+8))  /* R/W external BUS signaling interrupt */
#define UDP_RCVSUSP    (1 << (0+8))  /* R/W Suspend signaling interrupt */

/* Endpoint bits definition */
#define UDP_EP7INT     (1 << 7)
#define UDP_EP6INT     (1 << 6)
#define UDP_EP5INT     (1 << 5)
#define UDP_EP4INT     (1 << 4)
#define UDP_EP3INT     (1 << 3)
#define UDP_EP2INT     (1 << 2)
#define UDP_EP1INT     (1 << 1)
#define UDP_EP0INT     (1 << 0)

/*------------------------------------------------*/
/* UDP_EP : endpoint Register. It cats:           */
/*     - USB byte count register                  */
/*     - USB FIFO data register                   */
/*     - USB Function endpoint control register   */
/*------------------------------------------------*/

#define UDP_BYTE_COUNT(a)  (a >> 16)

/* Endpoint control register */
#define UDP_EPDS            (1 << 15)    /* Endpoint enable 1/disable 0 */
#define UDP_DTGLE           (1 << 11)    /* Data toggle */

#define UDP_CONTROL         (0x0 << 8)   /* Define EPTYPE bits: endpoint type */
#define UDP_ISOCHRONOUS_OUT (0x1 << 8)   /* Define EPTYPE bits: endpoint type */
#define UDP_ISOCHRONOUS_IN  (0x5 << 8)   /* Define EPTYPE bits: endpoint type */
#define UDP_BULK_OUT        (0x2 << 8)   /* Define EPTYPE bits: endpoint type */
#define UDP_BULK_IN         (0x6 << 8)   /* Define EPTYPE bits: endpoint type */
#define UDP_INTERRUPT_OUT   (0x3 << 8)   /* Define EPTYPE bits: endpoint type */
#define UDP_INTERRUPT_IN    (0x7 << 8)   /* Define EPTYPE bits: endpoint type */

/* endpoint Control and Status Register */
#define UDP_DIR            (1 << 7)  /* Control direction */
#define UDP_RCV_DATA_BANK1 (1 << 6)  /* last data packet in FIFO0 */
#define UDP_FORCESTALL     (1 << 5)  /* Force stall */
#define UDP_TXPKREADY      (1 << 4)  /* Tx packet ready */
#define UDP_STALLSENT      (1 << 3)  /* Stall sent */
#define UDP_RXSETUP        (1 << 2)  /* Valid setup from the host */
#define UDP_RCV_DATA_BANK0 (1 << 1)  /* OUT token decoded */
#define UDP_TXCOMPLETE     (1 << 0)  /* Control endpoint has received an ACK */

#endif /* udp_h */