all_01.fit.qmsg

eda 开发数字钟的设计具体编程代码和开发流程与设计图

{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:05 " "Info: Fitter placement operations ending: elapsed time is 00:00:05" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "8.292 ns register register " "Info: Estimated most critical path is register to register delay of 8.292 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns hhmmss:inst8\|hh\[1\] 1 REG LAB_X15_Y9 15 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X15_Y9; Fanout = 15; REG Node = 'hhmmss:inst8\|hh\[1\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { hhmmss:inst8|hh[1] } "NODE_NAME" } } { "hhmmss.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/hhmmss.vhd" 82 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.706 ns) + CELL(0.575 ns) 1.281 ns HEX2DEC:inst4\|Add4~182COUT1_208 2 COMB LAB_X16_Y9 2 " "Info: 2: + IC(0.706 ns) + CELL(0.575 ns) = 1.281 ns; Loc. = LAB_X16_Y9; Fanout = 2; COMB Node = 'HEX2DEC:inst4\|Add4~182COUT1_208'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.281 ns" { hhmmss:inst8|hh[1] HEX2DEC:inst4|Add4~182COUT1_208 } "NODE_NAME" } } { "HEX2DEC.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/HEX2DEC.vhd" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.361 ns HEX2DEC:inst4\|Add4~186COUT1_210 3 COMB LAB_X16_Y9 2 " "Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 1.361 ns; Loc. = LAB_X16_Y9; Fanout = 2; COMB Node = 'HEX2DEC:inst4\|Add4~186COUT1_210'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.080 ns" { HEX2DEC:inst4|Add4~182COUT1_208 HEX2DEC:inst4|Add4~186COUT1_210 } "NODE_NAME" } } { "HEX2DEC.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/HEX2DEC.vhd" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.441 ns HEX2DEC:inst4\|Add4~190COUT1_212 4 COMB LAB_X16_Y9 2 " "Info: 4: + IC(0.000 ns) + CELL(0.080 ns) = 1.441 ns; Loc. = LAB_X16_Y9; Fanout = 2; COMB Node = 'HEX2DEC:inst4\|Add4~190COUT1_212'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.080 ns" { HEX2DEC:inst4|Add4~186COUT1_210 HEX2DEC:inst4|Add4~190COUT1_212 } "NODE_NAME" } } { "HEX2DEC.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/HEX2DEC.vhd" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.258 ns) 1.699 ns HEX2DEC:inst4\|Add4~180 5 COMB LAB_X16_Y9 3 " "Info: 5: + IC(0.000 ns) + CELL(0.258 ns) = 1.699 ns; Loc. = LAB_X16_Y9; Fanout = 3; COMB Node = 'HEX2DEC:inst4\|Add4~180'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.258 ns" { HEX2DEC:inst4|Add4~190COUT1_212 HEX2DEC:inst4|Add4~180 } "NODE_NAME" } } { "HEX2DEC.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/HEX2DEC.vhd" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.679 ns) 2.378 ns HEX2DEC:inst4\|Add4~187 6 COMB LAB_X16_Y9 1 " "Info: 6: + IC(0.000 ns) + CELL(0.679 ns) = 2.378 ns; Loc. = LAB_X16_Y9; Fanout = 1; COMB Node = 'HEX2DEC:inst4\|Add4~187'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.679 ns" { HEX2DEC:inst4|Add4~180 HEX2DEC:inst4|Add4~187 } "NODE_NAME" } } { "HEX2DEC.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/HEX2DEC.vhd" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.451 ns) + CELL(0.442 ns) 3.271 ns debugled:10\|Mux14~1465 7 COMB LAB_X17_Y9 1 " "Info: 7: + IC(0.451 ns) + CELL(0.442 ns) = 3.271 ns; Loc. = LAB_X17_Y9; Fanout = 1; COMB Node = 'debugled:10\|Mux14~1465'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.893 ns" { HEX2DEC:inst4|Add4~187 debugled:10|Mux14~1465 } "NODE_NAME" } } { "DEBUGLED.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/DEBUGLED.vhd" 89 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.303 ns) + CELL(0.590 ns) 4.164 ns debugled:10\|Mux14~1466 8 COMB LAB_X18_Y9 1 " "Info: 8: + IC(0.303 ns) + CELL(0.590 ns) = 4.164 ns; Loc. = LAB_X18_Y9; Fanout = 1; COMB Node = 'debugled:10\|Mux14~1466'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.893 ns" { debugled:10|Mux14~1465 debugled:10|Mux14~1466 } "NODE_NAME" } } { "DEBUGLED.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/DEBUGLED.vhd" 89 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.064 ns) + CELL(0.590 ns) 4.818 ns debugled:10\|Mux14~1467 9 COMB LAB_X18_Y9 1 " "Info: 9: + IC(0.064 ns) + CELL(0.590 ns) = 4.818 ns; Loc. = LAB_X18_Y9; Fanout = 1; COMB Node = 'debugled:10\|Mux14~1467'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.654 ns" { debugled:10|Mux14~1466 debugled:10|Mux14~1467 } "NODE_NAME" } } { "DEBUGLED.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/DEBUGLED.vhd" 89 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.362 ns) + CELL(0.292 ns) 5.472 ns debugled:10\|Mux14~1468 10 COMB LAB_X18_Y9 1 " "Info: 10: + IC(0.362 ns) + CELL(0.292 ns) = 5.472 ns; Loc. = LAB_X18_Y9; Fanout = 1; COMB Node = 'debugled:10\|Mux14~1468'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.654 ns" { debugled:10|Mux14~1467 debugled:10|Mux14~1468 } "NODE_NAME" } } { "DEBUGLED.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/DEBUGLED.vhd" 89 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.757 ns) + CELL(0.590 ns) 6.819 ns debugled:10\|Mux14~1471 11 COMB LAB_X19_Y10 1 " "Info: 11: + IC(0.757 ns) + CELL(0.590 ns) = 6.819 ns; Loc. = LAB_X19_Y10; Fanout = 1; COMB Node = 'debugled:10\|Mux14~1471'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.347 ns" { debugled:10|Mux14~1468 debugled:10|Mux14~1471 } "NODE_NAME" } } { "DEBUGLED.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/DEBUGLED.vhd" 89 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.064 ns) + CELL(0.590 ns) 7.473 ns debugled:10\|Mux14~1473 12 COMB LAB_X19_Y10 1 " "Info: 12: + IC(0.064 ns) + CELL(0.590 ns) = 7.473 ns; Loc. = LAB_X19_Y10; Fanout = 1; COMB Node = 'debugled:10\|Mux14~1473'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.654 ns" { debugled:10|Mux14~1471 debugled:10|Mux14~1473 } "NODE_NAME" } } { "DEBUGLED.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/DEBUGLED.vhd" 89 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.212 ns) + CELL(0.607 ns) 8.292 ns debugled:10\|temp_seg\[2\] 13 REG LAB_X19_Y10 7 " "Info: 13: + IC(0.212 ns) + CELL(0.607 ns) = 8.292 ns; Loc. = LAB_X19_Y10; Fanout = 7; REG Node = 'debugled:10\|temp_seg\[2\]'" {  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.819 ns" { debugled:10|Mux14~1473 debugled:10|temp_seg[2] } "NODE_NAME" } } { "DEBUGLED.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/DEBUGLED.vhd" 86 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.373 ns ( 64.80 % ) " "Info: Total cell delay = 5.373 ns ( 64.80 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.919 ns ( 35.20 % ) " "Info: Total interconnect delay = 2.919 ns ( 35.20 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "8.292 ns" { hhmmss:inst8|hh[1] HEX2DEC:inst4|Add4~182COUT1_208 HEX2DEC:inst4|Add4~186COUT1_210 HEX2DEC:inst4|Add4~190COUT1_212 HEX2DEC:inst4|Add4~180 HEX2DEC:inst4|Add4~187 debugled:10|Mux14~1465 debugled:10|Mux14~1466 debugled:10|Mux14~1467 debugled:10|Mux14~1468 debugled:10|Mux14~1471 debugled:10|Mux14~1473 debugled:10|temp_seg[2] } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "5 9 " "Info: Average interconnect usage is 5% of the available device resources. Peak interconnect usage is 9%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "x14_y0 x27_y14 " "Info: The peak interconnect region extends from location x14_y0 to location x27_y14" {  } {  } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:03 " "Info: Fitter routing operations ending: elapsed time is 00:00:03" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Warning" "WFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN" "2 " "Warning: Following 2 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" { { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "FP_DATA_DIR GND " "Info: Pin FP_DATA_DIR has GND driving its datain port" {  } { { "all_01.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/all_01.bdf" { { 680 1208 1384 696 "FP_DATA_DIR" "" } } } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "FP_DATA_DIR" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { FP_DATA_DIR } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { FP_DATA_DIR } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0} { "Info" "IFIOMGR_BIDIR_OR_OUTPUT_WITH_TRIVIAL_DATAIN_SUB" "SEG\[8\] GND " "Info: Pin SEG\[8\] has GND driving its datain port" {  } { { "all_01.bdf" "" { Schematic "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/all_01.bdf" { { 256 1008 1184 272 "SEG\[8..1\]" "" } } } } { "c:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "c:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "SEG\[8\]" } } } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { SEG[8] } "NODE_NAME" } } { "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { SEG[8] } "NODE_NAME" } }  } 0 0 "Pin %1!s! has %2!s! driving its datain port" 0 0}  } {  } 0 0 "Following %1!d! pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 2 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Aug 05 08:26:31 2007 " "Info: Processing ended: Sun Aug 05 08:26:31 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:18 " "Info: Elapsed time: 00:00:18" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/all_01.fit.smsg " "Info: Generated suppressed messages file C:/Documents and Settings/Administrator/桌面/quar42_CYC_DEMO_V2_test/all_01.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0}