all_01.map.eqn

eda 开发数字钟的设计具体编程代码和开发流程与设计图

--H1_clkout is clock_spk:17|clkout
--operation mode is normal

H1_clkout_lut_out = H1L301 # H1L811 # H1L521 & !H1_count[11];
H1_clkout = DFFEAS(H1_clkout_lut_out, K1_clkout, VCC, , , , , , );


--R1__clk0 is CYC_PLL:inst|altpll:altpll_component|_clk0
R1__clk0 = PLL.CLK0(.FBIN(), .ENA(), .CLKSWITCH(), .ARESET(), .PFDENA(), .SCANCLK(), .SCANACLR(), .SCANDATA(), .COMPARATOR(), .INCLK(CLK20M), .INCLK(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA());

--R1__clk1 is CYC_PLL:inst|altpll:altpll_component|_clk1
R1__clk1 = PLL.CLK1(.FBIN(), .ENA(), .CLKSWITCH(), .ARESET(), .PFDENA(), .SCANCLK(), .SCANACLR(), .SCANDATA(), .COMPARATOR(), .INCLK(CLK20M), .INCLK(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA());


--D1_var_ss[0] is hhmmss:11|var_ss[0]
--operation mode is normal

D1_var_ss[0]_lut_out = D1L1;
D1_var_ss[0] = DFFEAS(D1_var_ss[0]_lut_out, G1_clkout, VCC, , , , , , );


--C1_digit[5] is debugled:10|digit[5]
--operation mode is normal

C1_digit[5]_lut_out = C1_dig_cnt[2] & C1_dig_cnt[0];
C1_digit[5] = DFFEAS(C1_digit[5]_lut_out, !B1_24, VCC, , C1L55, , , , );


--C1_digit[4] is debugled:10|digit[4]
--operation mode is normal

C1_digit[4]_lut_out = C1_dig_cnt[2] & !C1_dig_cnt[0];
C1_digit[4] = DFFEAS(C1_digit[4]_lut_out, !B1_24, VCC, , C1L55, , , , );


--C1_digit[3] is debugled:10|digit[3]
--operation mode is normal

C1_digit[3]_lut_out = C1_dig_cnt[0] & C1_dig_cnt[1];
C1_digit[3] = DFFEAS(C1_digit[3]_lut_out, !B1_24, VCC, , C1L55, , , , );


--C1_digit[2] is debugled:10|digit[2]
--operation mode is normal

C1_digit[2]_lut_out = C1_dig_cnt[1] & !C1_dig_cnt[0];
C1_digit[2] = DFFEAS(C1_digit[2]_lut_out, !B1_24, VCC, , C1L55, , , , );


--C1_digit[1] is debugled:10|digit[1]
--operation mode is normal

C1_digit[1]_lut_out = C1_dig_cnt[0] & !C1_dig_cnt[2] & !C1_dig_cnt[1];
C1_digit[1] = DFFEAS(C1_digit[1]_lut_out, !B1_24, VCC, , C1L55, , , , );


--C1_digit[0] is debugled:10|digit[0]
--operation mode is normal

C1_digit[0]_lut_out = !C1_dig_cnt[2] & !C1_dig_cnt[0] & !C1_dig_cnt[1];
C1_digit[0] = DFFEAS(C1_digit[0]_lut_out, !B1_24, VCC, , C1L55, , , , );


--E1_LED[12] is ledflash:12|LED[12]
--operation mode is normal

E1_LED[12]_lut_out = Q1_safe_q[3] & Q1_safe_q[0] $ E1L32 # !Q1_safe_q[2] # !Q1_safe_q[3] & Q1_safe_q[0] # Q1_safe_q[2] # !E1L32;
E1_LED[12] = DFFEAS(E1_LED[12]_lut_out, G1_clkout, VCC, , , , , , );


--E1_LED[11] is ledflash:12|LED[11]
--operation mode is normal

E1_LED[11]_lut_out = Q1_safe_q[3] & !E1L41 & !E1L42 # !Q1_safe_q[4] # !Q1_safe_q[3] & !E1L42 # !Q1_safe_q[4];
E1_LED[11] = DFFEAS(E1_LED[11]_lut_out, G1_clkout, VCC, , , , , , );


--E1_LED[10] is ledflash:12|LED[10]
--operation mode is normal

E1_LED[10]_lut_out = Q1_safe_q[3] $ (Q1_safe_q[2] # !Q1_safe_q[4]) # !E1L72;
E1_LED[10] = DFFEAS(E1_LED[10]_lut_out, G1_clkout, VCC, , , , , , );


--E1_LED[9] is ledflash:12|LED[9]
--operation mode is normal

E1_LED[9]_lut_out = Q1_safe_q[3] & !E1L51 # !Q1_safe_q[3] & Q1_safe_q[2] # !Q1_safe_q[4];
E1_LED[9] = DFFEAS(E1_LED[9]_lut_out, G1_clkout, VCC, , , , , , );


--E1_LED[8] is ledflash:12|LED[8]
--operation mode is normal

E1_LED[8]_lut_out = Q1_safe_q[3] & E1L22 # !Q1_safe_q[3] & !E1L61;
E1_LED[8] = DFFEAS(E1_LED[8]_lut_out, G1_clkout, VCC, , , , , , );


--E1_LED[7] is ledflash:12|LED[7]
--operation mode is normal

E1_LED[7]_lut_out = Q1_safe_q[4] & E1L81 # !Q1_safe_q[4] & !E1L71;
E1_LED[7] = DFFEAS(E1_LED[7]_lut_out, G1_clkout, VCC, , , , , , );


--E1_LED[6] is ledflash:12|LED[6]
--operation mode is normal

E1_LED[6]_lut_out = Q1_safe_q[4] & E1L71 # !Q1_safe_q[4] & !E1L81;
E1_LED[6] = DFFEAS(E1_LED[6]_lut_out, G1_clkout, VCC, , , , , , );


--E1_LED[5] is ledflash:12|LED[5]
--operation mode is normal

E1_LED[5]_lut_out = Q1_safe_q[3] & E1L22 # !Q1_safe_q[3] & !E1L91;
E1_LED[5] = DFFEAS(E1_LED[5]_lut_out, G1_clkout, VCC, , , , , , );


--E1_LED[4] is ledflash:12|LED[4]
--operation mode is normal

E1_LED[4]_lut_out = Q1_safe_q[3] & E1L02 # !Q1_safe_q[3] & !Q1_safe_q[2] & !Q1_safe_q[4];
E1_LED[4] = DFFEAS(E1_LED[4]_lut_out, G1_clkout, VCC, , , , , , );


--E1_LED[3] is ledflash:12|LED[3]
--operation mode is normal

E1_LED[3]_lut_out = E1L62 & Q1_safe_q[3] $ (!Q1_safe_q[4] & !Q1_safe_q[2]);
E1_LED[3] = DFFEAS(E1_LED[3]_lut_out, G1_clkout, VCC, , , , , , );


--E1_LED[2] is ledflash:12|LED[2]
--operation mode is normal

E1_LED[2]_lut_out = Q1_safe_q[3] & E1L12 # E1L42 & !Q1_safe_q[4] # !Q1_safe_q[3] & E1L42 & !Q1_safe_q[4];
E1_LED[2] = DFFEAS(E1_LED[2]_lut_out, G1_clkout, VCC, , , , , , );


--E1_LED[1] is ledflash:12|LED[1]
--operation mode is normal

E1_LED[1]_lut_out = Q1_safe_q[0] & E1L52 & !Q1_safe_q[4] # !Q1_safe_q[0] & Q1_safe_q[4] & E1L52 # !Q1_safe_q[4] & E1L42;
E1_LED[1] = DFFEAS(E1_LED[1]_lut_out, G1_clkout, VCC, , , , , , );


--C1_temp_seg[0] is debugled:10|temp_seg[0]
--operation mode is normal

C1_temp_seg[0]_lut_out = C1_dig_cnt[2] & C1L32 & !C1_dig_cnt[1] # !C1_dig_cnt[2] & C1L91;
C1_temp_seg[0] = DFFEAS(C1_temp_seg[0]_lut_out, !B1_24, VCC, , C1L55, , , , );


--C1_temp_seg[1] is debugled:10|temp_seg[1]
--operation mode is normal

C1_temp_seg[1]_lut_out = C1_dig_cnt[2] & C1L33 & !C1_dig_cnt[1] # !C1_dig_cnt[2] & C1L71;
C1_temp_seg[1] = DFFEAS(C1_temp_seg[1]_lut_out, !B1_24, VCC, , C1L55, , , , );


--C1_temp_seg[2] is debugled:10|temp_seg[2]
--operation mode is normal

C1_temp_seg[2]_lut_out = C1_dig_cnt[2] & C1L34 & !C1_dig_cnt[1] # !C1_dig_cnt[2] & C1L51;
C1_temp_seg[2] = DFFEAS(C1_temp_seg[2]_lut_out, !B1_24, VCC, , C1L55, , , , );


--C1_temp_seg[3] is debugled:10|temp_seg[3]
--operation mode is normal

C1_temp_seg[3]_lut_out = C1_dig_cnt[2] & C1L25 & !C1_dig_cnt[1] # !C1_dig_cnt[2] & C1L31;
C1_temp_seg[3] = DFFEAS(C1_temp_seg[3]_lut_out, !B1_24, VCC, , C1L55, , , , );


--C1L26 is debugled:10|seg[6]~170
--operation mode is normal

C1L26 = C1_temp_seg[0] & C1_temp_seg[3] # C1_temp_seg[1] $ C1_temp_seg[2] # !C1_temp_seg[0] & C1_temp_seg[1] # C1_temp_seg[2] $ C1_temp_seg[3];


--C1L16 is debugled:10|seg[5]~172
--operation mode is normal

C1L16 = C1_temp_seg[0] & C1_temp_seg[3] $ (C1_temp_seg[1] # !C1_temp_seg[2]) # !C1_temp_seg[0] & C1_temp_seg[1] & !C1_temp_seg[2] & !C1_temp_seg[3];


--C1L06 is debugled:10|seg[4]~174
--operation mode is normal

C1L06 = C1_temp_seg[1] & C1_temp_seg[0] & !C1_temp_seg[3] # !C1_temp_seg[1] & C1_temp_seg[2] & !C1_temp_seg[3] # !C1_temp_seg[2] & C1_temp_seg[0];


--C1L95 is debugled:10|seg[3]~176
--operation mode is normal

C1L95 = C1_temp_seg[1] & C1_temp_seg[0] & C1_temp_seg[2] # !C1_temp_seg[0] & !C1_temp_seg[2] & C1_temp_seg[3] # !C1_temp_seg[1] & !C1_temp_seg[3] & C1_temp_seg[0] $ C1_temp_seg[2];


--C1L85 is debugled:10|seg[2]~178
--operation mode is normal

C1L85 = C1_temp_seg[2] & C1_temp_seg[3] & C1_temp_seg[1] # !C1_temp_seg[0] # !C1_temp_seg[2] & !C1_temp_seg[0] & C1_temp_seg[1] & !C1_temp_seg[3];


--C1L75 is debugled:10|seg[1]~180
--operation mode is normal

C1L75 = C1_temp_seg[1] & C1_temp_seg[0] & C1_temp_seg[3] # !C1_temp_seg[0] & C1_temp_seg[2] # !C1_temp_seg[1] & C1_temp_seg[2] & C1_temp_seg[0] $ C1_temp_seg[3];


--C1L65 is debugled:10|seg[0]~182
--operation mode is normal

C1L65 = C1_temp_seg[2] & !C1_temp_seg[1] & C1_temp_seg[0] $ !C1_temp_seg[3] # !C1_temp_seg[2] & C1_temp_seg[0] & C1_temp_seg[1] $ !C1_temp_seg[3];


--H1L98 is clock_spk:17|reduce_nor~499
--operation mode is normal

H1L98 = KEY[6] & KEY[5] & KEY[4] & KEY[7];


--H1L18 is clock_spk:17|reduce_nor~14
--operation mode is normal

H1L18 = KEY[3] & KEY[2] & H1L98 & !KEY[1];


--H1_count[8] is clock_spk:17|count[8]
--operation mode is normal

H1_count[8]_lut_out = H1L331 # H1L71 & H1L431 # H1L631;
H1_count[8] = DFFEAS(H1_count[8]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1_count[9] is clock_spk:17|count[9]
--operation mode is normal

H1_count[9]_lut_out = H1L831 # H1L91 & H1L431 # H1L631;
H1_count[9] = DFFEAS(H1_count[9]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1L04 is clock_spk:17|LessThan~2889
--operation mode is normal

H1L04 = H1_count[8] & H1_count[9];


--H1_count[2] is clock_spk:17|count[2]
--operation mode is normal

H1_count[2]_lut_out = H1L041 # H1L5 & H1L431 # H1L631;
H1_count[2] = DFFEAS(H1_count[2]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1_count[3] is clock_spk:17|count[3]
--operation mode is normal

H1_count[3]_lut_out = H1L241 # H1L7 & H1L431 # H1L631;
H1_count[3] = DFFEAS(H1_count[3]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1L14 is clock_spk:17|LessThan~2890
--operation mode is normal

H1L14 = !H1_count[2] & !H1_count[3];


--H1_count[4] is clock_spk:17|count[4]
--operation mode is normal

H1_count[4]_lut_out = H1L441 # H1L9 & H1L431 # H1L631;
H1_count[4] = DFFEAS(H1_count[4]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1_count[5] is clock_spk:17|count[5]
--operation mode is normal

H1_count[5]_lut_out = H1L641 # H1L11 & H1L431 # H1L631;
H1_count[5] = DFFEAS(H1_count[5]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1_count[0] is clock_spk:17|count[0]
--operation mode is normal

H1_count[0]_lut_out = H1L841 # H1L1 & H1L431 # H1L631;
H1_count[0] = DFFEAS(H1_count[0]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1_count[1] is clock_spk:17|count[1]
--operation mode is normal

H1_count[1]_lut_out = H1L051 # H1L3 & H1L431 # H1L631;
H1_count[1] = DFFEAS(H1_count[1]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1L24 is clock_spk:17|LessThan~2891
--operation mode is normal

H1L24 = H1_count[0] & H1_count[1];


--H1_count[11] is clock_spk:17|count[11]
--operation mode is normal

H1_count[11]_lut_out = H1L251 # H1L32 & H1L431 # H1L631;
H1_count[11] = DFFEAS(H1_count[11]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1_count[6] is clock_spk:17|count[6]
--operation mode is normal

H1_count[6]_lut_out = H1L451 # H1L31 & H1L431 # H1L631;
H1_count[6] = DFFEAS(H1_count[6]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1_count[7] is clock_spk:17|count[7]
--operation mode is normal

H1_count[7]_lut_out = H1L651 # H1L51 & H1L431 # H1L631;
H1_count[7] = DFFEAS(H1_count[7]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1_count[10] is clock_spk:17|count[10]
--operation mode is normal

H1_count[10]_lut_out = H1L851 # H1L12 & H1L431 # H1L631;
H1_count[10] = DFFEAS(H1_count[10]_lut_out, K1_clkout, VCC, , H1L59, , , , );


--H1L001 is clock_spk:17|Select~7384
--operation mode is normal

H1L001 = H1_count[11] & !H1_count[6] & !H1_count[7] & !H1_count[10];


--H1L101 is clock_spk:17|Select~7385
--operation mode is normal

H1L101 = H1_count[4] & H1_count[5] & H1L24 & H1L001;


--H1L34 is clock_spk:17|LessThan~2892
--operation mode is normal

H1L34 = !H1_count[9] & !H1_count[7] # !H1_count[8] # !H1_count[10];


--H1L44 is clock_spk:17|LessThan~2893
--operation mode is normal

H1L44 = !H1_count[6] & !H1_count[9] & !H1_count[5];


--H1L54 is clock_spk:17|LessThan~2894
--operation mode is normal

H1L54 = H1_count[4] & H1_count[3] & H1_count[2] # H1_count[1];


--H1L64 is clock_spk:17|LessThan~2895
--operation mode is normal

H1L64 = !H1_count[11] & H1L34 # H1L44 & !H1L54;


--H1L83 is clock_spk:17|LessThan~1387
--operation mode is normal

H1L83 = H1L14 & !H1L24 # !H1_count[5] # !H1_count[4];


--H1L06 is clock_spk:17|process0~2006
--operation mode is normal

H1L06 = H1L04 & H1_count[6] # H1_count[7] # !H1L83;


--H1L16 is clock_spk:17|process0~2007
--operation mode is normal

H1L16 = H1L64 # H1_count[11] & H1_count[10] # H1L06;


--H1L201 is clock_spk:17|Select~7386
--operation mode is normal

H1L201 = H1L04 & H1L14 & H1L101 # !H1L16;


--H1L09 is clock_spk:17|reduce_nor~500
--operation mode is normal

H1L09 = KEY[2] & KEY[1];


--H1L19 is clock_spk:17|reduce_nor~501
--operation mode is normal

H1L19 = KEY[5] & KEY[4] & KEY[7];


--H1L38 is clock_spk:17|reduce_nor~16
--operation mode is normal

H1L38 = KEY[6] & H1L09 & H1L19 & !KEY[3];


--H1L74 is clock_spk:17|LessThan~2896
--operation mode is normal

H1L74 = H1_count[6] & H1_count[7] & H1_count[5];


--H1L26 is clock_spk:17|process0~2008
--operation mode is normal

H1L26 = H1L74 & H1_count[4] # H1L24 # !H1L14;


--H1L36 is clock_spk:17|process0~2009
--operation mode is normal

H1L36 = H1_count[8] # H1_count[9] # H1_count[10];


--H1L84 is clock_spk:17|LessThan~2897
--operation mode is normal

H1L84 = H1_count[10] & H1_count[8] # H1_count[9] # H1_count[7];


--H1L94 is clock_spk:17|LessThan~2898
--operation mode is normal

H1L94 = H1_count[10] & H1_count[2] # H1_count[3] # H1_count[1];


--H1L05 is clock_spk:17|LessThan~2899
--operation mode is normal

H1L05 = H1_count[6] & H1_count[4] & H1_count[5];


--H1L15 is clock_spk:17|LessThan~2900
--operation mode is normal

H1L15 = H1_count[11] # H1L84 # H1L94 & H1L05;


--H1L46 is clock_spk:17|process0~2010
--operation mode is normal

H1L46 = H1_count[11] & H1L26 # H1L36 # !H1L15;


--H1L301 is clock_spk:17|Select~7387
--operation mode is normal

H1L301 = H1L18 & H1L201 # H1L38 & !H1L46 # !H1L18 & H1L38 & !H1L46;


--H1L56 is clock_spk:17|process0~2011
--operation mode is normal

H1L56 = H1_count[6] & H1_count[5];


--H1L401 is clock_spk:17|Select~7388
--operation mode is normal

H1L401 = !H1_count[9] & !H1_count[10];


--H1L29 is clock_spk:17|reduce_nor~502
--operation mode is normal

H1L29 = KEY[6] & KEY[3] & KEY[2] & KEY[1];


--H1L48 is clock_spk:17|reduce_nor~17
--operation mode is normal

H1L48 = H1L29 & KEY[5] & KEY[7] & !KEY[4];


--H1L69 is clock_spk:17|Select~7340
--operation mode is normal

H1L69 = H1_count[0] & H1_count[7] & H1L38 # !H1_count[0] & H1L48 & !H1_count[7];


--H1L79 is clock_spk:17|Select~7341
--operation mode is normal

H1L79 = H1L69 & H1_count[1] & !H1_count[2] & H1_count[0] # !H1_count[1] & H1_count[2] & !H1_count[0];


--H1L501 is clock_spk:17|Select~7389
--operation mode is normal

H1L501 = H1L79 & !H1_count[8] & !H1_count[4] & !H1_count[3];


--H1L28 is clock_spk:17|reduce_nor~15
--operation mode is normal

H1L28 = KEY[3] & KEY[1] & H1L98 & !KEY[2];


--H1L25 is clock_spk:17|LessThan~2901
--operation mode is normal

H1L25 = H1_count[4] & H1_count[3];


--H1L601 is clock_spk:17|Select~7390
--operation mode is normal

H1L601 = H1_count[7] & H1_count[1] & !H1_count[2];


--H1L701 is clock_spk:17|Select~7391
--operation mode is normal

H1L701 = H1_count[8] & H1L25 & H1L601 & !H1_count[0];


--H1L801 is clock_spk:17|Select~7392
--operation mode is normal

H1L801 = H1L951 & H1L501 # H1L28 & H1L701;


--H1L66 is clock_spk:17|process0~2012
--operation mode is normal

H1L66 = H1_count[8] & H1L74 & H1L54 # !H1L401;


--H1L35 is clock_spk:17|LessThan~2902
--operation mode is normal

H1L35 = H1_count[2] & H1_count[0] & H1_count[1];


--H1L45 is clock_spk:17|LessThan~2903
--operation mode is normal

H1L45 = H1_count[10] & H1L35 & H1L74 & H1L25;


--H1L55 is clock_spk:17|LessThan~2904
--operation mode is normal

H1L55 = H1_count[11] # H1_count[10] & H1_count[8] # H1_count[9];


--H1L76 is clock_spk:17|process0~2013
--operation mode is normal

H1L76 = H1_count[11] & H1L66 # !H1L45 & !H1L55 # !H1_count[11] & !H1L45 & !H1L55;


--H1L65 is clock_spk:17|LessThan~2905
--operation mode is normal

H1L65 = H1_count[8] # H1_count[6] # H1_count[9] # H1_count[7];