📄 viterbi_dec.asm
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;****************************************************************
; Function: viterbi decoder
; Version: 1.00
; Processor: C54xx
; Description: Implements the GSM convolutional decoder
; C-callable
;
; Useage: GSM_viterbi(ushort frame_sz,
; int *m,
; int *sd,
; int *trans
; int *output
; )
;
;
;
; Viterbi decoder for GSM
;
; Frame processing--starts traceback at state 0, assuming 4 tail bits
; have been added.
;
;
; Copyright Texas instruments Inc, 2001
;****************************************************************
.mmregs
; Far-mode adjustment
; -------------------
.if __far_mode
OFFSET .set 2
.else
OFFSET .set 1
.endif
FRAME_SZ .set 2
REG_SAVE_SZ .set 2
PARAM_OFFSET .set FRAME_SZ + REG_SAVE_SZ + OFFSET
; .asg 0 + REG_SAVE_SZ + FRAME_SZ, RETURN_ADDR ;
; .asg 0 + PARAM_OFFSET, old_m
; .asg 1 + PARAM_OFFSET, sd
; .asg 2 + PARAM_OFFSET, trans
; .asg 3 + PARAM_OFFSET, output
; .asg 4 + PARAM_OFFSET, m
; .asg 5 + PARAM_OFFSET, new_m
.asg 0 + REG_SAVE_SZ + FRAME_SZ, RETURN_ADDR ;
.asg 0 + PARAM_OFFSET, metric_sz
.asg 1 + PARAM_OFFSET, old_m
.asg 2 + PARAM_OFFSET, sd
.asg 3 + PARAM_OFFSET, trans
.asg 4 + PARAM_OFFSET, output
.asg 5 + PARAM_OFFSET, m
.asg 6 + PARAM_OFFSET, new_m
; Local variables
; --------------
.asg 0, DIFF
.asg 0, ONE
.asg 1, SUM
; Register usage
; --------------
.asg AR0, temp
.asg AR1, trans_ptr
.asg AR2, sd_ptr
.asg AR3, m_ptr
.asg AR4, newm_ptr
.asg AR5, oldm_ptr
.asg AR6, out_ptr
.asg BRC, rptb_cnt
;**************************************************************************
.global _GSM_viterbi
_GSM_viterbi
; Preserve registers
; ------------------
pshm ar1
pshm ar6
;
; And establish local frame
; Set sign extension mode
; Set FRCT bit:
;----------------------------------------------------------------
FRAME #-(FRAME_SZ) ; 1 cycle
SSBX SXM ; sign extension on
SSBX C16 ; accumulators in dual 16 bit mode
;
; Copy arguments to their local locations as necessary
;----------------------------------------------------------------
; LD *sp(old_m), B
; ADD #16, B
; STL B, *sp(new_m)
; ADD #8, B
; STL B, *sp(m)
LD *sp(old_m), B
ADD *sp(metric_sz), -1, B
STL B, *sp(new_m)
ADD *sp(metric_sz),-2, B
STL B, *sp(m)
MVDK *sp(trans), trans_ptr ; 2 cycles
MVDK *sp(sd), sd_ptr ; 2 cycles
MVDK *sp(m), m_ptr ; 2 cycles
MVDK *sp(new_m), newm_ptr ; 2 cycles
MVDK *sp(old_m), oldm_ptr ; 2 cycles
MVDK *sp(output), out_ptr ; 2 cycles
;
; Set loop count by subtracting 1 from frame_sz and
; storing into block repeat count register
;----------------------------------------------------------------
SUB #1, A ; 2 cycles
STLM A, rptb_cnt ; 1 cycle
STLM A, temp
BFLY_DIR .macro
DADST *oldm_ptr, A ; A = Old_Met(2*j)+T // Old_met(2*j+1)-T
DSADT *oldm_ptr+%, B ; B = Old_Met(2*j)-T // Old_met(2*j+1)+T
CMPS A,*newm_ptr+% ; New_Met(j) = MAX(Old_Met(2*j)+T,Old_Met(2*j+1)-T)
; TRN = TRN << 1
; If (Old_Met(2*j)+T =< Old_Met(2*j+1)-T) Then TRN[0]=1
CMPS B,*m_ptr+% ; New_Met(j+8) = MAX(Old_Met(2*j)-T,Old_Met(2*j+1)+T)
; TRN = TRN << 1
; If (Old_Met(2*j)-T =< Old_Met(2*j+1)+T) Then TRN[0]=1
.endm
BFLY_REV .macro
DSADT *oldm_ptr, A ; A = Old_Met(2*j)-T // Old_met(2*j+1)+T
DADST *oldm_ptr+%, B ; B = Old_Met(2*j)+T // Old_met(2*j+1)-T
CMPS A,*newm_ptr+% ; New_Met(j) = MAX(Old_Met(2*j)-T,Old_Met(2*j+1)+T)
; TRN = TRN << 1
; If (Old_Met(2*j)-T =< Old_Met(2*j+1)+T) Then TRN[0]=1
CMPS B,*m_ptr+% ; New_Met(j+8) = MAX(Old_Met(2*j)+T,Old_Met(2*j+1)-T)
; TRN = TRN << 1
; If (Old_Met(2*j)+T =< Old_Met(2*j+1)-T) Then TRN[0]=1
.endm
;***************************************************************************
VITERBI_DECODER
STM #32,BK ; the circular buffer size is 32
ST #0100, *oldm_ptr+% ; give state zero an initial bias
LD #0000h, A ; all other states are set to zero
RPT #31-1
STL A, *oldm_ptr+%
RPTB DECODE_END-1 ; do i=0,188
LD *AR2+,16,A ; A = SD(2*i)
SUB *AR2,16,A,B ; B = SD(2*i)-SD(2*i+1)
STH B,*sp(DIFF) ; store to DIFF
ADD *AR2+,16,A,B ; B = SD(2*i)+SD(2*i+1)
STH B,*sp(SUM) ; store the SUM
LD *sp(SUM), T ; load first branch metric to the T reg
BFLY_DIR ; new_metric(0)&(8)
BFLY_REV ; new_metric(1)&(9)
BFLY_DIR ; new_metric(2)&(10)
BFLY_REV ; new_metric(3)&(11)
LD *sp(DIFF), T ; load second branch metric to the T reg
BFLY_DIR ; new_metric(4)&(12)
BFLY_REV ; new_metric(5)&(13)
BFLY_DIR ; new_metric(6)&(14)
BFLY_REV ; new_metric(7)&(15)
MAR *+m_ptr(8)% ; advance pointer by 8
MAR *+newm_ptr(8)% ; advance pointer by 8
ST TRN, *AR1+ ; store the transition register
DECODE_END ; end do (i loop)
;**************************************************************************
; Trace back routine
;**************************************************************************
; A accumulator = STATE value
; B accumulator = temp storage
; ONE = 1
; AR1 = number of output words to compute
; AR2 = pointer to STATE_TRANS array
; m_ptr = pointer to end of output array
;**************************************************************************
TRACE_BACK_INIT
ST #1, *sp(ONE)
LDM temp, A
ADD *sp(trans), A
STLM A, AR2 ; AR2 = #STATE_TRANS+189-1
LD #0,A ; init STATE to zero (final state=0 due to tail bits)
STM #12-1,AR1 ; init i counter (# output words)
STM #9-1,BRC ; init bit counter (only 9 bits for 1st loop)
TRACE_BACK ; Do i=11,0
RPTB TBACK_END-1 ; Do j=15,0
; Calculate bit position in transition word
SFTL A,-3,B ; B = STATE>>(K-2)
AND *sp(ONE),B ; B = B&1 = msb of STATE
ADD A,1,B ; B = B+A<<1 = 2*STATE + msb of STATE
STLM B,T ; T = B (bit position)
NOP ; (one cycle of latency between STLM and BITT)
BITT *AR2- ; Test bit in transition word & point to next transition word
ROLTC A ; Rotate decision into STATE
TBACK_END ; enddo (j loop)
STL A,*out_ptr+ ; store packed output
BANZD TRACE_BACK,*AR1- ; repeat j loop if frame not finished
STM #15,BRC ; init bit counter for next word
; enddo (i loop)
_end:
;
; Restore stack to previous value, FRAME, etc..
;----------------------------------------------------------------
RETURN:
FRAME #(FRAME_SZ) ; 1 cycle
popm ar6
popm ar1
.if __far_mode
FRETD ; 4 cycles
.else
RETD ; 3.0 cycles
.endif
RSBX FRCT ; delay slot 1 cycle
NOP
;END
;end of file. please do not remove. it is left here to ensure that no lines of code are removed by any editor
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