📄 stc12c2052ad.lst
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C51 COMPILER V8.02 STC12C2052AD 10/16/2006 11:23:13 PAGE 1
C51 COMPILER V8.02, COMPILATION OF MODULE STC12C2052AD
OBJECT MODULE PLACED IN STC12C2052AD.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE STC12C2052AD.H DEBUG OBJECTEXTEND
line level source
1 /* After is STC additional SFR or change */
2
3 sfr AUXR = 0x8e;
4 sfr IPH = 0xb7;
5
6 /* Watchdog Timer Register */
7 sfr WDT_CONTR = 0xe1;
8
9 /* ISP_IAP_EEPROM Register */
10 sfr ISP_DATA = 0xe2;
11 sfr ISP_ADDRH = 0xe3;
12 sfr ISP_ADDRL = 0xe4;
13 sfr ISP_CMD = 0xe5;
14 sfr ISP_TRIG = 0xe6;
15 sfr ISP_CONTR = 0xe7;
16
17 /* IDLE, Clock Divider */
18 sfr IDLE_CLK = 0xc7;
19
20 /* I_O Port Mode Set Register */
21 sfr P0M0 = 0x93;
22 sfr P0M1 = 0x94;
23 sfr P1M0 = 0x91;
24 sfr P1M1 = 0x92;
25 sfr P2M0 = 0x95;
26 sfr P2M1 = 0x96;
27 sfr P3M0 = 0xb1;
28 sfr P3M1 = 0xb2;
29
30 /* SPI Register */
31 sfr SPSTAT = 0x84;
32 sfr SPCTL = 0x85;
33 sfr SPDAT = 0x86;
34
35 /* ADC Register */
36 sfr ADC_CONTR = 0xc5;
37 sfr ADC_DATA = 0xc6;
38 sfr ADC_LOW2 = 0xbe;
39
40 /* PCA SFR */
41 sfr CCON = 0xD8;
42 sfr CMOD = 0xD9;
43 sfr CCAPM0 = 0xDA;
44 sfr CCAPM1 = 0xDB;
45 sfr CCAPM2 = 0xDC;
46 sfr CCAPM3 = 0xDD;
47 sfr CCAPM4 = 0xDE;
48 sfr CCAPM5 = 0xDF;
49
50 sfr CL = 0xE9;
51 sfr CCAP0L = 0xEA;
52 sfr CCAP1L = 0xEB;
53 sfr CCAP2L = 0xEC;
54 sfr CCAP3L = 0xED;
55 sfr CCAP4L = 0xEE;
C51 COMPILER V8.02 STC12C2052AD 10/16/2006 11:23:13 PAGE 2
56 sfr CCAP5L = 0xEF;
57
58 sfr CH = 0xF9;
59 sfr CCAP0H = 0xFA;
60 sfr CCAP1H = 0xFB;
61 sfr CCAP2H = 0xFC;
62 sfr CCAP3H = 0xFD;
63 sfr CCAP4H = 0xFE;
64 sfr CCAP5H = 0xFF;
65
66 sfr PCA_PWM0 = 0xF2;
67 sfr PCA_PWM1 = 0xF3;
68 sfr PCA_PWM2 = 0xF4;
69 sfr PCA_PWM3 = 0xF5;
70 sfr PCA_PWM4 = 0xF6;
71 sfr PCA_PWM5 = 0xF7;
72
73 /* CCON */
74 sbit CF = CCON^7;
75 sbit CR = CCON^6;
76 sbit CCF5 = CCON^5;
77 sbit CCF4 = CCON^4;
78 sbit CCF3 = CCON^3;
79 sbit CCF2 = CCON^2;
80 sbit CCF1 = CCON^1;
81 sbit CCF0 = CCON^0;
82
83 /* Above is STC additional SFR or change */
84
85 /*--------------------------------------------------------------------------
86 AT892051.H
87
88 Header file for the Atmel AT89C2051.
89 Copyright (c) 1988-2002 Keil Elektronik GmbH and Keil Software, Inc.
90 All rights reserved.
91 --------------------------------------------------------------------------*/
92
93 #ifndef __AT892051_H__
94 #define __AT892051_H__
95
96 /*------------------------------------------------
97 Byte Registers
98 ------------------------------------------------*/
99 sfr SP = 0x81;
100 sfr DPL = 0x82;
101 sfr DPH = 0x83;
102 sfr PCON = 0x87;
103 sfr TCON = 0x88;
104 sfr TMOD = 0x89;
105 sfr TL0 = 0x8A;
106 sfr TL1 = 0x8B;
107 sfr TH0 = 0x8C;
108 sfr TH1 = 0x8D;
109 sfr P1 = 0x90;
110 sfr SCON = 0x98;
111 sfr SBUF = 0x99;
112 sfr IE = 0xA8;
113 sfr P3 = 0xB0;
114 sfr IP = 0xB8;
115 sfr PSW = 0xD0;
116 sfr ACC = 0xE0;
117 sfr B = 0xF0;
C51 COMPILER V8.02 STC12C2052AD 10/16/2006 11:23:13 PAGE 3
118
119 /*------------------------------------------------
120 PCON Bit Values
121 ------------------------------------------------*/
122 #define IDL_ 0x01
123 #define STOP_ 0x02
124 #define EWT_ 0x04
125 #define EPFW_ 0x08
126 #define WTR_ 0x10
127 #define PFW_ 0x20
128 #define POR_ 0x40
129 #define SMOD_ 0x80
130
131 /*------------------------------------------------
132 TCON Bit Registers
133 ------------------------------------------------*/
134 sbit IT0 = 0x88;
135 sbit IE0 = 0x89;
136 sbit IT1 = 0x8A;
137 sbit IE1 = 0x8B;
138 sbit TR0 = 0x8C;
139 sbit TF0 = 0x8D;
140 sbit TR1 = 0x8E;
141 sbit TF1 = 0x8F;
142
143 /*------------------------------------------------
144 TMOD Bit Values
145 ------------------------------------------------*/
146 #define T0_M0_ 0x01
147 #define T0_M1_ 0x02
148 #define T0_CT_ 0x04
149 #define T0_GATE_ 0x08
150 #define T1_M0_ 0x10
151 #define T1_M1_ 0x20
152 #define T1_CT_ 0x40
153 #define T1_GATE_ 0x80
154
155 #define T1_MASK_ 0xF0
156 #define T0_MASK_ 0x0F
157
158 /*------------------------------------------------
159 P1 Bit Registers
160 ------------------------------------------------*/
161 sbit P1_0 = 0x90;
162 sbit P1_1 = 0x91;
163 sbit P1_2 = 0x92;
164 sbit P1_3 = 0x93;
165 sbit P1_4 = 0x94;
166 sbit P1_5 = 0x95;
167 sbit P1_6 = 0x96;
168 sbit P1_7 = 0x97;
169
170 sbit AIN0 = 0x90; /* + Analog comparator input */
171 sbit AIN1 = 0x91; /* - Analog comparator input */
172
173 /*------------------------------------------------
174 SCON Bit Registers
175 ------------------------------------------------*/
176 sbit RI = 0x98;
177 sbit TI = 0x99;
178 sbit RB8 = 0x9A;
179 sbit TB8 = 0x9B;
C51 COMPILER V8.02 STC12C2052AD 10/16/2006 11:23:13 PAGE 4
180 sbit REN = 0x9C;
181 sbit SM2 = 0x9D;
182 sbit SM1 = 0x9E;
183 sbit SM0 = 0x9F;
184
185 /*------------------------------------------------
186 IE Bit Registers
187 ------------------------------------------------*/
188 sbit EX0 = 0xA8; /* 1=Enable External interrupt 0 */
189 sbit ET0 = 0xA9; /* 1=Enable Timer 0 interrupt */
190 sbit EX1 = 0xAA; /* 1=Enable External interrupt 1 */
191 sbit ET1 = 0xAB; /* 1=Enable Timer 1 interrupt */
192 sbit ES = 0xAC; /* 1=Enable Serial port interrupt */
193 sbit ET2 = 0xAD; /* 1=Enable Timer 2 interrupt */
194
195 sbit EA = 0xAF; /* 0=Disable all interrupts */
196
197 /*------------------------------------------------
198 P3 Bit Registers (Mnemonics & Ports)
199 ------------------------------------------------*/
200 sbit P3_0 = 0xB0;
201 sbit P3_1 = 0xB1;
202 sbit P3_2 = 0xB2;
203 sbit P3_3 = 0xB3;
204 sbit P3_4 = 0xB4;
205 sbit P3_5 = 0xB5;
206 /* P3_6 Hardwired as AOUT */
207 sbit P3_7 = 0xB7;
208
209 sbit RXD = 0xB0; /* Serial data input */
210 sbit TXD = 0xB1; /* Serial data output */
211 sbit INT0 = 0xB2; /* External interrupt 0 */
212 sbit INT1 = 0xB3; /* External interrupt 1 */
213 sbit T0 = 0xB4; /* Timer 0 external input */
214 sbit T1 = 0xB5; /* Timer 1 external input */
215 sbit AOUT = 0xB6; /* Analog comparator output */
216
217 /*------------------------------------------------
218 IP Bit Registers
219 ------------------------------------------------*/
220 sbit PX0 = 0xB8;
221 sbit PT0 = 0xB9;
222 sbit PX1 = 0xBA;
223 sbit PT1 = 0xBB;
224 sbit PS = 0xBC;
225
226 /*------------------------------------------------
227 PSW Bit Registers
228 ------------------------------------------------*/
229 sbit P = 0xD0;
230 sbit FL = 0xD1;
231 sbit OV = 0xD2;
232 sbit RS0 = 0xD3;
233 sbit RS1 = 0xD4;
234 sbit F0 = 0xD5;
235 sbit AC = 0xD6;
236 sbit CY = 0xD7;
237
238 /*------------------------------------------------
239 Interrupt Vectors:
240 Interrupt Address = (Number * 8) + 3
241 ------------------------------------------------*/
C51 COMPILER V8.02 STC12C2052AD 10/16/2006 11:23:13 PAGE 5
242 #define IE0_VECTOR 0 /* 0x03 External interrupt 0 */
243 #define TF0_VECTOR 1 /* 0x0B Timer 0 */
244 #define IE1_VECTOR 2 /* 0x13 External interrupt 1 */
245 #define TF1_VECTOR 3 /* 0x1B Timer 1 */
246 #define SIO_VECTOR 4 /* 0x23 Serial port */
247
248 #endif
249
250
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = ---- ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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