ch.c

本程序是mc145572U接口驱动程序,有一些问题,希望大家指点.

#define CH //定义主要通道的处理函数B1,B2,D,eoc,M4,M5/M6

#include "reg51.h"
#include "intrins.h"
#include "absacc.h"
#include "io.h"//AT89C2051的IO定义
#include "spi.h"//将SPI子函数定义为外部函数
#include "sub.h"//激活子函数定义为外部函数
#include "ch.h"//通道子函数定义为外部函数

/************************DCH-non-ISDN使用********************/
void  D_channel_initial()//non-ISDN使用
 {

		_nop_();
	reset();
		_nop_();
	writedata(0x7A,8);//BR10 address  Enable SCP/PCP D channel read/write access through OR12
		_nop_();	
	writedata(0x02,8);//BR10(b1) select D channel置1
		_nop_();
	writedata(0x48,8);//IRQ3使能
		_nop_();
	writedata(0x28,8);// Set activation request bit
		_nop_();
	}

void  D_channel_interrupt()//non-ISDN使用
{
  unsigned char val;
  if(val&0x38==0x38)//NR3(b3) = 1
	{
	if(val&0x1F==0x1F)//IF NR1 = F
		{
			
			}
	else
		{
		if((val&0x1A==0x1A)||(val&0x1B==0x1B))//IF NR1 = A or B AND initial activation	
		 	writedata(0x21,8);
		else
			{
			 if(val&0x14==0x14) 
			 writedata(0x14,8);
			 }
		  }
		}
	}

/********timeslot assignment programming********/
void  timeslot_initial()
	{
	_nop_();
	reset();
	_nop_();
	writedata(0x7A,8);//BR10 address 
  	_nop_();
	writedata(0x01,8);//BR10(b0) <– 1;  Select Init Group Overlay registers
  	_nop_();
	writedata(0x7A,8);//BR10先写入地址0111-1010  Select Init Group Overlay registers
  	_nop_();
	writedata(0x01,8);//BR10(b0) <– 1;
  	_nop_();
	writedata(0x70,8);//OR0 address
  	_nop_(); 
 	writedata(0x08,8);//OR0 <–08
  	_nop_(); 
	writedata(0x71,8);//OR1 address
  	_nop_(); 
 	writedata(0x0C,8);//OR1 <0C
  	_nop_(); 
	writedata(0x72,8);//OR2 address
  	_nop_(); 
 	writedata(0x11,8);//OR2 <11
  	_nop_(); 	
	writedata(0x73,8);//OR3 address
  	_nop_(); 
 	writedata(0x08,8);//OR3 <–08
  	_nop_(); 	
	writedata(0x74,8);//OR4 address
  	_nop_(); 
 	writedata(0x0C,8);//OR4 <0C
  	_nop_(); 	
	writedata(0x75,8);//OR5 address
  	_nop_(); 
 	writedata(0x11,8);//OR5 <11
  	_nop_(); 
	writedata(0x76,8);//OR6 address
  	_nop_(); 
 	writedata(0xE0,8);//OR6 <E0
  	_nop_();    	
	writedata(0x7A,8);//OR10 address 
  	_nop_();
	writedata(0x00,8);//BR10(b0) <-0 not select Init Group Overlay registers
  	_nop_();
	}

void	timer_ISR()
 {
  ;
 	}
/***********febe and nebe counters*********/

void   febe_nebe_initial()
 {

	_nop_();
	writedata(0x74,8);// BR4 Clear febe counter
	_nop_();
	writedata(0x00,8);//BR4-00000000
	_nop_();
	_nop_();
	writedata(0x75,8);// BR5 Clear nebe counter
	_nop_();
	writedata(0x00,8);//BR5-00000000
	_nop_();	
	writedata(0x7A,8);//BR10 add
	_nop_();
	writedata(0x01,8);//BR10(b0)<-1
	_nop_();
	writedata(0x77,8);//OR7 add
	_nop_();
	writedata(0x01,8);// Enable febe/nebe rollover
	_nop_();
	writedata(0x7A,8);//BR10 add
	_nop_();
	writedata(0x00,8);//BR10(b0)<-0
	_nop_();	
	}

void   febe_nebe_interrupt()
	{
	if(1)//block error  ratio timer 1.2 second--100 blocks
	{
//febe <– BR4; /* store current febe */
//FE_BLER <– febe – last_febe /* calculate far end BLER of last 1.2 sec */
//IF FE_BLER <= 0 THEN /* test for febe counter rollover */
//FE_BLER <– 256 – FE_BLER /* adjust far end BLER for counter
//rollover */
//last_febe <– BR4 /* update last_febe */
//nebe <– BR5; /* store current nebe */
//NE_BLER <– nebe – last_nebe /* calculate near end BLER of last 1.2 sec */
//IF NE_BLER <= 0 THEN /* test for nebe counter rollover */
//NE_BLER <– 256 – NE_BLER /* adjust near end BLER for counter
//rollover */
//last_nebe <– BR5 /* update last_nebe */	
		}
	}