entries.extra

这是ethernet的VHDL实现 OpenIPCore

/BUGS///
/TODO///
/eth_clockgen.v///
/eth_cop.v///
/eth_crc.v///
/eth_defines.v///
/eth_fifo.v///
/eth_maccontrol.v///
/eth_macstatus.v///
/eth_miim.v///
/eth_outputcontrol.v///
/eth_random.v///
/eth_receivecontrol.v///
/eth_register.v///
/eth_registers.v///
/eth_rxaddrcheck.v///
/eth_rxcounters.v///
/eth_rxethmac.v///
/eth_rxstatem.v///
/eth_shiftreg.v///
/eth_spram_256x32.v///
/eth_top.v///
/eth_transmitcontrol.v///
/eth_txcounters.v///
/eth_txethmac.v///
/eth_txstatem.v///
/eth_wishbone.v///
/timescale.v///
/xilinx_dist_ram_16x32.v///