📄 universalprogram.map
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HI-TECH Software PICC Compiler V8.05PL2
Linker command line:
-z -Muniversalprogram.map -ol.obj \
-ppowerup=00h,intentry=04h,intcode,intret,init,init23,end_init,clrtext,stringtable,pstrings,strings \
-ABANK0=020h-07Fh -prbit_0=BANK0,rbss_0=BANK0,rdata_0=BANK0,idata_0=CODE \
-ABANK1=0A0h-0EFh -prbit_1=BANK1,rbss_1=BANK1,rdata_1=BANK1,idata_1=CODE \
-ABANK2=0110h-016Fh \
-prbit_2=BANK2,rbss_2=BANK2,rdata_2=BANK2,idata_2=CODE \
-ABANK3=0190h-01EFh \
-prbit_3=BANK3,rbss_3=BANK3,rdata_3=BANK3,idata_3=CODE \
-ACOMBANK=070h-07Fh -ptemp=COMBANK -ACODE=0-7FFhx4 -ACONST=0-0FFhx32 \
-pconfig=2007h -pidloc=2000h -AEEDATA=2100h-21FFh -peeprom_data=EEDATA \
-pfloat_text0=CODE,float_text1=CODE,float_text2=CODE \
-pfloat_text3=CODE,float_text4=CODE \
-pnvram=BANK0,nvram_1=BANK1,nvram_2=BANK2,nvram_3=BANK3 \
-pnvbit_0=BANK0,nvbit_1=BANK1,nvbit_2=BANK2,nvbit_3=BANK3 -Q16F877A \
-h+universalprogram.sym -E -EC:\DOCUME~1\Jason\LOCALS~1\Temp\_2KS.AAA \
-ver=PICC#V8.05PL2 C:\HT-PIC\LIB\picrt42c.obj \
D:\chipcon\Uiversal Test Board\program\main.obj \
C:\HT-PIC\LIB\pic62--u.lib C:\HT-PIC\LIB\pic42c-c.lib \
C:\HT-PIC\LIB\pic62--u.lib
Object code version is 3.7
Machine type is 16F877A
Call graph:
*_main size 0,0 offset 0
_InitPIC16F877A->_Dly1mS size 2,2 offset 4
_CheckState
_SetupCCxx00 size 0,0 offset 0
_POWER_UP_RESET_CCxxx0 size 0,1 offset 1
_halSpiStrobe size 0,1 offset 7
_SPI_write size 0,3 offset 12
_halRfWriteRfSettings_CC1100 size 0,0 offset 1
_halSpiWriteReg size 1,1 offset 2
_SPI_write size 0,3 offset 12
_halSpiReadReg size 0,2 offset 7
_SPI_write size 0,3 offset 12
_SPI_read size 0,2 offset 12
_halSpiWriteBurstReg size 2,4 offset 4
_SPI_write size 0,3 offset 12
_halRfWriteRfSettings_CC2500 size 0,0 offset 1
_halSpiWriteReg size 1,1 offset 2
_SPI_write size 0,3 offset 12
_halSpiReadReg size 0,2 offset 7
_SPI_write size 0,3 offset 12
_SPI_read size 0,2 offset 12
_halSpiStrobe size 0,1 offset 7
_SPI_write size 0,3 offset 12
* _TestingCCxx00 size 0,1 offset 0
_halSpiReadStatus size 0,2 offset 7
_SPI_write size 0,3 offset 12
_SPI_read size 0,2 offset 12
_POWER_UP_RESET_CCxxx0 size 0,1 offset 1
_halSpiStrobe size 0,1 offset 7
_SPI_write size 0,3 offset 12
_halRfWriteRfSettings_CC1100 size 0,0 offset 1
_halSpiWriteReg size 1,1 offset 2
_SPI_write size 0,3 offset 12
_halSpiReadReg size 0,2 offset 7
_SPI_write size 0,3 offset 12
_SPI_read size 0,2 offset 12
_halRfWriteRfSettings_CC2500 size 0,0 offset 1
_halSpiWriteReg size 1,1 offset 2
_SPI_write size 0,3 offset 12
_halSpiReadReg size 0,2 offset 7
_SPI_write size 0,3 offset 12
_SPI_read size 0,2 offset 12
_KeyScan->_Dly1mS size 2,2 offset 4
_TxCCxx00 size 0,1 offset 1
_halSpiWriteReg size 1,1 offset 2
_SPI_write size 0,3 offset 12
_Dly1mS size 2,2 offset 4
_halRfSendPacket size 1,1 offset 2
_halSpiWriteBurstReg size 2,4 offset 4
_SPI_write size 0,3 offset 12
_Dly1mS size 2,2 offset 4
_halSpiStrobe size 0,1 offset 7
_SPI_write size 0,3 offset 12
_spiGetRxTxStatus size 0,1 offset 4
_SPI_write size 0,3 offset 12
* _RxCCxx00 size 0,2 offset 1
* _halRfReceivePacket size 1,3 offset 3
_halSpiReadStatus size 0,2 offset 7
_SPI_write size 0,3 offset 12
_SPI_read size 0,2 offset 12
* _halSpiStrobe size 0,1 offset 7
* _SPI_write size 0,3 offset 12
_halSpiReadReg size 0,2 offset 7
_SPI_write size 0,3 offset 12
_SPI_read size 0,2 offset 12
* _halSpiReadBurstReg size 2,3 offset 7
* _SPI_write size 0,3 offset 12
_SPI_read size 0,2 offset 12
* _halSpiStrobe size 0,1 offset 7
* _SPI_write size 0,3 offset 12
_Dly1mS size 2,2 offset 4
_SetupCC1000 size 0,0 offset 0
_SetupCC1000PD->_WriteToCC1000Register size 1,2 offset 8
_ResetCC1000 size 0,1 offset 0
_ReadFromCC1000Register size 0,3 offset 8
_WriteToCC1000Register size 1,2 offset 8
_ConfigureCC1000 size 0,2 offset 0
_WriteToCC1000Register size 1,2 offset 8
_WakeUpCC1000ToTX size 1,3 offset 0
_WriteToCC1000Register size 1,2 offset 8
_CalibrateCC1000 size 0,2 offset 6
_WriteToCC1000Register size 1,2 offset 8
_ReadFromCC1000Register size 0,3 offset 8
_WakeUpCC1000ToRX size 1,3 offset 0
_WriteToCC1000Register size 1,2 offset 8
_SetupCC1000RX size 1,4 offset 1
_WriteToCC1000Register size 1,2 offset 8
_ReadFromCC1000Register size 0,3 offset 8
_CalibrateCC1000 size 0,2 offset 6
_WriteToCC1000Register size 1,2 offset 8
_ReadFromCC1000Register size 0,3 offset 8
_ResetFreqSynth size 0,1 offset 6
_ReadFromCC1000Register size 0,3 offset 8
_WriteToCC1000Register size 1,2 offset 8
_TestingCC1000 size 0,1 offset 0
_KeyScan->_KeyScan size 0,0 offset 1
_Dly1mS size 2,2 offset 4
_SetupCC1000TX size 1,4 offset 1
_WriteToCC1000Register size 1,2 offset 8
_ReadFromCC1000Register size 0,3 offset 8
_CalibrateCC1000 size 0,2 offset 6
_WriteToCC1000Register size 1,2 offset 8
_ReadFromCC1000Register size 0,3 offset 8
_ResetFreqSynth size 0,1 offset 6
_ReadFromCC1000Register size 0,3 offset 8
_WriteToCC1000Register size 1,2 offset 8
_Dly1mS size 2,2 offset 4
_SetupCC1000RX size 1,4 offset 1
_WriteToCC1000Register size 1,2 offset 8
_ReadFromCC1000Register size 0,3 offset 8
_CalibrateCC1000 size 0,2 offset 6
_WriteToCC1000Register size 1,2 offset 8
_ReadFromCC1000Register size 0,3 offset 8
_ResetFreqSynth size 0,1 offset 6
_ReadFromCC1000Register size 0,3 offset 8
_WriteToCC1000Register size 1,2 offset 8
*_isr
Name Link Load Length Selector Space Scale
C:\HT-PIC\LIB\picrt42c.obj
end_init AB AB 4 8 0
D:\chipcon\Uiversal Test Board\program\main.obj
intcode F F 84 8 0
intentry 4 4 9 8 0
intret 95 95 9 8 0
idata_0 7D7 7D7 29 FAE 0
intsave_0 77 77 1 77 1
rdata_0 46 46 29 20 1
config 2007 2007 1 400E 0
rbss_0 20 20 17 20 1
temp 70 70 2 70 1
intsave 72 72 3 72 1
const1 D9 D9 16 1B2 0
text17 10C 10C 6CB 218 0
C:\HT-PIC\LIB\pic62--u.lib
C:\HT-PIC\LIB\pic42c-c.lib
btemp0.obj temp 70 70 1 70 1
btemp1.obj temp 70 70 2 70 1
clrbank0.obj init 9E 9E 4 8 0
clr.obj clrtext AF AF 7 8 0
codeptr.obj
copy.obj clrtext B6 B6 D 8 0
temp 70 70 1 70 1
cpybank0.obj init A2 A2 9 8 0
powerup.obj powerup 0 0 4 0 0
sbtemp0.obj intcode 93 93 2 8 0
intentry D D 2 8 0
intsave 6F 6F 1 20 1
stringtab.obj stringtab C3 C3 16 8 0
code_ptr 75 75 2 72 1
C:\HT-PIC\LIB\pic62--u.lib
COMMON rbss_0 37 37 F 20 1
TOTAL Name Link Load Length
CLASS BANK0
rdata_0 46 46 29
rbss_0 20 20 26
temp 70 70 2
intsave 72 72 3
code_ptr 75 75 2
intsave 6F 6F 1
CLASS BANK1
CLASS BANK2
CLASS BANK3
CLASS COMBANK
intsave_0 77 77 1
CLASS CODE
intcode F F 86
intentry 4 4 B
intret 95 95 9
idata_0 7D7 7D7 29
powerup 0 0 4
clrtext AF AF 14
end_init AB AB 4
init 9E 9E D
text17 10C 10C 6CB
CLASS CONST
const1 D9 D9 16
CLASS EEDATA
CLASS ENTRY
stringtab C3 C3 16
CLASS STRING
CLASS IDLOC
CLASS CONFIG
config 2007 2007 1
SEGMENTS Name Load Length Top Selector Space Class
powerup 000000 000004 000004 0 0 CODE
intentry 000004 0000D5 0000D9 8 0 CODE
rbit_0 000020 000050 000070 20 1 BANK0
temp 000070 000002 000072 70 1 COMBANK
intsave 000072 000005 000077 72 1 BANK0
intsave_0 000077 000001 000078 77 1 COMBANK
const1 0000D9 000016 0000EF 1B2 0 CONST
text17 00010C 0006CB 0007D7 218 0 CODE
idata_0 0007D7 000029 000800 FAE 0 CODE
config 002007 000001 002008 400E 0 CONFIG
UNUSED ADDRESS RANGES
BANK0 0078-007F
BANK1 00A0-00EF
BANK2 0110-016F
BANK3 0190-01EF
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