mcuinit.asm

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;** ###################################################################
;**     This code is generated by the Device Initialization Tool.
;**     It is overwritten during code generation.
;**     USER MODIFICATION ARE PRESERVED ONLY INSIDE INTERRUPT SERVICE ROUTINES
;**
;**     Project   : asdf
;**     Processor : MC68HC908JL16CFJE
;**     Version   : Bean 01.046, Driver 01.00, CPU db: 2.87.069
;**     Datasheet : MC68HC908JL16 Rev. 1.1 11/2005
;**     Date/Time : 2007-5-11, 20:22
;**     Abstract  :
;**         This bean "MC68HC908JL16_32FA" provides initialization of the 
;**         CPU core and shared peripherals.
;**     Settings  :
;**         Clock setting
;**             External clock     : 9.8306 MHz
;**             CPU mode selection : 0
;**             Initialization interrupt priority : 1
;**             Stop instruction enabled : no
;**             LVI module         : no
;**
;**             Source clock       : Main clock frequency / 1
;**             Internal bus clock : 2.45765 MHz
;**     Contents  :
;**         Function "MCU_init" initializes selected peripherals
;**
;**     (c) Copyright UNIS, spol. s r.o. 1997-2006
;**     UNIS, spol s r.o.
;**     Jundrovska 33
;**     624 00 Brno
;**     Czech Republic
;**     http      : www.processorexpert.com
;**     mail      : [e-mail]
;** ###################################################################

        INCLUDE MC68HC908JL16.inc      ; I/O map for MC68HC908JL16CFJE


CGM_DELAY: EQU  $27FF
CODE_SECT:      SECTION

        XDEF    MCU_init
;** ===================================================================
;**     Method      :  MCU_init (bean MC68HC908JL16_32FA)
;**
;**     Description :
;**         Device initialization code for selected peripherals.
;** ===================================================================
MCU_init:

;** ### MC68HC908JL16_32FA "Cpu" init code ... **
;** PE initialization code after reset **
; System clock initialization 

  ; Common initialization of the write once registers 
        ; CONFIG1: COPRS=1,LVID=1,SSREC=0,STOP=0,COPD=1 
        MOV     #$91,CONFIG1                                        
        ; CONFIG2: IRQPUD=0,LVIT1=0,LVIT0=0,IICSEL=0,STOP_ICLKDIS=0 
        CLR     CONFIG2                                               
  ; Common initialization of the CPU registers 
  ; ### Init_SCI init code 
        ; SCC1: LOOPS=0,ENSCI=0,TXINV=0,M=0,WAKE=0,ILTY=0,PEN=0,PTY=0 
        CLR     SCC1                   ; Disable the SCI module 
        LDA     SCS1                   ; Dummy read of the SCS1 registr to clear flags 
        LDA     SCS2                   ; Dummy read of the SCS2 registr to clear flags 
        LDA     SCDR                   ; Dummy read of the SCDR registr to clear flags 
        ; SCC3: R8=0,T8=0,ORIE=0,NEIE=0,FEIE=0,PEIE=0 
        CLR     SCC3                                               
        ; SCBR: SCP1=1,SCP0=0,SCR2=0,SCR1=1,SCR0=0 
        MOV     #$22,SCBR                                        
        ; SCC1: LOOPS=0,ENSCI=1,TXINV=0,M=0,WAKE=0,ILTY=0,PEN=0,PTY=0 
        MOV     #$40,SCC1                                        
        ; SCC2: SCTIE=0,TCIE=0,SCRIE=1,ILIE=0,TE=0,RE=1,RWU=0,SBK=0 
        MOV     #$24,SCC2                                        
  ; ### Init_COP init code 
        LDA     #$FF
        STA     COPCTL                 ; Clear WatchDog counter 
  ; ### Init_TIM init code 
        ; T1SC: TOF=0,TOIE=0,TSTOP=1,TRST=1,PS2=0,PS1=0,PS0=0 
        MOV     #$30,T1SC              ; Stop and reset counter 
        LDHX    #$6000
        STHX    T1MOD                  ;/* Period value setting */
        LDA     T1SC                   ; Overflow int. flag clearing (first part) 
        ; T1SC: TOF=0,TOIE=1,TSTOP=0,TRST=0,PS2=0,PS1=0,PS0=0 
        MOV     #$40,T1SC              ; Int. flag clearing (2nd part) and timer contr. register setting 
  ; ### 
        CLI                            ; Enable interrupts 
        RTS


;** ===================================================================
;**     Interrupt handler : isrINT_SCITransmit
;**
;**     Description :
;**         User interrupt service routine. 
;**     Parameters  : None
;**     Returns     : Nothing
;** ===================================================================
        XDEF    isrINT_SCITransmit
isrINT_SCITransmit:
  ; Write your interrupt code here ... 

        RTI
; end of isrINT_SCITransmit 


;** ===================================================================
;**     Interrupt handler : isrINT_SCIReceive
;**
;**     Description :
;**         User interrupt service routine. 
;**     Parameters  : None
;**     Returns     : Nothing
;** ===================================================================
        XDEF    isrINT_SCIReceive
isrINT_SCIReceive:
  ; Write your interrupt code here ... 
        PSHH
        PSHX
        LDHX  #$EBBF
        LDA   ,X
        CBEQA #$FF,UPR
        PULH
        PULX
        JMP   $EC09
R0_01:  BRSET SCC2_RWU,SCC2,R0_02
        LDA   SCDR
        STA   ADDR
        AND   #$C0
        CMP   #$C0
        BEQ   IS_ME1
        BCLR  SCC2_RWU,SCC2
        LDHX  TR_BUFF
        MOV   ADDR,X+
        STHX  HX
        MOV   #!0,LENTH
           ;JNB     SM2,R0_02
           ;MOV     A,SBUF
           ;CJNE    A,MYADDR,IS_ME1   ;'判断是否为本机地址,地址不符合,跳转
           ;CLR     SM2
           ;MOV     R0,#TR_BUFF        ;'存地址
           ;MOVX    @R0,A
           ;INC     R0
           ;MOV     R2,#00H
IS_ME1: JMP    SRET

R0_02:     ;'SM2=0,为数据
           ;'是不是长度字节
        LDA   LENTH
        CMP   #$00
        BNE   R0_04
        MOV   SCDR,LENTH
        BNE   R0_03
R0_031:        
        BCLR  SCC2_RWU,SCC2
        JMP   SRET
R0_03:
        LDA   LENTH
        SUB   #$08
        BCS   R0_031
        LDA   LENTH
        SUB   #!60
        BHI   R0_031
        LDHX  HX
        MOV   LENTH,X+
        STHX  HX
        DEC   LENTH
        JMP   SRET
        
                
           ;CJNE    R2,#00H,R0_04   ;'R2<>0不是长度字节
          ; MOV     A,SBUF
           ;MOV     R2,A
           ;JZ      R0_03            ;'长度=0,拒绝接受
           ;CLR     C
	   ;SUBB	   A,#05H
	   ;JC	   R0_03	    ;'长度<6,拒绝
	   ;MOV	   A,R2
	   ;CLR     C
	   ;SUBB    A,#54
	   ;JNC     R0_03            ;'长度>48,拒绝
           ;MOV     A,R2             ;'长度大于等于6,小于等于48,接收长度
           ;MOVX    @R0,A
           ;INC     R0
           ;DEC     R2
           ;LJMP    SRET
;R0_03:     SETB    SM2
        ;   LJMP    SRET
R0_04:     ;'为数据
        LDHX  HX
        MOV   SCDR,X+
        STHX  HX
        LDA   LENTH
        DBNZA R0_05
        JMP   R0_10
           ;MOV     A,SBUF
           ;MOVX    @R0,A
           ;INC     R0
           ;DEC     R2
           ;CJNE    R2,#00H,R0_05
           ;LJMP    R0_10
R0_05:  JMP   SRET
R0_06:  JMP   DA_ER
R0_10:     ;'数据处理
        BCLR  SCC2_RWU,SCC2
        LDHX  TR_BUFF+1
        MOV   X+,CRCLENTH
        INC   CRCLENTH
        LDHX  TR_BUFF
        JSR   MAKECRC
        LDA   CRCH
        ORA   CRCL
        BEQ   R0_18
        MOV   #$01,DATA_ER
        JMP   DA_ER     
           ;SETB    SM2            ;'使只能接收地址
           ;MOV     R0,#TR_BUFF+1
           ;MOVX    A,@R0
           ;INC     A
           ;MOV     R2,A
           ;MOV     R0,#TR_BUFF
           ;LCALL   MAKECRC
           ;MOV     A,R6
           ;ORL     A,R7
           ;JZ      R0_18
           ;'CRC校验错误
           ;SETB    DATA_ER
           ;LJMP    DA_ER

R0_18:     
        LDHX  TR_BUFF+2
        LDA   ,X
        SUB   #!60
        BCS   S_UP_ERR
        STA   TEMP
        ADD   TEMP
        ADD   TEMP
        LDHX  R0_22
        STHX  HX
        
        LDHX  HX
        JMP   ,X
R0_22:  JMP   S_UPOR1
        JMP   S_UPDA
        JMP   S_WSTA
        JMP   DA_ER
        JMP   DA_ER
        JMP   DA_ER
            ;MOV     R0,#TR_BUFF+2
           ;MOVX    A,@R0
        
           ;ANL     A,#00011111B
	          ;CLR	   C
           ;SUBB	  A,#1DH
	         ; JC     S_UP_ERR
	         ; JMP	  R0_211
           ;'小于1D则跳入用户中断程序
S_UP_ERR:
        PULH
        PULX
        PULA
        RTI
      ;POP     DPH
	   ;POP     DPL
      ;     POP     SCONF
	   ;POP     PSW
	   ;POP     B
	  ; POP     ACC
           ;RETI
;+++++++++++++++++++++++++++++++++++++++++

;R0_211:   
        
           ;CPL     L_LED
          ; MOVX    A,@R0
          ; ANL     A,#00011111B
          ; SUBB    A,#1DH
          ; MOV     R4,A
          ; ADD     A,R4
          ; ADD     A,R4
           ;MOV     DPTR,#R0_22
          ;JMP     @A+DPTR
;R0_22:     LJMP    S_UPOR1
 ;          LJMP    S_UPDA
  ;         LJMP    S_WSTA
   ;        LJMP    DA_ER
    ;       LJMP    DA_ER
     ;      LJMP    DA_ER
        
        
                   
       
; end of isrINT_SCIReceive 


;** ===================================================================
;**     Interrupt handler : isrINT_SCIError
;**
;**     Description :
;**         User interrupt service routine. 
;**     Parameters  : None
;**     Returns     : Nothing
;** ===================================================================
        XDEF    isrINT_SCIError
isrINT_SCIError:
  ; Write your interrupt code here ... 

        RTI
; end of isrINT_SCIError 


;** ===================================================================
;**     Interrupt handler : isrINT_TIM1Ovr
;**
;**     Description :
;**         User interrupt service routine. 
;**     Parameters  : None
;**     Returns     : Nothing
;** ===================================================================
        XDEF    isrINT_TIM1Ovr
isrINT_TIM1Ovr:
  ; Write your interrupt code here ... 

        RTI
; end of isrINT_TIM1Ovr 



; Initialization of the CPU registers in FLASH 

        ; MOR: OSCSEL=1 
        ORG     MOR
        DC.B    $FF



UNASSIGNED_ISR: EQU     $FFFF          ; unassigned interrupt service routine

        XREF    _Startup               ; reset interrupt service routine

        ORG     $FFDE                  ; Interrupt vector table
_vect:
        DC.W   UNASSIGNED_ISR          ; Int.no.  0 INT_ADC (at FFDE)               Unassigned
        DC.W   UNASSIGNED_ISR          ; Int.no.  1 INT_KBI (at FFE0)               Unassigned
        DC.W   isrINT_SCITransmit      ; Int.no.  2 INT_SCITransmit (at FFE2)       Used
        DC.W   isrINT_SCIReceive       ; Int.no.  3 INT_SCIReceive (at FFE4)        Used
        DC.W   isrINT_SCIError         ; Int.no.  4 INT_SCIError (at FFE6)          Used
        DC.W   UNASSIGNED_ISR          ; Int.no.  5 INT_MMIIC (at FFE8)             Unassigned
        DC.W   UNASSIGNED_ISR          ; Int.no.  6 Reserved6 (at FFEA)             Unassigned
        DC.W   UNASSIGNED_ISR          ; Int.no.  7 INT_TIM2Ovr (at FFEC)           Unassigned
        DC.W   UNASSIGNED_ISR          ; Int.no.  8 INT_TIM2CH1 (at FFEE)           Unassigned
        DC.W   UNASSIGNED_ISR          ; Int.no.  9 INT_TIM2CH0 (at FFF0)           Unassigned
        DC.W   isrINT_TIM1Ovr          ; Int.no. 10 INT_TIM1Ovr (at FFF2)           Used
        DC.W   UNASSIGNED_ISR          ; Int.no. 11 INT_TIM1CH1 (at FFF4)           Unassigned
        DC.W   UNASSIGNED_ISR          ; Int.no. 12 INT_TIM1CH0 (at FFF6)           Unassigned
        DC.W   UNASSIGNED_ISR          ; Int.no. 13 Reserved13 (at FFF8)            Unassigned
        DC.W   UNASSIGNED_ISR          ; Int.no. 14 INT_IRQ1 (at FFFA)              Unassigned
        DC.W   UNASSIGNED_ISR          ; Int.no. 15 INT_SWI (at FFFC)               Unassigned
        DC.W   _Startup                ; Int.no. 16 INT_RESET (at FFFE)             Reset vector


        END

;** ###################################################################
;**
;**     This file was created by UNIS Processor Expert 2.98 [03.80]
;**     for the Freescale HC08 series of microcontrollers.
;**
;** ###################################################################