main.c

nRF24L01_EVB开发板主程序

        TX_buffer[0] = 0x00;
        Block_Write(TX_buffer,1);
      break;

      case WD_RESET:                                                  // Use WatchDog reset to reset F320
        WD_Reset();
      break;

      case READ_LOCK_BYTE:                                            // Return Lock Byte
        TX_buffer[0] = FLASH_ByteRead(0x3dff);
        Block_Write(TX_buffer, 1);
      break;

      case SPI_SELECT:                                                // Select SPI Mode
        SPI_Init(RX_buffer[ARG]);
        TX_buffer[0] = 0;
        Block_Write(TX_buffer,1);
      break;

      case ST_FR_SWEEP_TX:                                            // Start Frequency Sweep TX[sw_low..sw_high]
        sw_high = RX_buffer[1];
        sw_low  = RX_buffer[2];
        next_ch = sw_low;                                             // Init sweep low channel
        Sweep_Mode = 1;                                               // Sweep_Mode on.
        Sweep_Progress = 1;                                           // Indicates sweep in progress
        ET2 = 1;                                                      // Enable Timer2
        TX_buffer[0] = 0;
        Block_Write(TX_buffer,1);
      break;

      case ST_FR_SWEEP_RX:                                            // Start Frequency Sweep RX[sw_low..sw_high]
        sw_high = RX_buffer[1];
        sw_low  = RX_buffer[2];
        next_ch = sw_low;                                             // init sweep low channel
        Sweep_Mode = 1;                                               // Sweep_Mode on.
        Sweep_Progress = 1;                                           // Indicates sweep in progress
        ET2 = 1;                                                      // Enable Timer2
        TX_buffer[0] = 0;
        Block_Write(TX_buffer,1);
      break;

      case STOP_SWEEP:                                                // Stop current frequency sweep
        Sweep_Mode = 0;                                               // Terminate Sweep_Mode

        TX_buffer[0] = 0;
        Block_Write(TX_buffer,1);
      break;

      case WR_TRANS_CTRL:                                             // Set TX control parameters
        Trans_Ctrl[0] = RX_buffer[ARG];
        Trans_Ctrl[1] = RX_buffer[VALUE];

        TX_buffer[0] = 0;
        Block_Write(TX_buffer,1);
      break;

      case RD_TRANS_CTRL:                                             // Return TX control parameters
        TX_buffer[0] = Trans_Ctrl[0];
        TX_buffer[1] = Trans_Ctrl[1];
        Block_Write(TX_buffer,2);
      break;

      case WR_FREQ_AGIL:                                              // Set freq. agility parameters to pipe.n variabel
        Freq_agil[RX_buffer[ARG]] = RX_buffer[VALUE];

        TX_buffer[0] = 0;
        Block_Write(TX_buffer,1);
      break;

      case RD_FREQ_AGIL:                                              // Return freq.agility parameters for pipe.n
        TX_buffer[0] = Freq_agil[RX_buffer[ARG]];
        Block_Write(TX_buffer,1);
      break;

      case WR_CH_TABLE:                                               // Write freq_table contents
        for(byte_ctr=0;byte_ctr<FREQ_TABLE_SIZE;byte_ctr++)
          Freq_table[byte_ctr] = RX_buffer[ARG + byte_ctr];

        TX_buffer[0] = 0;
        Block_Write(TX_buffer,1);
      break;

      case RD_CH_TABLE:                                               // Read freq_table data
        for(byte_ctr=0;byte_ctr<FREQ_TABLE_SIZE;byte_ctr++)
          TX_buffer[byte_ctr] = Freq_table[byte_ctr];

        Block_Write(TX_buffer,FREQ_TABLE_SIZE);
      break;

      case WR_TX_PAYLOAD:                                             // Write TX payload data
        for(byte_ctr=0;byte_ctr<RX_buffer[ARG];byte_ctr++)
          TX_pload[byte_ctr] = RX_buffer[(byte_ctr+2)];               // Load TX payload into buffer
        TX_pload_width = RX_buffer[ARG];                              // Write TX_pload witdh

        TX_buffer[0] = 0;
        Block_Write(TX_buffer,1);
      break;

      case READ_TX_PLOAD:                                             // Host read TX payload
        TX_buffer[0] = TX_pload_width;
        for(byte_ctr=0;byte_ctr < TX_pload_width;byte_ctr++)
          TX_buffer[byte_ctr+1] = TX_pload[byte_ctr];                 // Load TX_buffer with TX payload data

        Block_Write(TX_buffer, (TX_pload_width + 1));
      break;
      
      case WR_RX_PLOAD_LENGTH:                                        // Write RX payload length for pipe.n
        RX_pload_length[RX_buffer[ARG]] = RX_buffer[VALUE];
        
        TX_buffer[0] = 0;
        Block_Write(TX_buffer, 1);
      break;

      case RD_RX_PLOAD_LENGTH:                                        // Read RX payload length for pipe.n
        TX_buffer[0] = RX_pload_length[RX_buffer[ARG]];

        Block_Write(TX_buffer, 1);
      break;

      case START_COM_MODE:                                            // Start communication mode
        Com_Mode = RX_buffer[ARG];
        TX_buffer[0] = 0;
        Block_Write(TX_buffer,1);

        Start_Communication(Com_Mode);
      break;

      case READ_TEMP:                                                 // Read C8051F320 temperature
        CPU_temp = Read_Temperature();
        TX_buffer[0] = (CPU_temp >> 8);
        TX_buffer[1] = (CPU_temp & 0xff);
        Block_Write(TX_buffer,2);
      break;

      case READ_VOLT:                                                 // Read RF_Vdd voltage
        RF_Vdd = Read_RF_Vdd();
        TX_buffer[0] = (RF_Vdd >> 8);
        TX_buffer[1] = (RF_Vdd & 0xff);
        Block_Write(TX_buffer,2);
      break;

      case READ_RX_DATA:                                              // Read RX data
      break;

      case ENTER_TEST_MODE:                                           // Enter testmode
        Enter_Testmode(RX_buffer[ARG]);
        TX_buffer[0] = 0;
        Block_Write(TX_buffer,1);
      break;

      case WR_FREQ_AGILITY:                                           // Enable/ disable freq.agility
        Freq_Agil_Status = RX_buffer[ARG];

        TX_buffer[0] = 0;
        Block_Write(TX_buffer, 1);
      break;

      case RD_FREQ_AGILITY:                                           // Read freq.agility status (enabled or disabled)
        TX_buffer[0] = Freq_Agil_Status;
        Block_Write(TX_buffer, 1);
      break;

      case UPDATE_DEVICE:                                             // Command that indicates a new device update
//        Reset_L01();                                                  // Reset L01 before new update, NOT implemented
        TX_buffer[0] = 0;
        Block_Write(TX_buffer, 1);
      break;

      case STOP_COMM_MODE:                                            // Command received when "Stop Comm.. Mode" button pressed..
        IRQ_Source = CLEAR;
        ET2 = 0;                                                      // Disable T2 interrupt
        EX0 = 0;                                                      // Disable extern interrupt0, nRF24L01_IRQ
        CE_Pin(CE_LOW);                                               // CE low
        Led1 = Led2 = Led3 = Led4 = 1;                                // Clear all status Led's
        Com_Mode = 2;                                                 // Set Com_Mode = 2, idle
        
        TX_buffer[0] = 0;
        Block_Write(TX_buffer, 1);
      break;

      case RD_COMM_MODE_STAT:                                         // Return communication mode status
        TX_buffer[0] = Com_Mode;
        Block_Write(TX_buffer, 1);
      break;

      case RD_LINK_STATUS:                                            // Return Link Status to host
        TX_buffer[0] = LinkStatus[0];
        TX_buffer[1] = LinkStatus[1];
        LinkStatus[0] = LinkStatus[1] = 0;                            // Clear status after status read
        Block_Write(TX_buffer, 2);
      break;

      default:                                                        // Default switch() handler
      break;
    }

  }

}


/*********************************************
*
* Start_Communication
*
* Starts either RX or TX mode
*
*********************************************/

void Start_Communication(BYTE Com_Mode)
{
BYTE pipe, fr_ag_ena=0;
  CE_Pin(CE_LOW);                                                     // CE low before new transmission
  EX0 = 0;                                                            // Disble interrupt0 (nFR24L01 IRQ)
  ET2 = 0;                                                            // Disable timer2 interrupt
  T2_State = 0;
  Stop_T2();
  Try_Ctr = 0;                                                        // Reset Try Counter
  Table_Ptr = 0;                                                      // Reset freq_table pointer
  Link_Loss_Delay = 0;                                                // Reset Link_Loss_Delay.
  Led1=Led2=Led3=Led4=1;                                              // Clear status LED's _DEBUG_?

  L01_Flush_RX();                                                     // Init new device, so FLUSH RX & TX FIFO's
  L01_Flush_TX();
  L01_Clear_IRQ(MASK_IRQ_FLAGS);                                      // Clear interrupts
  IRQ_Source = CLEAR;
  LastStat = LinkStat = LINK_LOSS;                                    // Default LinkStat = LINK_LOSS.  

  if(Com_Mode == TX_MODE)                                             // TX MODE
  {
    LastStat = LinkStat = LINK_ESTABLISH;
    if(Button_Mode = (Trans_Ctrl[TRANS_SOURCE] == BUTTON))            // Button[0..2] selected for communication?
    {
      Timer_Mode = 0;                                                 // Timer mode comm disabled
      LinkStatus[LINK_STATUS] = LINK_ESTABLISH;
    }
    else                                                              // ..else timer selected for communication
    {            
      Button_Mode = 0;                                                // Timer mode enabled, i.e. button disabled
      if(Freq_Agil_Status)                                            // use freq table ONLY if in FAP mode
      {
        L01_Set_Channel(Freq_table[Table_Ptr]);                                   
      }
      Timer_Mode = 1;                                                 // Timer mode comm activated
      Trans_Tmr = Trans_Ctrl[TRANS_VALUE];                            // Init trans timer value
      Trans_Tmr_Ctr = CLEAR;                                          // and clear Transmission counter
      Start_T2();                                                     // Start timer2
      ET2 = 1;                                                        // Enable Timer2 interrupt
      T2_State = 1;                                                   // Indicate T2 running mode
    }
    
  }
  else                                                                // ..else RX mode
  {
    fr_ag_ena = 0;                                                    // init, freq_agil disabled

    for(pipe=0;pipe<6;pipe++)
      L01_WR_RX_PW_n(pipe,RX_pload_length[pipe]);                     // load pipe0..5 with payload width

    if(Freq_Agil_Status)
    {
      L01_Set_Channel(Freq_table[Table_Ptr]);                         // Set first RF channel, !! in Frequency Agility mode !!

      for(pipe=0;pipe<6;pipe++)                                       // Scan all pipes for frequency agility
      {
        if(Freq_agil[pipe])                                           // Check which pipe freq agil is enabled for
        {
          Trans_Tmr = Freq_agil[pipe];                                // Init freq.agil timer
          Freq_Agil_Pipe = pipe;                                      // Frequency agility enabled for pipe:"pipe"
          fr_ag_ena = 1;
        }
      }

      if(fr_ag_ena)                                                   // Init & start timer2 ONLY if freq agility is enabled
      {
        Trans_Tmr_Ctr = CLEAR;                                        // and clear Transmission counter
        Agil_Timeout = TIMEOUT;                                       // Default, no packet received..
        Start_T2();                                                   // Start timer2
        ET2 = 1;                                                      // Enable Timer2 interrupt
        T2_State = 1;
      }

    }

    CE_Pin(CE_HIGH);                                                  // CE high, ready for reception
  }
  EX0 = 1;                                                            // Enable nRF24L01 IRQ
}